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author | Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> | 2011-04-23 09:28:34 +0200 |
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committer | Arnd Bergmann <arnd@arndb.de> | 2011-07-28 17:07:28 +0200 |
commit | 21d08b9d5536ac418bbce4f419fe2b528b7ddf31 (patch) | |
tree | f1a1bbf5645d933799e31d93365458826dfadea6 /arch/arm/mach-at91/setup.c | |
parent | Linux 3.0 (diff) | |
download | linux-21d08b9d5536ac418bbce4f419fe2b528b7ddf31.tar.xz linux-21d08b9d5536ac418bbce4f419fe2b528b7ddf31.zip |
at91: introduce commom AT91_BASE_SYS
On all at91 except rm9200 and x40 have the System Controller starts
at address 0xffffc000 and has a size of 16KiB.
On rm9200 it's start at 0xfffe4000 of 111KiB with non reserved data starting
at 0xfffff000
This patch removes the individual definitions of AT91_BASE_SYS and
replaces them with a common version at base 0xfffffc000 and size 16KiB
and map the same memory space
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
Diffstat (limited to 'arch/arm/mach-at91/setup.c')
-rw-r--r-- | arch/arm/mach-at91/setup.c | 63 |
1 files changed, 63 insertions, 0 deletions
diff --git a/arch/arm/mach-at91/setup.c b/arch/arm/mach-at91/setup.c new file mode 100644 index 000000000000..096eb9805212 --- /dev/null +++ b/arch/arm/mach-at91/setup.c @@ -0,0 +1,63 @@ +/* + * Copyright (C) 2007 Atmel Corporation. + * Copyright (C) 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> + * + * Under GPLv2 + */ + +#include <linux/module.h> +#include <linux/io.h> + +#include <asm/mach/map.h> + +#include <mach/hardware.h> +#include <mach/cpu.h> + +#include "soc.h" +#include "generic.h" + +struct at91_soc __initdata at91_boot_soc; + +static struct map_desc at91_io_desc __initdata = { + .virtual = AT91_VA_BASE_SYS, + .pfn = __phys_to_pfn(AT91_BASE_SYS), + .length = SZ_16K, + .type = MT_DEVICE, +}; + +void __init at91_map_io(void) +{ + /* Map peripherals */ + iotable_init(&at91_io_desc, 1); + + if (cpu_is_at91cap9()) + at91_boot_soc = at91cap9_soc; + else if (cpu_is_at91rm9200()) + at91_boot_soc = at91rm9200_soc; + else if (cpu_is_at91sam9260()) + at91_boot_soc = at91sam9260_soc; + else if (cpu_is_at91sam9261()) + at91_boot_soc = at91sam9261_soc; + else if (cpu_is_at91sam9263()) + at91_boot_soc = at91sam9263_soc; + else if (cpu_is_at91sam9g10()) + at91_boot_soc = at91sam9261_soc; + else if (cpu_is_at91sam9g20()) + at91_boot_soc = at91sam9260_soc; + else if (cpu_is_at91sam9g45()) + at91_boot_soc = at91sam9g45_soc; + else if (cpu_is_at91sam9rl()) + at91_boot_soc = at91sam9rl_soc; + else if (cpu_is_at91sam9x5()) + at91_boot_soc = at91sam9x5_soc; + else + panic("Impossible to detect the SOC type"); + + if (at91_boot_soc.map_io) + at91_boot_soc.map_io(); +} + +void __init at91_initialize(unsigned long main_clock) +{ + at91_boot_soc.init(main_clock); +} |