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author | Alexandre Belloni <alexandre.belloni@free-electrons.com> | 2015-03-12 15:54:29 +0100 |
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committer | Nicolas Ferre <nicolas.ferre@atmel.com> | 2015-03-13 15:11:05 +0100 |
commit | d18032d62fe7a84a8bc4867de98233ba5342254b (patch) | |
tree | 285f5ff2a61aa6f4b689b6646fb5518f6279ac3e /arch/arm/mach-at91/soc.h | |
parent | ARM: at91: at91rm9200 use SoC detection infrastructure (diff) | |
download | linux-d18032d62fe7a84a8bc4867de98233ba5342254b.tar.xz linux-d18032d62fe7a84a8bc4867de98233ba5342254b.zip |
ARM: at91: at91sam9: use SoC detection infrastructure
Use the soc detection infrastructure for at91sam9 initialization.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Diffstat (limited to 'arch/arm/mach-at91/soc.h')
-rw-r--r-- | arch/arm/mach-at91/soc.h | 28 |
1 files changed, 28 insertions, 0 deletions
diff --git a/arch/arm/mach-at91/soc.h b/arch/arm/mach-at91/soc.h index ab5bc4be3d41..2510c211f291 100644 --- a/arch/arm/mach-at91/soc.h +++ b/arch/arm/mach-at91/soc.h @@ -34,4 +34,32 @@ at91_soc_init(const struct at91_soc *socs); #define AT91RM9200_CIDR_MATCH 0x09290780 +#define AT91SAM9260_CIDR_MATCH 0x019803a0 +#define AT91SAM9261_CIDR_MATCH 0x019703a0 +#define AT91SAM9263_CIDR_MATCH 0x019607a0 +#define AT91SAM9G20_CIDR_MATCH 0x019905a0 +#define AT91SAM9RL64_CIDR_MATCH 0x019b03a0 +#define AT91SAM9G45_CIDR_MATCH 0x019b05a0 +#define AT91SAM9X5_CIDR_MATCH 0x019a05a0 +#define AT91SAM9N12_CIDR_MATCH 0x019a07a0 + +#define AT91SAM9M11_EXID_MATCH 0x00000001 +#define AT91SAM9M10_EXID_MATCH 0x00000002 +#define AT91SAM9G46_EXID_MATCH 0x00000003 +#define AT91SAM9G45_EXID_MATCH 0x00000004 + +#define AT91SAM9G15_EXID_MATCH 0x00000000 +#define AT91SAM9G35_EXID_MATCH 0x00000001 +#define AT91SAM9X35_EXID_MATCH 0x00000002 +#define AT91SAM9G25_EXID_MATCH 0x00000003 +#define AT91SAM9X25_EXID_MATCH 0x00000004 + +#define AT91SAM9CN12_EXID_MATCH 0x00000005 +#define AT91SAM9N12_EXID_MATCH 0x00000006 +#define AT91SAM9CN11_EXID_MATCH 0x00000009 + +#define AT91SAM9XE128_CIDR_MATCH 0x329973a0 +#define AT91SAM9XE256_CIDR_MATCH 0x329a93a0 +#define AT91SAM9XE512_CIDR_MATCH 0x329aa3a0 + #endif /* __AT91_SOC_H */ |