Merge tag 'staging-3.12-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging

Pull staging tree merge from Greg KH:
 "Here's the bit staging tree pull request for 3.12-rc1.

  Lots of staging driver updates, and fixes.  Lustre is finally enabled
  in the build, and lots of cleanup started happening in it.  There's a
  new wireless driver in here, and 2 new TTY drivers, which cause the
  overall lines added/removed to be quite large on the "added" side.

  The IIO driver updates are also coming through here, as they are tied
  to the staging iio drivers"

* tag 'staging-3.12-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging: (942 commits)
  staging: dwc2: make dwc2_core_params documentation more complete
  staging: dwc2: validate the value for phy_utmi_width
  staging: dwc2: interpret all hwcfg and related register at init time
  staging: dwc2: properly mask the GRXFSIZ register
  staging: dwc2: remove redundant register reads
  staging: dwc2: re-use hptxfsiz variable
  staging: dwc2: simplify debug output in dwc_hc_init
  staging: dwc2: add missing shift
  staging: dwc2: simplify register shift expressions
  staging: dwc2: only read the snpsid register once
  staging: dwc2: unshift non-bool register value constants
  staging: dwc2: fix off-by-one in check for max_packet_count parameter
  staging: dwc2: remove specific fifo size constants
  Staging:BCM:DDRInit.c:Renaming __FUNCTION__
  staging: bcm: remove Version.h file.
  staging: rtl8188eu: off by one in rtw_set_802_11_add_wep()
  staging: r8188eu: copying one byte too much
  staging: rtl8188eu: || vs && typo
  staging: r8188eu: off by one bugs
  staging: crystalhd: Resolve sparse 'different base types' warnings.
  ...

1 files changed, 14 insertions, 2 deletions

diff --git a/arch/arm/mach-at91/include/mach/at91_adc.h b/arch/arm/mach-at91/include/mach/at91_adc.h
index 8e7ed5c90817..048a57f76bd3 100644
--- a/arch/arm/mach-at91/include/mach/at91_adc.h
+++ b/arch/arm/mach-at91/include/mach/at91_adc.h
@@ -28,9 +28,12 @@
 #define			AT91_ADC_TRGSEL_EXTERNAL	(6 << 1)
 #define		AT91_ADC_LOWRES		(1 << 4)	/* Low Resolution */
 #define		AT91_ADC_SLEEP		(1 << 5)	/* Sleep Mode */
-#define		AT91_ADC_PRESCAL	(0x3f << 8)	/* Prescalar Rate Selection */
+#define		AT91_ADC_PRESCAL_9260	(0x3f << 8)	/* Prescalar Rate Selection */
+#define		AT91_ADC_PRESCAL_9G45	(0xff << 8)
 #define			AT91_ADC_PRESCAL_(x)	((x) << 8)
-#define		AT91_ADC_STARTUP	(0x1f << 16)	/* Startup Up Time */
+#define		AT91_ADC_STARTUP_9260	(0x1f << 16)	/* Startup Up Time */
+#define		AT91_ADC_STARTUP_9G45	(0x7f << 16)
+#define		AT91_ADC_STARTUP_9X5	(0xf << 16)
 #define			AT91_ADC_STARTUP_(x)	((x) << 16)
 #define		AT91_ADC_SHTIM		(0xf  << 24)	/* Sample & Hold Time */
 #define			AT91_ADC_SHTIM_(x)	((x) << 24)
@@ -48,6 +51,9 @@
 #define		AT91_ADC_ENDRX		(1 << 18)	/* End of RX Buffer */
 #define		AT91_ADC_RXFUFF		(1 << 19)	/* RX Buffer Full */
 
+#define AT91_ADC_SR_9X5		0x30		/* Status Register for 9x5 */
+#define		AT91_ADC_SR_DRDY_9X5	(1 << 24)	/* Data Ready */
+
 #define AT91_ADC_LCDR		0x20		/* Last Converted Data Register */
 #define		AT91_ADC_LDATA		(0x3ff)
 
@@ -58,4 +64,10 @@
 #define AT91_ADC_CHR(n)		(0x30 + ((n) * 4))	/* Channel Data Register N */
 #define		AT91_ADC_DATA		(0x3ff)
 
+#define AT91_ADC_CDR0_9X5	(0x50)			/* Channel Data Register 0 for 9X5 */
+
+#define AT91_ADC_TRGR_9260	AT91_ADC_MR
+#define AT91_ADC_TRGR_9G45	0x08
+#define AT91_ADC_TRGR_9X5	0xC0
+
 #endif