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authorFlorian Fainelli <f.fainelli@gmail.com>2015-07-08 03:17:01 +0200
committerFlorian Fainelli <f.fainelli@gmail.com>2015-07-12 03:33:51 +0200
commitffb910d7b84f21ef6caeed041032a0af8d2e00ed (patch)
tree83d68aa2f19b6e936a4d0fa13d8a2b3b751b000d /arch/arm/mach-bcm/bcm63xx_smp.c
parentARM: BCM63xx: fix parameter to of_get_cpu_node in bcm63138_smp_boot_secondary (diff)
downloadlinux-ffb910d7b84f21ef6caeed041032a0af8d2e00ed.tar.xz
linux-ffb910d7b84f21ef6caeed041032a0af8d2e00ed.zip
ARM: BCM63xx: Remove custom secondary_startup function
With commit 02b4e2756e01c623cc4dbceae4b07be75252db5b ("ARM: v7 setup function should invalidate L1 cache"), the default secondary_startup function for ARMv7 CPUs does invalidate the L1 cache, which was the sole reason why BCM63xx had to have its own secondary_startup implementation. Now that the secondary_startup takes care of this, we can completely remove that code. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Diffstat (limited to 'arch/arm/mach-bcm/bcm63xx_smp.c')
-rw-r--r--arch/arm/mach-bcm/bcm63xx_smp.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-bcm/bcm63xx_smp.c b/arch/arm/mach-bcm/bcm63xx_smp.c
index b8e18cc8f237..19be90421f4d 100644
--- a/arch/arm/mach-bcm/bcm63xx_smp.c
+++ b/arch/arm/mach-bcm/bcm63xx_smp.c
@@ -135,7 +135,7 @@ static int bcm63138_smp_boot_secondary(unsigned int cpu,
}
/* Write the secondary init routine to the BootLUT reset vector */
- val = virt_to_phys(bcm63138_secondary_startup);
+ val = virt_to_phys(secondary_startup);
writel_relaxed(val, bootlut_base + BOOTLUT_RESET_VECT);
/* Power up the core, will jump straight to its reset vector when we