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author | Hauke Mehrtens <hauke@hauke-m.de> | 2015-11-21 15:29:47 +0100 |
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committer | Florian Fainelli <f.fainelli@gmail.com> | 2015-11-25 01:02:23 +0100 |
commit | f4ce7effe2253a325f8ba182903cbdf0d8698593 (patch) | |
tree | e04fc670c53f3624222828354279c6ddb736b24d /arch/arm/mach-bcm | |
parent | ARM: BCM5301X: remove workaround imprecise abort fault handler (diff) | |
download | linux-f4ce7effe2253a325f8ba182903cbdf0d8698593.tar.xz linux-f4ce7effe2253a325f8ba182903cbdf0d8698593.zip |
ARM: BCM5310X: activate erratas needed for SoC
The BCM4708 I have, which is probably the first generation which got
to the consumer market, is using a ARM Cortex-A9 rev r3p0 and a
L2C-310 rev r3p2 L2 cache controller. There are 3 workarounds for known
erratas in the Linux kernel which could be activated and will be in
this patch. There are currently no workarounds which have to be
activated for the L2C-310 rev r3p2 in Linux.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Diffstat (limited to 'arch/arm/mach-bcm')
-rw-r--r-- | arch/arm/mach-bcm/Kconfig | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/mach-bcm/Kconfig b/arch/arm/mach-bcm/Kconfig index 8c53c55be1fe..c32628b045e4 100644 --- a/arch/arm/mach-bcm/Kconfig +++ b/arch/arm/mach-bcm/Kconfig @@ -52,6 +52,10 @@ config ARCH_BCM_NSP config ARCH_BCM_5301X bool "Broadcom BCM470X / BCM5301X ARM SoC" if ARCH_MULTI_V7 select ARCH_BCM_IPROC + select ARM_ERRATA_754322 + select ARM_ERRATA_775420 + select ARM_ERRATA_764369 if SMP + help Support for Broadcom BCM470X and BCM5301X SoCs with ARM CPU cores. |