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author | Linus Torvalds <torvalds@linux-foundation.org> | 2016-03-20 22:26:57 +0100 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2016-03-20 22:26:57 +0100 |
commit | dae0b74eb7abd7d5c7572414b0c8f91c2dab63c0 (patch) | |
tree | f1a2317db97a8eddaf14956b2efa12bf34c51cfe /arch/arm/mach-cns3xxx/cns3xxx.h | |
parent | x86/kallsyms: fix GOLD link failure with new relative kallsyms table format (diff) | |
parent | CNS3xxx: Fix PCI cns3xxx_write_config() (diff) | |
download | linux-dae0b74eb7abd7d5c7572414b0c8f91c2dab63c0.tar.xz linux-dae0b74eb7abd7d5c7572414b0c8f91c2dab63c0.zip |
Merge tag 'armsoc-fixes-nc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC non-urgent fixes from Arnd Bergmann:
"As usual, we queue up a few fixes that don't seem urgent enough to go
in through -rc.
- a number of randconfig warning fixes from Arnd
- various small fixes for OMAP
- one somewhat larger patch to restore the OMAP3 cpuidle tuning that
was lost in a cleanup
- a small regression fix for cns3xxx PCI"
* tag 'armsoc-fixes-nc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (26 commits)
CNS3xxx: Fix PCI cns3xxx_write_config()
MAINTAINERS: unify email addrs for Kevin Hilman
CNS3xxx: remove unused *_VIRT definitions
ARM: OMAP2+: Fix hwmod clock for l4_ls
soc: TI knav_qmss: fix dma_addr_t printing
ARM: prima2: always enable reset controller
ARM: socfpga: hide unused functions
ARM: ux500: fix ureachable iounmap()
ARM: ks8695: fix __initdata annotation
ARM: mvebu: mark mvebu_hwcc_pci_nb as __maybe_unused
ARM: mv78xx0: avoid unused function warning
ARM: orion: only select I2C_BOARDINFO when using I2C
ARM: OMAP2+: Fix out of range register access with syscon_config.max_register
ARM: OMAP3: Add cpuidle parameters table for omap3430
ARM: davinci: make I2C support optional
ARM: davinci: DA8xx+DMx combined kernels need PATCH_PHYS_VIRT
ARM: davinci: avoid unused mityomapl138_pn_info variable
ARM: davinci: limit DT support to DA850
ARM: DRA7: hwmod: Add reset data for PCIe
ARM: DRA7: hwmod: Fix OCP2SCP sysconfig
...
Diffstat (limited to 'arch/arm/mach-cns3xxx/cns3xxx.h')
-rw-r--r-- | arch/arm/mach-cns3xxx/cns3xxx.h | 6 |
1 files changed, 0 insertions, 6 deletions
diff --git a/arch/arm/mach-cns3xxx/cns3xxx.h b/arch/arm/mach-cns3xxx/cns3xxx.h index a0f5b60662ae..a642ba5feb64 100644 --- a/arch/arm/mach-cns3xxx/cns3xxx.h +++ b/arch/arm/mach-cns3xxx/cns3xxx.h @@ -162,13 +162,11 @@ #define CNS3XXX_L2C_BASE 0x92000000 /* L2 Cache Control */ #define CNS3XXX_PCIE0_MEM_BASE 0xA0000000 /* PCIe Port 0 IO/Memory Space */ -#define CNS3XXX_PCIE0_MEM_BASE_VIRT 0xE0000000 #define CNS3XXX_PCIE0_HOST_BASE 0xAB000000 /* PCIe Port 0 RC Base */ #define CNS3XXX_PCIE0_HOST_BASE_VIRT 0xE1000000 #define CNS3XXX_PCIE0_IO_BASE 0xAC000000 /* PCIe Port 0 */ -#define CNS3XXX_PCIE0_IO_BASE_VIRT 0xE2000000 #define CNS3XXX_PCIE0_CFG0_BASE 0xAD000000 /* PCIe Port 0 CFG Type 0 */ #define CNS3XXX_PCIE0_CFG0_BASE_VIRT 0xE3000000 @@ -177,16 +175,13 @@ #define CNS3XXX_PCIE0_CFG1_BASE_VIRT 0xE4000000 #define CNS3XXX_PCIE0_MSG_BASE 0xAF000000 /* PCIe Port 0 Message Space */ -#define CNS3XXX_PCIE0_MSG_BASE_VIRT 0xE5000000 #define CNS3XXX_PCIE1_MEM_BASE 0xB0000000 /* PCIe Port 1 IO/Memory Space */ -#define CNS3XXX_PCIE1_MEM_BASE_VIRT 0xE8000000 #define CNS3XXX_PCIE1_HOST_BASE 0xBB000000 /* PCIe Port 1 RC Base */ #define CNS3XXX_PCIE1_HOST_BASE_VIRT 0xE9000000 #define CNS3XXX_PCIE1_IO_BASE 0xBC000000 /* PCIe Port 1 */ -#define CNS3XXX_PCIE1_IO_BASE_VIRT 0xEA000000 #define CNS3XXX_PCIE1_CFG0_BASE 0xBD000000 /* PCIe Port 1 CFG Type 0 */ #define CNS3XXX_PCIE1_CFG0_BASE_VIRT 0xEB000000 @@ -195,7 +190,6 @@ #define CNS3XXX_PCIE1_CFG1_BASE_VIRT 0xEC000000 #define CNS3XXX_PCIE1_MSG_BASE 0xBF000000 /* PCIe Port 1 Message Space */ -#define CNS3XXX_PCIE1_MSG_BASE_VIRT 0xED000000 /* * Testchip peripheral and fpga gic regions |