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authorSergei Shtylyov <sshtylyov@ru.mvista.com>2010-04-16 19:29:11 +0200
committerKevin Hilman <khilman@deeprootsystems.com>2010-05-07 00:02:06 +0200
commit7034217467abe91b5bc63fc2993bb8eec1cf3c9f (patch)
tree5e0aeb13a0b69f111fa53a78f3dc0b61e437087b /arch/arm/mach-davinci/board-neuros-osd2.c
parentDavinci: tnetv107x cpu types (diff)
downloadlinux-7034217467abe91b5bc63fc2993bb8eec1cf3c9f.tar.xz
linux-7034217467abe91b5bc63fc2993bb8eec1cf3c9f.zip
DaVinci: move AEMIF #define's to the proper headers
Currently each DaVinci board file #define's its own version of the EMIFA base addresses (all named DAVINCI_ASYNC_EMIF_*_BASE), which leads to duplication. Move these #define's to the SoC specific headers, changing their prefixes from 'DAVINCI' to the 'DM355', 'DM644X', and 'DM646X' since all these base addresses are SoC specific... And while at it, rename DM646X_ASYNC_EMIF_DATA_CE0_BASE to DM646X_ASYNC_EMIF_CS2_SPACE_BASE in order to match the DM646x datasheet. Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Diffstat (limited to 'arch/arm/mach-davinci/board-neuros-osd2.c')
-rw-r--r--arch/arm/mach-davinci/board-neuros-osd2.c11
1 files changed, 4 insertions, 7 deletions
diff --git a/arch/arm/mach-davinci/board-neuros-osd2.c b/arch/arm/mach-davinci/board-neuros-osd2.c
index 1fadc68d9fbb..5afe37e3a4cb 100644
--- a/arch/arm/mach-davinci/board-neuros-osd2.c
+++ b/arch/arm/mach-davinci/board-neuros-osd2.c
@@ -43,9 +43,6 @@
#define DAVINCI_CFC_ATA_BASE 0x01C66000
-#define DAVINCI_ASYNC_EMIF_CONTROL_BASE 0x01e00000
-#define DAVINCI_ASYNC_EMIF_DATA_CE0_BASE 0x02000000
-
#define LXT971_PHY_ID 0x001378e2
#define LXT971_PHY_MASK 0xfffffff0
@@ -98,12 +95,12 @@ static struct davinci_nand_pdata davinci_ntosd2_nandflash_data = {
static struct resource davinci_ntosd2_nandflash_resource[] = {
{
- .start = DAVINCI_ASYNC_EMIF_DATA_CE0_BASE,
- .end = DAVINCI_ASYNC_EMIF_DATA_CE0_BASE + SZ_16M - 1,
+ .start = DM644X_ASYNC_EMIF_DATA_CE0_BASE,
+ .end = DM644X_ASYNC_EMIF_DATA_CE0_BASE + SZ_16M - 1,
.flags = IORESOURCE_MEM,
}, {
- .start = DAVINCI_ASYNC_EMIF_CONTROL_BASE,
- .end = DAVINCI_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1,
+ .start = DM644X_ASYNC_EMIF_CONTROL_BASE,
+ .end = DM644X_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1,
.flags = IORESOURCE_MEM,
},
};