summaryrefslogtreecommitdiffstats
path: root/arch/arm/mach-davinci/clock.c
diff options
context:
space:
mode:
authorSekhar Nori <nsekhar@ti.com>2011-06-14 17:33:20 +0200
committerSekhar Nori <nsekhar@ti.com>2011-07-06 13:18:45 +0200
commit56e580d7783ba49a50ccc1b1f3130e5ed2dc52e7 (patch)
tree89ae7f1de834df5fd7425c40e6a7697d0a696401 /arch/arm/mach-davinci/clock.c
parentdavinci: psc.h: clean up indentation done using spaces (diff)
downloadlinux-56e580d7783ba49a50ccc1b1f3130e5ed2dc52e7.tar.xz
linux-56e580d7783ba49a50ccc1b1f3130e5ed2dc52e7.zip
davinci: dm6467/T EVM: fix setting up of reference clock rate
The DM6467 and DM6467T EVMs use different reference clock frequencies. This difference is currently supported by having the SoC code call a public board routine which sets up the reference clock frequency. This does not scale as more boards are added. Instead, use the clk_set_rate() API to setup the reference clock frequency to a different value from the board file. Suggested-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com> Acked-by: Kevin Hilman <khilman@ti.com>
Diffstat (limited to 'arch/arm/mach-davinci/clock.c')
-rw-r--r--arch/arm/mach-davinci/clock.c38
1 files changed, 38 insertions, 0 deletions
diff --git a/arch/arm/mach-davinci/clock.c b/arch/arm/mach-davinci/clock.c
index e4e3af179f02..ae653194b645 100644
--- a/arch/arm/mach-davinci/clock.c
+++ b/arch/arm/mach-davinci/clock.c
@@ -368,6 +368,12 @@ static unsigned long clk_leafclk_recalc(struct clk *clk)
return clk->parent->rate;
}
+int davinci_simple_set_rate(struct clk *clk, unsigned long rate)
+{
+ clk->rate = rate;
+ return 0;
+}
+
static unsigned long clk_pllclk_recalc(struct clk *clk)
{
u32 ctrl, mult = 1, prediv = 1, postdiv = 1;
@@ -506,6 +512,38 @@ int davinci_set_pllrate(struct pll_data *pll, unsigned int prediv,
}
EXPORT_SYMBOL(davinci_set_pllrate);
+/**
+ * davinci_set_refclk_rate() - Set the reference clock rate
+ * @rate: The new rate.
+ *
+ * Sets the reference clock rate to a given value. This will most likely
+ * result in the entire clock tree getting updated.
+ *
+ * This is used to support boards which use a reference clock different
+ * than that used by default in <soc>.c file. The reference clock rate
+ * should be updated early in the boot process; ideally soon after the
+ * clock tree has been initialized once with the default reference clock
+ * rate (davinci_common_init()).
+ *
+ * Returns 0 on success, error otherwise.
+ */
+int davinci_set_refclk_rate(unsigned long rate)
+{
+ struct clk *refclk;
+
+ refclk = clk_get(NULL, "ref");
+ if (IS_ERR(refclk)) {
+ pr_err("%s: failed to get reference clock.\n", __func__);
+ return PTR_ERR(refclk);
+ }
+
+ clk_set_rate(refclk, rate);
+
+ clk_put(refclk);
+
+ return 0;
+}
+
int __init davinci_clk_init(struct clk_lookup *clocks)
{
struct clk_lookup *c;