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authorBartosz Golaszewski <bgolaszewski@baylibre.com>2019-02-14 15:52:22 +0100
committerSekhar Nori <nsekhar@ti.com>2019-02-19 15:33:33 +0100
commit3b5d1c50ffb8ec86007dbd3683c0e1a06e089226 (patch)
tree560cd6dedf7c94a3f2076b7ba29da94eec7adfaa /arch/arm/mach-davinci/cp_intc.c
parentARM: davinci: cp-intc: use a common prefix for all symbols (diff)
downloadlinux-3b5d1c50ffb8ec86007dbd3683c0e1a06e089226.tar.xz
linux-3b5d1c50ffb8ec86007dbd3683c0e1a06e089226.zip
ARM: davinci: cp-intc: convert all hex numbers to lowercase
Use lowercase letters in hexadecimal numbers in the cp-intc driver as is done in most of the kernel code base. Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> Reviewed-by: David Lechner <david@lechnology.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Diffstat (limited to 'arch/arm/mach-davinci/cp_intc.c')
-rw-r--r--arch/arm/mach-davinci/cp_intc.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/arm/mach-davinci/cp_intc.c b/arch/arm/mach-davinci/cp_intc.c
index bf77b6950273..dcd43b067a6a 100644
--- a/arch/arm/mach-davinci/cp_intc.c
+++ b/arch/arm/mach-davinci/cp_intc.c
@@ -23,19 +23,19 @@
#include <mach/common.h>
#define DAVINCI_CP_INTC_CTRL 0x04
-#define DAVINCI_CP_INTC_HOST_CTRL 0x0C
+#define DAVINCI_CP_INTC_HOST_CTRL 0x0c
#define DAVINCI_CP_INTC_GLOBAL_ENABLE 0x10
#define DAVINCI_CP_INTC_SYS_STAT_IDX_CLR 0x24
#define DAVINCI_CP_INTC_SYS_ENABLE_IDX_SET 0x28
-#define DAVINCI_CP_INTC_SYS_ENABLE_IDX_CLR 0x2C
+#define DAVINCI_CP_INTC_SYS_ENABLE_IDX_CLR 0x2c
#define DAVINCI_CP_INTC_HOST_ENABLE_IDX_SET 0x34
#define DAVINCI_CP_INTC_HOST_ENABLE_IDX_CLR 0x38
#define DAVINCI_CP_INTC_PRIO_IDX 0x80
#define DAVINCI_CP_INTC_SYS_STAT_CLR(n) (0x0280 + (n << 2))
#define DAVINCI_CP_INTC_SYS_ENABLE_CLR(n) (0x0380 + (n << 2))
#define DAVINCI_CP_INTC_CHAN_MAP(n) (0x0400 + (n << 2))
-#define DAVINCI_CP_INTC_SYS_POLARITY(n) (0x0D00 + (n << 2))
-#define DAVINCI_CP_INTC_SYS_TYPE(n) (0x0D80 + (n << 2))
+#define DAVINCI_CP_INTC_SYS_POLARITY(n) (0x0d00 + (n << 2))
+#define DAVINCI_CP_INTC_SYS_TYPE(n) (0x0d80 + (n << 2))
#define DAVINCI_CP_INTC_HOST_ENABLE(n) (0x1500 + (n << 2))
#define DAVINCI_CP_INTC_PRI_INDX_MASK GENMASK(9, 0)
#define DAVINCI_CP_INTC_GPIR_NONE BIT(31)