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authorCyril Chemparathy <cyril@ti.com>2010-05-02 00:38:27 +0200
committerKevin Hilman <khilman@deeprootsystems.com>2010-05-07 00:02:09 +0200
commit5b3a05ca911688c53680f2b020a1512b9da29c89 (patch)
tree4724dd98e7ef949d1976865ad1198c8693d341da /arch/arm/mach-davinci/include/mach/da8xx.h
parentDavinci: gpio - fine grained locking (diff)
downloadlinux-5b3a05ca911688c53680f2b020a1512b9da29c89.tar.xz
linux-5b3a05ca911688c53680f2b020a1512b9da29c89.zip
Davinci: eliminate pinmux offset verbosity
Pinmux registers are sequential, and do not need to be enumerated out as they currently are. This reduces code volume and keeps things simple. If some future SoC comes up with a discontiguous register map, PINMUX() can then be expanded with local token pasting. Signed-off-by: Cyril Chemparathy <cyril@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Diffstat (limited to 'arch/arm/mach-davinci/include/mach/da8xx.h')
-rw-r--r--arch/arm/mach-davinci/include/mach/da8xx.h21
1 files changed, 0 insertions, 21 deletions
diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h b/arch/arm/mach-davinci/include/mach/da8xx.h
index 33471c9cbca3..dbb4ebe4d114 100644
--- a/arch/arm/mach-davinci/include/mach/da8xx.h
+++ b/arch/arm/mach-davinci/include/mach/da8xx.h
@@ -64,27 +64,6 @@ extern void __iomem *da8xx_syscfg1_base;
#define DA8XX_DDR2_CTL_BASE 0xb0000000
#define DA8XX_ARM_RAM_BASE 0xffff0000
-#define PINMUX0 0x00
-#define PINMUX1 0x04
-#define PINMUX2 0x08
-#define PINMUX3 0x0c
-#define PINMUX4 0x10
-#define PINMUX5 0x14
-#define PINMUX6 0x18
-#define PINMUX7 0x1c
-#define PINMUX8 0x20
-#define PINMUX9 0x24
-#define PINMUX10 0x28
-#define PINMUX11 0x2c
-#define PINMUX12 0x30
-#define PINMUX13 0x34
-#define PINMUX14 0x38
-#define PINMUX15 0x3c
-#define PINMUX16 0x40
-#define PINMUX17 0x44
-#define PINMUX18 0x48
-#define PINMUX19 0x4c
-
void __init da830_init(void);
void __init da850_init(void);