diff options
| author | Sekhar Nori <nsekhar@ti.com> | 2009-11-16 12:51:32 +0100 |
|---|---|---|
| committer | Kevin Hilman <khilman@deeprootsystems.com> | 2010-02-04 22:29:32 +0100 |
| commit | d2de05827cce9438dfc61d5a4cf13b6ca82ebdee (patch) | |
| tree | d01e5756f23f6ffce94ae0891b9b1e7148d9d4ea /arch/arm/mach-davinci/include/mach/da8xx.h | |
| parent | DaVinci - Adding platform & board changes for vpfe capture on DM365 (diff) | |
| download | linux-d2de05827cce9438dfc61d5a4cf13b6ca82ebdee.tar.xz linux-d2de05827cce9438dfc61d5a4cf13b6ca82ebdee.zip | |
davinci: da8xx/omapl1: add support for the second sysconfig module
OMAP-L138 adds a second SYSCFG region having useful functionality
like deep sleep, pull up/down control and SATA clock stop.
This patch makes provision for accessing registers from second
SYSCFG region in da8xx code.
Note that OMAP-L137 has a single SYSCFG region.
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Diffstat (limited to 'arch/arm/mach-davinci/include/mach/da8xx.h')
| -rw-r--r-- | arch/arm/mach-davinci/include/mach/da8xx.h | 10 |
1 files changed, 7 insertions, 3 deletions
diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h b/arch/arm/mach-davinci/include/mach/da8xx.h index 90704910d343..bddc4d4a806e 100644 --- a/arch/arm/mach-davinci/include/mach/da8xx.h +++ b/arch/arm/mach-davinci/include/mach/da8xx.h @@ -21,7 +21,8 @@ #include <mach/mmc.h> #include <mach/usb.h> -extern void __iomem *da8xx_syscfg_base; +extern void __iomem *da8xx_syscfg0_base; +extern void __iomem *da8xx_syscfg1_base; /* * The cp_intc interrupt controller for the da8xx isn't in the same @@ -34,13 +35,16 @@ extern void __iomem *da8xx_syscfg_base; #define DA8XX_CP_INTC_SIZE SZ_8K #define DA8XX_CP_INTC_VIRT (IO_VIRT - DA8XX_CP_INTC_SIZE - SZ_4K) -#define DA8XX_SYSCFG_BASE (IO_PHYS + 0x14000) -#define DA8XX_SYSCFG_VIRT(x) (da8xx_syscfg_base + (x)) +#define DA8XX_SYSCFG0_BASE (IO_PHYS + 0x14000) +#define DA8XX_SYSCFG0_VIRT(x) (da8xx_syscfg0_base + (x)) #define DA8XX_JTAG_ID_REG 0x18 #define DA8XX_CFGCHIP0_REG 0x17c #define DA8XX_CFGCHIP2_REG 0x184 #define DA8XX_CFGCHIP3_REG 0x188 +#define DA8XX_SYSCFG1_BASE (IO_PHYS + 0x22C000) +#define DA8XX_SYSCFG1_VIRT(x) (da8xx_syscfg1_base + (x)) + #define DA8XX_PSC0_BASE 0x01c10000 #define DA8XX_PLL0_BASE 0x01c11000 #define DA8XX_TIMER64P0_BASE 0x01c20000 |