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authorRajashekhara, Sudhakar <sudhakar.raj@ti.com>2010-06-29 08:05:13 +0200
committerKevin Hilman <khilman@deeprootsystems.com>2010-08-05 18:58:25 +0200
commit90bd4e6dd7f4b747477f2ad0125adb933cf3bcfa (patch)
tree081fdeffcd68ac2aebf9cfea60de94770b9bef64 /arch/arm/mach-davinci/include
parentdavinci: edma: provide ability to detect insufficient CC info data (diff)
downloadlinux-90bd4e6dd7f4b747477f2ad0125adb933cf3bcfa.tar.xz
linux-90bd4e6dd7f4b747477f2ad0125adb933cf3bcfa.zip
davinci: support for EDMA resource sharing
Current EDMA driver is not taking care of EDMA channels/slots which are allocated from other processor, say DSP. If a channel/slot is allocated from DSP, the existing EDMA driver can still allocate the same resource on ARM. This patch enables the user to pass the channel/slots reserved for DSP as platform data. EDMA driver scans this list during probe and prepares a bitmap of channel/slots which can be used on ARM side. Trying to reserve channels by doing a 'pre-allocate' using edma_alloc_{slot|channel}() API does not work because 1) The reservation should be done in probe() to avoid race with other ARM side driver trying to use EDMA 2) The alloc channel API sets up the access through shadow region 0 which will be incorrect for DSP usage. It also sets up the channel <-> queue number mapping which is not required as DSP will likely do its own mapping anyway. 3) (minor) There is no API to allocate channels in bulk. Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com> Cc: David Brownell <david-b@pacbell.net> Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Diffstat (limited to 'arch/arm/mach-davinci/include')
-rw-r--r--arch/arm/mach-davinci/include/mach/edma.h9
1 files changed, 9 insertions, 0 deletions
diff --git a/arch/arm/mach-davinci/include/mach/edma.h b/arch/arm/mach-davinci/include/mach/edma.h
index 9a3bcc6f2602..dc10ef6cf572 100644
--- a/arch/arm/mach-davinci/include/mach/edma.h
+++ b/arch/arm/mach-davinci/include/mach/edma.h
@@ -271,6 +271,12 @@ void edma_clear_event(unsigned channel);
void edma_pause(unsigned channel);
void edma_resume(unsigned channel);
+struct edma_rsv_info {
+
+ const s16 (*rsv_chans)[2];
+ const s16 (*rsv_slots)[2];
+};
+
/* platform_data for EDMA driver */
struct edma_soc_info {
@@ -282,6 +288,9 @@ struct edma_soc_info {
unsigned n_cc;
enum dma_event_q default_queue;
+ /* Resource reservation for other cores */
+ struct edma_rsv_info *rsv;
+
const s8 (*queue_tc_mapping)[2];
const s8 (*queue_priority_mapping)[2];
};