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authorHubert Feurstein <hubert.feurstein@contec.at>2009-10-07 09:41:01 +0200
committerRussell King <rmk+kernel@arm.linux.org.uk>2009-10-07 14:15:15 +0200
commit7232344d49b88e8787f1842936867cd224da47e5 (patch)
treecad30c421ba4e9ed91f8eb9fcb15aba1392b79b8 /arch/arm/mach-ep93xx/micro9.c
parentARM: 5750/1: ep93xx/micro9: Update platform code (diff)
downloadlinux-7232344d49b88e8787f1842936867cd224da47e5.tar.xz
linux-7232344d49b88e8787f1842936867cd224da47e5.zip
ARM: 5751/1: ep93xx/micro9: Add Micro9-Slim
Add Contec Micro9-Slim support Cc: Ryan Mallon <ryan@bluewatersys.com> Requires: 5750/1 Signed-off-by: Hubert Feurstein <hubert.feurstein@contec.at> Acked-by: H Hartley Sweeten <hsweeten@visionengravers.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-ep93xx/micro9.c')
-rw-r--r--arch/arm/mach-ep93xx/micro9.c16
1 files changed, 15 insertions, 1 deletions
diff --git a/arch/arm/mach-ep93xx/micro9.c b/arch/arm/mach-ep93xx/micro9.c
index 49fbee5adde2..d83b80478b09 100644
--- a/arch/arm/mach-ep93xx/micro9.c
+++ b/arch/arm/mach-ep93xx/micro9.c
@@ -28,6 +28,7 @@
* Micro9-High has up to 64MB of 32-bit flash on CS1
* Micro9-Mid has up to 64MB of either 32-bit or 16-bit flash on CS1
* Micro9-Lite uses a seperate MTD map driver for flash support
+ * Micro9-Slim has up to 64MB of either 32-bit or 16-bit flash on CS1
*************************************************************************/
static struct physmap_flash_data micro9_flash_data;
@@ -70,7 +71,7 @@ static void __init micro9_register_flash(void)
{
if (machine_is_micro9())
__micro9_register_flash(4);
- else if (machine_is_micro9m())
+ else if (machine_is_micro9m() || machine_is_micro9s())
__micro9_register_flash(micro9_detect_bootwidth());
}
@@ -129,3 +130,16 @@ MACHINE_START(MICRO9L, "Contec Micro9-Lite")
.init_machine = micro9_init_machine,
MACHINE_END
#endif
+
+#ifdef CONFIG_MACH_MICRO9S
+MACHINE_START(MICRO9S, "Contec Micro9-Slim")
+ /* Maintainer: Hubert Feurstein <hubert.feurstein@contec.at> */
+ .phys_io = EP93XX_APB_PHYS_BASE,
+ .io_pg_offst = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc,
+ .boot_params = EP93XX_SDCE3_PHYS_BASE_ASYNC + 0x100,
+ .map_io = ep93xx_map_io,
+ .init_irq = ep93xx_init_irq,
+ .timer = &ep93xx_timer,
+ .init_machine = micro9_init_machine,
+MACHINE_END
+#endif