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author | Linus Torvalds <torvalds@linux-foundation.org> | 2012-12-14 23:38:28 +0100 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2012-12-14 23:38:28 +0100 |
commit | 6a57d104c8cb5b6adad6784b4ce6e2f7f9961a3a (patch) | |
tree | c3ff93b006d7483ccee09799d215b03b1bbc3f1b /arch/arm/mach-exynos/mach-exynos5-dt.c | |
parent | Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus (diff) | |
parent | ARM: arm-soc: Merge branch 'next/smp' into next/soc2 (diff) | |
download | linux-6a57d104c8cb5b6adad6784b4ce6e2f7f9961a3a.tar.xz linux-6a57d104c8cb5b6adad6784b4ce6e2f7f9961a3a.zip |
Merge tag 'soc2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM Soc updates, take 2, from Olof Johansson:
"This is the second batch of SoC updates for the 3.8 merge window,
containing parts that had dependencies on earlier branches such that
we couldn't include them with the first branch.
These are general updates for Samsung Exynos, Renesas/shmobile and a
topic branch that adds SMP support to Altera's socfpga platform."
Fix up conflicts mostly as per Olof.
* tag 'soc2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
ARM: EXYNOS: Clock settings for SATA and SATA PHY
ARM: EXYNOS: Add ARM down clock support
ARM: EXYNOS: Fix i2c suspend/resume for legacy controller
ARM: EXYNOS: Add aliases for i2c controller
ARM: EXYNOS: Setup legacy i2c controller interrupts
sh: clkfwk: fixup unsed variable warning
Revert "ARM: shmobile: r8a7779: Replace modify_scu_cpu_psr with scu_power_mode"
Revert "ARM: shmobile: sh73a0: Replace modify_scu_cpu_psr with scu_power_mode"
Revert "ARM: shmobile: emev2: Replace modify_scu_cpu_psr with scu_power_mode"
ARM: highbank: use common debug_ll_io_init
ARM: shmobile: sh7372: sh7372_fsiXck_clk become non-global
ARM: shmobile: sh7372: remove fsidivx clock
ARM: socfpga: mark secondary_trampoline as cpuinit
socfpga: map uart into virtual address space so that early_printk() works
ARM: socfpga: fix build break for allyesconfig
ARM: socfpga: Enable SMP for socfpga
ARM: EXYNOS: Add dp clock support for EXYNOS5
ARM: SAMSUNG: call clk_get_rate for debugfs rate files
ARM: SAMSUNG: add clock_tree debugfs file in clock
Diffstat (limited to 'arch/arm/mach-exynos/mach-exynos5-dt.c')
-rw-r--r-- | arch/arm/mach-exynos/mach-exynos5-dt.c | 25 |
1 files changed, 24 insertions, 1 deletions
diff --git a/arch/arm/mach-exynos/mach-exynos5-dt.c b/arch/arm/mach-exynos/mach-exynos5-dt.c index 929de766d490..f038c8cadca4 100644 --- a/arch/arm/mach-exynos/mach-exynos5-dt.c +++ b/arch/arm/mach-exynos/mach-exynos5-dt.c @@ -13,11 +13,12 @@ #include <linux/of_fdt.h> #include <linux/serial_core.h> #include <linux/memblock.h> -#include <linux/of_fdt.h> +#include <linux/io.h> #include <asm/mach/arch.h> #include <asm/hardware/gic.h> #include <mach/map.h> +#include <mach/regs-pmu.h> #include <plat/cpu.h> #include <plat/regs-serial.h> @@ -124,6 +125,28 @@ static void __init exynos5_dt_map_io(void) static void __init exynos5_dt_machine_init(void) { + struct device_node *i2c_np; + const char *i2c_compat = "samsung,s3c2440-i2c"; + unsigned int tmp; + + /* + * Exynos5's legacy i2c controller and new high speed i2c + * controller have muxed interrupt sources. By default the + * interrupts for 4-channel HS-I2C controller are enabled. + * If node for first four channels of legacy i2c controller + * are available then re-configure the interrupts via the + * system register. + */ + for_each_compatible_node(i2c_np, NULL, i2c_compat) { + if (of_device_is_available(i2c_np)) { + if (of_alias_get_id(i2c_np, "i2c") < 4) { + tmp = readl(EXYNOS5_SYS_I2C_CFG); + writel(tmp & ~(0x1 << of_alias_get_id(i2c_np, "i2c")), + EXYNOS5_SYS_I2C_CFG); + } + } + } + if (of_machine_is_compatible("samsung,exynos5250")) of_platform_populate(NULL, of_default_bus_match_table, exynos5250_auxdata_lookup, NULL); |