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authorShawn Guo <shawn.guo@linaro.org>2011-11-16 17:19:11 +0100
committerKukjin Kim <kgene.kim@samsung.com>2011-11-17 01:18:53 +0100
commit63b870f149cdcd253ae8da88d8b5a0b43a68965c (patch)
treee95389973c299474d1c8191cac7bef82ab3c4561 /arch/arm/mach-exynos/pm.c
parentLinux 3.2-rc1 (diff)
downloadlinux-63b870f149cdcd253ae8da88d8b5a0b43a68965c.tar.xz
linux-63b870f149cdcd253ae8da88d8b5a0b43a68965c.zip
ARM: EXYNOS: remove exynos4_scu_enable()
The exynos4_scu_enable() is a duplication of scu_enable(). Since commit '26a527e ARM: 7100/1: smp_scu: remove __init annotation from scu_enable()' makes scu_enable() available for non-init codes, exynos can directly call scu_enable() and save exynos4_scu_enable() now. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> [kgene.kim@samsung.com: added missing header] Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/mach-exynos/pm.c')
-rw-r--r--arch/arm/mach-exynos/pm.c24
1 files changed, 2 insertions, 22 deletions
diff --git a/arch/arm/mach-exynos/pm.c b/arch/arm/mach-exynos/pm.c
index 509a435afd4b..4093fea849c3 100644
--- a/arch/arm/mach-exynos/pm.c
+++ b/arch/arm/mach-exynos/pm.c
@@ -23,6 +23,7 @@
#include <asm/cacheflush.h>
#include <asm/hardware/cache-l2x0.h>
+#include <asm/smp_scu.h>
#include <plat/cpu.h>
#include <plat/pm.h>
@@ -213,27 +214,6 @@ static int exynos4_pm_add(struct sys_device *sysdev)
return 0;
}
-/* This function copy from linux/arch/arm/kernel/smp_scu.c */
-
-void exynos4_scu_enable(void __iomem *scu_base)
-{
- u32 scu_ctrl;
-
- scu_ctrl = __raw_readl(scu_base);
- /* already enabled? */
- if (scu_ctrl & 1)
- return;
-
- scu_ctrl |= 1;
- __raw_writel(scu_ctrl, scu_base);
-
- /*
- * Ensure that the data accessed by CPU0 before the SCU was
- * initialised is visible to the other CPUs.
- */
- flush_cache_all();
-}
-
static unsigned long pll_base_rate;
static void exynos4_restore_pll(void)
@@ -402,7 +382,7 @@ static void exynos4_pm_resume(void)
exynos4_restore_pll();
- exynos4_scu_enable(S5P_VA_SCU);
+ scu_enable(S5P_VA_SCU);
#ifdef CONFIG_CACHE_L2X0
s3c_pm_do_restore_core(exynos4_l2cc_save, ARRAY_SIZE(exynos4_l2cc_save));