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| author | Kukjin Kim <kgene.kim@samsung.com> | 2011-11-06 05:54:56 +0100 |
|---|---|---|
| committer | Kukjin Kim <kgene.kim@samsung.com> | 2011-11-06 05:54:56 +0100 |
| commit | 830145796a5c8f1ca3f87ea619063c1d99a57df5 (patch) | |
| tree | e72a0ecacfcce228c46d93c946cfd65a44cc1fd3 /arch/arm/mach-exynos4/headsmp.S | |
| parent | ARM: EXYNOS4: convert MCT to percpu interrupt API (diff) | |
| download | linux-830145796a5c8f1ca3f87ea619063c1d99a57df5.tar.xz linux-830145796a5c8f1ca3f87ea619063c1d99a57df5.zip | |
ARM: EXYNOS: Add ARCH_EXYNOS and reorganize arch/arm/mach-exynos
The arch/arm/mach-exynos4 directory (CONFIG_ARCH_EXYNOS4) has
made for plaforms based on EXYNOS4 SoCs. But since upcoming
Samsung's SoCs such as EXYNOS5 (ARM Cortex A15) can reuse most
codes in current mach-exynos4, one mach-exynos directory will
be used for them.
This patch changes to CONFIG_ARCH_EXYNOS (arch/arm/mach-exynos)
but keeps original CONFIG_ARCH_EXYNOS4 in mach-exynos/Kconfig to
avoid changing in driver side.
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/mach-exynos4/headsmp.S')
| -rw-r--r-- | arch/arm/mach-exynos4/headsmp.S | 41 |
1 files changed, 0 insertions, 41 deletions
diff --git a/arch/arm/mach-exynos4/headsmp.S b/arch/arm/mach-exynos4/headsmp.S deleted file mode 100644 index 3cdeb3647542..000000000000 --- a/arch/arm/mach-exynos4/headsmp.S +++ /dev/null @@ -1,41 +0,0 @@ -/* - * linux/arch/arm/mach-exynos4/headsmp.S - * - * Cloned from linux/arch/arm/mach-realview/headsmp.S - * - * Copyright (c) 2003 ARM Limited - * All Rights Reserved - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#include <linux/linkage.h> -#include <linux/init.h> - - __CPUINIT - -/* - * exynos4 specific entry point for secondary CPUs. This provides - * a "holding pen" into which all secondary cores are held until we're - * ready for them to initialise. - */ -ENTRY(exynos4_secondary_startup) - mrc p15, 0, r0, c0, c0, 5 - and r0, r0, #15 - adr r4, 1f - ldmia r4, {r5, r6} - sub r4, r4, r5 - add r6, r6, r4 -pen: ldr r7, [r6] - cmp r7, r0 - bne pen - - /* - * we've been released from the holding pen: secondary_stack - * should now contain the SVC stack for this core - */ - b secondary_startup - -1: .long . - .long pen_release |