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authorRussell King <rmk+kernel@arm.linux.org.uk>2011-07-02 10:54:01 +0200
committerRussell King <rmk+kernel@arm.linux.org.uk>2011-07-02 10:54:01 +0200
commit29cb3cd208dd0e4471bb80bec4facc49ceb199fa (patch)
tree035128bf7af997d5e1e5208c900ba78c5a1df46d /arch/arm/mach-exynos4/pm.c
parentARM: pm: omap3: move saving of the auxiliary control registers to C (diff)
downloadlinux-29cb3cd208dd0e4471bb80bec4facc49ceb199fa.tar.xz
linux-29cb3cd208dd0e4471bb80bec4facc49ceb199fa.zip
ARM: pm: allow suspend finisher to return error codes
There are SoCs where attempting to enter a low power state is ignored, and the CPU continues executing instructions with all state preserved. It is over-complex at that point to disable the MMU just to call the resume path. Instead, allow the suspend finisher to return error codes to abort suspend in this circumstance, where the cpu_suspend internals will then unwind the saved state on the stack. Also omit the tlb flush as no changes to the page tables will have happened. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-exynos4/pm.c')
-rw-r--r--arch/arm/mach-exynos4/pm.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-exynos4/pm.c b/arch/arm/mach-exynos4/pm.c
index 5c01c6076645..533c28f758ca 100644
--- a/arch/arm/mach-exynos4/pm.c
+++ b/arch/arm/mach-exynos4/pm.c
@@ -280,7 +280,7 @@ static struct sleep_save exynos4_l2cc_save[] = {
SAVE_ITEM(S5P_VA_L2CC + L2X0_AUX_CTRL),
};
-void exynos4_cpu_suspend(unsigned long arg)
+static int exynos4_cpu_suspend(unsigned long arg)
{
unsigned long tmp;
unsigned long mask = 0xFFFFFFFF;