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author | Sascha Hauer <s.hauer@pengutronix.de> | 2011-08-08 08:22:41 +0200 |
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committer | Sascha Hauer <s.hauer@pengutronix.de> | 2011-08-08 08:22:41 +0200 |
commit | 1a43f2012455a977397deffe35912fd3f3ce17b9 (patch) | |
tree | 5189f337df44e7a495fbd097cd476b0380babd8c /arch/arm/mach-exynos4/setup-fimd0.c | |
parent | ARM: iMX5: Don't enable DPLL if it already enabled (diff) | |
parent | Linux 3.1-rc1 (diff) | |
download | linux-1a43f2012455a977397deffe35912fd3f3ce17b9.tar.xz linux-1a43f2012455a977397deffe35912fd3f3ce17b9.zip |
Merge commit 'v3.1-rc1' into imx-fixes
Diffstat (limited to 'arch/arm/mach-exynos4/setup-fimd0.c')
-rw-r--r-- | arch/arm/mach-exynos4/setup-fimd0.c | 43 |
1 files changed, 43 insertions, 0 deletions
diff --git a/arch/arm/mach-exynos4/setup-fimd0.c b/arch/arm/mach-exynos4/setup-fimd0.c new file mode 100644 index 000000000000..07a6dbeecdd0 --- /dev/null +++ b/arch/arm/mach-exynos4/setup-fimd0.c @@ -0,0 +1,43 @@ +/* linux/arch/arm/mach-exynos4/setup-fimd0.c + * + * Copyright (c) 2009-2011 Samsung Electronics Co., Ltd. + * http://www.samsung.com + * + * Base Exynos4 FIMD 0 configuration + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#include <linux/fb.h> +#include <linux/gpio.h> + +#include <plat/gpio-cfg.h> +#include <plat/regs-fb-v4.h> + +#include <mach/map.h> + +void exynos4_fimd0_gpio_setup_24bpp(void) +{ + unsigned int reg; + + s3c_gpio_cfgrange_nopull(EXYNOS4_GPF0(0), 8, S3C_GPIO_SFN(2)); + s3c_gpio_cfgrange_nopull(EXYNOS4_GPF1(0), 8, S3C_GPIO_SFN(2)); + s3c_gpio_cfgrange_nopull(EXYNOS4_GPF2(0), 8, S3C_GPIO_SFN(2)); + s3c_gpio_cfgrange_nopull(EXYNOS4_GPF3(0), 4, S3C_GPIO_SFN(2)); + + /* + * Set DISPLAY_CONTROL register for Display path selection. + * + * DISPLAY_CONTROL[1:0] + * --------------------- + * 00 | MIE + * 01 | MDINE + * 10 | FIMD : selected + * 11 | FIMD + */ + reg = __raw_readl(S3C_VA_SYS + 0x0210); + reg |= (1 << 1); + __raw_writel(reg, S3C_VA_SYS + 0x0210); +} |