diff options
| author | Linus Torvalds <torvalds@linux-foundation.org> | 2013-07-02 22:43:38 +0200 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2013-07-02 22:43:38 +0200 |
| commit | 3883cbb6c1bda013a3ce2dbdab7dc97c52e4a232 (patch) | |
| tree | 5b69f83b049d24ac81123ac954ca8c9128e48443 /arch/arm/mach-exynos | |
| parent | Merge tag 'cleanup-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/gi... (diff) | |
| parent | ARM: integrator: let pciv3 use mem/premem from device tree (diff) | |
| download | linux-3883cbb6c1bda013a3ce2dbdab7dc97c52e4a232.tar.xz linux-3883cbb6c1bda013a3ce2dbdab7dc97c52e4a232.zip | |
Merge tag 'soc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC specific changes from Arnd Bergmann:
"These changes are all to SoC-specific code, a total of 33 branches on
17 platforms were pulled into this. Like last time, Renesas sh-mobile
is now the platform with the most changes, followed by OMAP and
EXYNOS.
Two new platforms, TI Keystone and Rockchips RK3xxx are added in this
branch, both containing almost no platform specific code at all, since
they are using generic subsystem interfaces for clocks, pinctrl,
interrupts etc. The device drivers are getting merged through the
respective subsystem maintainer trees.
One more SoC (u300) is now multiplatform capable and several others
(shmobile, exynos, msm, integrator, kirkwood, clps711x) are moving
towards that goal with this series but need more work.
Also noteworthy is the work on PCI here, which is traditionally part
of the SoC specific code. With the changes done by Thomas Petazzoni,
we can now more easily have PCI host controller drivers as loadable
modules and keep them separate from the platform code in
drivers/pci/host. This has already led to the discovery that three
platforms (exynos, spear and imx) are actually using an identical PCIe
host controller and will be able to share a driver once support for
spear and imx is added."
* tag 'soc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (480 commits)
ARM: integrator: let pciv3 use mem/premem from device tree
ARM: integrator: set local side PCI addresses right
ARM: dts: Add pcie controller node for exynos5440-ssdk5440
ARM: dts: Add pcie controller node for Samsung EXYNOS5440 SoC
ARM: EXYNOS: Enable PCIe support for Exynos5440
pci: Add PCIe driver for Samsung Exynos
ARM: OMAP5: voltagedomain data: remove temporary OMAP4 voltage data
ARM: keystone: Move CPU bringup code to dedicated asm file
ARM: multiplatform: always pick one CPU type
ARM: imx: select syscon for IMX6SL
ARM: keystone: select ARM_ERRATA_798181 only for SMP
ARM: imx: Synertronixx scb9328 needs to select SOC_IMX1
ARM: OMAP2+: AM43x: resolve SMP related build error
dmaengine: edma: enable build for AM33XX
ARM: edma: Add EDMA crossbar event mux support
ARM: edma: Add DT and runtime PM support to the private EDMA API
dmaengine: edma: Add TI EDMA device tree binding
arm: add basic support for Rockchip RK3066a boards
arm: add debug uarts for rockchip rk29xx and rk3xxx series
arm: Add basic clocks for Rockchip rk3066a SoCs
...
Diffstat (limited to 'arch/arm/mach-exynos')
41 files changed, 41 insertions, 8230 deletions
diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig index ff18fc2ea46f..0ecd5af20545 100644 --- a/arch/arm/mach-exynos/Kconfig +++ b/arch/arm/mach-exynos/Kconfig @@ -14,9 +14,11 @@ menu "SAMSUNG EXYNOS SoCs Support" config ARCH_EXYNOS4 bool "SAMSUNG EXYNOS4" default y + select GIC_NON_BANKED select HAVE_ARM_SCU if SMP select HAVE_SMP select MIGHT_HAVE_CACHE_L2X0 + select PINCTRL help Samsung EXYNOS4 SoCs based systems @@ -24,6 +26,7 @@ config ARCH_EXYNOS5 bool "SAMSUNG EXYNOS5" select HAVE_ARM_SCU if SMP select HAVE_SMP + select PINCTRL help Samsung EXYNOS5 (Cortex-A15) SoC based systems @@ -34,6 +37,7 @@ config CPU_EXYNOS4210 default y depends on ARCH_EXYNOS4 select ARM_CPU_SUSPEND if PM + select PINCTRL_EXYNOS select PM_GENERIC_DOMAINS select S5P_PM if PM select S5P_SLEEP if PM @@ -45,6 +49,7 @@ config SOC_EXYNOS4212 bool "SAMSUNG EXYNOS4212" default y depends on ARCH_EXYNOS4 + select PINCTRL_EXYNOS select S5P_PM if PM select S5P_SLEEP if PM select SAMSUNG_DMADEV @@ -55,6 +60,7 @@ config SOC_EXYNOS4412 bool "SAMSUNG EXYNOS4412" default y depends on ARCH_EXYNOS4 + select PINCTRL_EXYNOS select SAMSUNG_DMADEV help Enable EXYNOS4412 SoC support @@ -63,6 +69,7 @@ config SOC_EXYNOS5250 bool "SAMSUNG EXYNOS5250" default y depends on ARCH_EXYNOS5 + select PINCTRL_EXYNOS select PM_GENERIC_DOMAINS if PM select S5P_PM if PM select S5P_SLEEP if PM @@ -78,345 +85,25 @@ config SOC_EXYNOS5440 select ARCH_HAS_OPP select ARM_ARCH_TIMER select AUTO_ZRELADDR - select PINCTRL + select MIGHT_HAVE_PCI + select PCI_DOMAINS if PCI select PINCTRL_EXYNOS5440 select PM_OPP help Enable EXYNOS5440 SoC support -config EXYNOS_ATAGS - bool "ATAGS based boot for EXYNOS (deprecated)" - depends on !ARCH_MULTIPLATFORM - depends on ATAGS - default y - help - The EXYNOS platform is moving towards being completely probed - through device tree. This enables support for board files using - the traditional ATAGS boot format. - Note that this option is not available for multiplatform builds. - -if EXYNOS_ATAGS - -config EXYNOS_DEV_DMA - bool - help - Compile in amba device definitions for DMA controller - -config EXYNOS4_DEV_AHCI - bool - help - Compile in platform device definitions for AHCI - -config EXYNOS4_SETUP_FIMD0 - bool - help - Common setup code for FIMD0. - -config EXYNOS4_DEV_USB_OHCI - bool - help - Compile in platform device definition for USB OHCI - -config EXYNOS4_SETUP_I2C1 - bool - help - Common setup code for i2c bus 1. - -config EXYNOS4_SETUP_I2C2 - bool - help - Common setup code for i2c bus 2. - -config EXYNOS4_SETUP_I2C3 - bool - help - Common setup code for i2c bus 3. - -config EXYNOS4_SETUP_I2C4 - bool - help - Common setup code for i2c bus 4. - -config EXYNOS4_SETUP_I2C5 - bool - help - Common setup code for i2c bus 5. - -config EXYNOS4_SETUP_I2C6 - bool - help - Common setup code for i2c bus 6. - -config EXYNOS4_SETUP_I2C7 - bool - help - Common setup code for i2c bus 7. - -config EXYNOS4_SETUP_KEYPAD - bool - help - Common setup code for keypad. - -config EXYNOS4_SETUP_SDHCI - bool - select EXYNOS4_SETUP_SDHCI_GPIO - help - Internal helper functions for EXYNOS4 based SDHCI systems. - -config EXYNOS4_SETUP_SDHCI_GPIO - bool - help - Common setup code for SDHCI gpio. - -config EXYNOS4_SETUP_FIMC - bool - help - Common setup code for the camera interfaces. - -config EXYNOS4_SETUP_USB_PHY - bool - help - Common setup code for USB PHY controller - -config EXYNOS_SETUP_SPI - bool - help - Common setup code for SPI GPIO configurations. - -# machine support - -if ARCH_EXYNOS4 - -comment "EXYNOS4210 Boards" - -config MACH_SMDKC210 - bool "SMDKC210" - select MACH_SMDKV310 - help - Machine support for Samsung SMDKC210 - -config MACH_SMDKV310 - bool "SMDKV310" - select CPU_EXYNOS4210 - select EXYNOS4_DEV_AHCI - select EXYNOS4_DEV_USB_OHCI - select EXYNOS4_SETUP_FIMD0 - select EXYNOS4_SETUP_I2C1 - select EXYNOS4_SETUP_KEYPAD - select EXYNOS4_SETUP_SDHCI - select EXYNOS4_SETUP_USB_PHY - select EXYNOS_DEV_DMA - select EXYNOS_DEV_SYSMMU - select S3C24XX_PWM - select S3C_DEV_HSMMC - select S3C_DEV_HSMMC1 - select S3C_DEV_HSMMC2 - select S3C_DEV_HSMMC3 - select S3C_DEV_I2C1 - select S3C_DEV_RTC - select S3C_DEV_USB_HSOTG - select S3C_DEV_WDT - select S5P_DEV_FIMC0 - select S5P_DEV_FIMC1 - select S5P_DEV_FIMC2 - select S5P_DEV_FIMC3 - select S5P_DEV_FIMD0 - select S5P_DEV_G2D - select S5P_DEV_I2C_HDMIPHY - select S5P_DEV_JPEG - select S5P_DEV_MFC - select S5P_DEV_TV - select S5P_DEV_USB_EHCI - select SAMSUNG_DEV_BACKLIGHT - select SAMSUNG_DEV_KEYPAD - select SAMSUNG_DEV_PWM - help - Machine support for Samsung SMDKV310 - -config MACH_ARMLEX4210 - bool "ARMLEX4210" - select CPU_EXYNOS4210 - select EXYNOS4_DEV_AHCI - select EXYNOS4_SETUP_SDHCI - select EXYNOS_DEV_DMA - select S3C_DEV_HSMMC - select S3C_DEV_HSMMC2 - select S3C_DEV_HSMMC3 - select S3C_DEV_RTC - select S3C_DEV_WDT - help - Machine support for Samsung ARMLEX4210 based on EXYNOS4210 - -config MACH_UNIVERSAL_C210 - bool "Mobile UNIVERSAL_C210 Board" - select CLKSRC_MMIO - select CLKSRC_SAMSUNG_PWM - select CPU_EXYNOS4210 - select EXYNOS4_SETUP_FIMC - select EXYNOS4_SETUP_FIMD0 - select EXYNOS4_SETUP_I2C1 - select EXYNOS4_SETUP_I2C3 - select EXYNOS4_SETUP_I2C5 - select EXYNOS4_SETUP_SDHCI - select EXYNOS4_SETUP_USB_PHY - select EXYNOS_DEV_DMA - select EXYNOS_DEV_SYSMMU - select S3C_DEV_HSMMC - select S3C_DEV_HSMMC2 - select S3C_DEV_HSMMC3 - select S3C_DEV_I2C1 - select S3C_DEV_I2C3 - select S3C_DEV_I2C5 - select S3C_DEV_USB_HSOTG - select S5P_DEV_CSIS0 - select S5P_DEV_FIMC0 - select S5P_DEV_FIMC1 - select S5P_DEV_FIMC2 - select S5P_DEV_FIMC3 - select S5P_DEV_FIMD0 - select S5P_DEV_G2D - select S5P_DEV_I2C_HDMIPHY - select S5P_DEV_JPEG - select S5P_DEV_MFC - select S5P_DEV_ONENAND - select S5P_DEV_TV - select S5P_GPIO_INT - select S5P_SETUP_MIPIPHY - help - Machine support for Samsung Mobile Universal S5PC210 Reference - Board. - -config MACH_NURI - bool "Mobile NURI Board" - select CPU_EXYNOS4210 - select EXYNOS4_SETUP_FIMC - select EXYNOS4_SETUP_FIMD0 - select EXYNOS4_SETUP_I2C1 - select EXYNOS4_SETUP_I2C3 - select EXYNOS4_SETUP_I2C5 - select EXYNOS4_SETUP_I2C6 - select EXYNOS4_SETUP_SDHCI - select EXYNOS4_SETUP_USB_PHY - select EXYNOS_DEV_DMA - select S3C_DEV_HSMMC - select S3C_DEV_HSMMC2 - select S3C_DEV_HSMMC3 - select S3C_DEV_I2C1 - select S3C_DEV_I2C3 - select S3C_DEV_I2C5 - select S3C_DEV_I2C6 - select S3C_DEV_RTC - select S3C_DEV_USB_HSOTG - select S3C_DEV_WDT - select S5P_DEV_CSIS0 - select S5P_DEV_FIMC0 - select S5P_DEV_FIMC1 - select S5P_DEV_FIMC2 - select S5P_DEV_FIMC3 - select S5P_DEV_FIMD0 - select S5P_DEV_G2D - select S5P_DEV_JPEG - select S5P_DEV_MFC - select S5P_DEV_USB_EHCI - select S5P_GPIO_INT - select S5P_SETUP_MIPIPHY - select SAMSUNG_DEV_ADC - select SAMSUNG_DEV_PWM - help - Machine support for Samsung Mobile NURI Board. - -config MACH_ORIGEN - bool "ORIGEN" - select CPU_EXYNOS4210 - select EXYNOS4_DEV_USB_OHCI - select EXYNOS4_SETUP_FIMD0 - select EXYNOS4_SETUP_SDHCI - select EXYNOS4_SETUP_USB_PHY - select EXYNOS_DEV_DMA - select EXYNOS_DEV_SYSMMU - select S3C24XX_PWM - select S3C_DEV_HSMMC - select S3C_DEV_HSMMC2 - select S3C_DEV_RTC - select S3C_DEV_USB_HSOTG - select S3C_DEV_WDT - select S5P_DEV_FIMC0 - select S5P_DEV_FIMC1 - select S5P_DEV_FIMC2 - select S5P_DEV_FIMC3 - select S5P_DEV_FIMD0 - select S5P_DEV_G2D - select S5P_DEV_I2C_HDMIPHY - select S5P_DEV_JPEG - select S5P_DEV_MFC - select S5P_DEV_TV - select S5P_DEV_USB_EHCI - select SAMSUNG_DEV_BACKLIGHT - select SAMSUNG_DEV_PWM - help - Machine support for ORIGEN based on Samsung EXYNOS4210 - -comment "EXYNOS4212 Boards" - -config MACH_SMDK4212 - bool "SMDK4212" - select EXYNOS4_SETUP_FIMD0 - select EXYNOS4_SETUP_I2C1 - select EXYNOS4_SETUP_I2C3 - select EXYNOS4_SETUP_I2C7 - select EXYNOS4_SETUP_KEYPAD - select EXYNOS4_SETUP_SDHCI - select EXYNOS4_SETUP_USB_PHY - select EXYNOS_DEV_DMA - select EXYNOS_DEV_SYSMMU - select S3C24XX_PWM - select S3C_DEV_HSMMC2 - select S3C_DEV_HSMMC3 - select S3C_DEV_I2C1 - select S3C_DEV_I2C3 - select S3C_DEV_I2C7 - select S3C_DEV_RTC - select S3C_DEV_USB_HSOTG - select S3C_DEV_WDT - select S5P_DEV_FIMC0 - select S5P_DEV_FIMC1 - select S5P_DEV_FIMC2 - select S5P_DEV_FIMC3 - select S5P_DEV_FIMD0 - select S5P_DEV_MFC - select SAMSUNG_DEV_BACKLIGHT - select SAMSUNG_DEV_KEYPAD - select SAMSUNG_DEV_PWM - select SOC_EXYNOS4212 - help - Machine support for Samsung SMDK4212 - -comment "EXYNOS4412 Boards" - -config MACH_SMDK4412 - bool "SMDK4412" - select MACH_SMDK4212 - select SOC_EXYNOS4412 - help - Machine support for Samsung SMDK4412 -endif - -endif - comment "Flattened Device Tree based board for EXYNOS SoCs" config MACH_EXYNOS4_DT bool "Samsung Exynos4 Machine using device tree" + default y depends on ARCH_EXYNOS4 select ARM_AMBA select CLKSRC_OF select CLKSRC_SAMSUNG_PWM if CPU_EXYNOS4210 select CPU_EXYNOS4210 select KEYBOARD_SAMSUNG if INPUT_KEYBOARD - select PINCTRL - select PINCTRL_EXYNOS select S5P_DEV_MFC - select USE_OF help Machine support for Samsung Exynos4 machine with device tree enabled. Select this if a fdt blob is available for the Exynos4 SoC based board. @@ -429,28 +116,11 @@ config MACH_EXYNOS5_DT depends on ARCH_EXYNOS5 select ARM_AMBA select CLKSRC_OF - select USE_OF + select USB_ARCH_HAS_XHCI help Machine support for Samsung EXYNOS5 machine with device tree enabled. Select this if a fdt blob is available for the EXYNOS5 SoC based board. -if ARCH_EXYNOS4 - -comment "Configuration for HSMMC 8-bit bus width" - -config EXYNOS4_SDHCI_CH0_8BIT - bool "Channel 0 with 8-bit bus" - help - Support HSMMC Channel 0 8-bit bus. - If selected, Channel 1 is disabled. - -config EXYNOS4_SDHCI_CH2_8BIT - bool "Channel 2 with 8-bit bus" - help - Support HSMMC Channel 2 8-bit bus. - If selected, Channel 3 is disabled. -endif - endmenu endif diff --git a/arch/arm/mach-exynos/Makefile b/arch/arm/mach-exynos/Makefile index b09b027178f3..e970a7a4e278 100644 --- a/arch/arm/mach-exynos/Makefile +++ b/arch/arm/mach-exynos/Makefile @@ -32,38 +32,5 @@ AFLAGS_exynos-smc.o :=-Wa,-march=armv7-a$(plus_sec) # machine support -obj-$(CONFIG_MACH_SMDKC210) += mach-smdkv310.o -obj-$(CONFIG_MACH_SMDKV310) += mach-smdkv310.o -obj-$(CONFIG_MACH_ARMLEX4210) += mach-armlex4210.o -obj-$(CONFIG_MACH_UNIVERSAL_C210) += mach-universal_c210.o -obj-$(CONFIG_MACH_NURI) += mach-nuri.o -obj-$(CONFIG_MACH_ORIGEN) += mach-origen.o - -obj-$(CONFIG_MACH_SMDK4212) += mach-smdk4x12.o -obj-$(CONFIG_MACH_SMDK4412) += mach-smdk4x12.o - obj-$(CONFIG_MACH_EXYNOS4_DT) += mach-exynos4-dt.o obj-$(CONFIG_MACH_EXYNOS5_DT) += mach-exynos5-dt.o - -# device support - -obj-y += dev-uart.o -obj-$(CONFIG_ARCH_EXYNOS4) += dev-audio.o -obj-$(CONFIG_EXYNOS4_DEV_AHCI) += dev-ahci.o -obj-$(CONFIG_EXYNOS_DEV_DMA) += dma.o -obj-$(CONFIG_EXYNOS4_DEV_USB_OHCI) += dev-ohci.o - -obj-$(CONFIG_ARCH_EXYNOS) += setup-i2c0.o -obj-$(CONFIG_EXYNOS4_SETUP_FIMC) += setup-fimc.o -obj-$(CONFIG_EXYNOS4_SETUP_FIMD0) += setup-fimd0.o -obj-$(CONFIG_EXYNOS4_SETUP_I2C1) += setup-i2c1.o -obj-$(CONFIG_EXYNOS4_SETUP_I2C2) += setup-i2c2.o -obj-$(CONFIG_EXYNOS4_SETUP_I2C3) += setup-i2c3.o -obj-$(CONFIG_EXYNOS4_SETUP_I2C4) += setup-i2c4.o -obj-$(CONFIG_EXYNOS4_SETUP_I2C5) += setup-i2c5.o -obj-$(CONFIG_EXYNOS4_SETUP_I2C6) += setup-i2c6.o -obj-$(CONFIG_EXYNOS4_SETUP_I2C7) += setup-i2c7.o -obj-$(CONFIG_EXYNOS4_SETUP_KEYPAD) += setup-keypad.o -obj-$(CONFIG_EXYNOS4_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o -obj-$(CONFIG_EXYNOS4_SETUP_USB_PHY) += setup-usb-phy.o -obj-$(CONFIG_EXYNOS_SETUP_SPI) += setup-spi.o diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c index f7e504b7874d..81e6320ca091 100644 --- a/arch/arm/mach-exynos/common.c +++ b/arch/arm/mach-exynos/common.c @@ -40,20 +40,9 @@ #include <mach/regs-irq.h> #include <mach/regs-pmu.h> -#include <mach/regs-gpio.h> -#include <mach/irqs.h> #include <plat/cpu.h> -#include <plat/devs.h> #include <plat/pm.h> -#include <plat/sdhci.h> -#include <plat/gpio-cfg.h> -#include <plat/adc-core.h> -#include <plat/fb-core.h> -#include <plat/fimc-core.h> -#include <plat/iic-core.h> -#include <plat/tv-core.h> -#include <plat/spi-core.h> #include <plat/regs-serial.h> #include "common.h" @@ -69,31 +58,25 @@ static const char name_exynos5440[] = "EXYNOS5440"; static void exynos4_map_io(void); static void exynos5_map_io(void); static void exynos5440_map_io(void); -static void exynos4_init_uarts(struct s3c2410_uartcfg *cfg, int no); static int exynos_init(void); -unsigned long xxti_f = 0, xusbxti_f = 0; - static struct cpu_table cpu_ids[] __initdata = { { .idcode = EXYNOS4210_CPU_ID, .idmask = EXYNOS4_CPU_MASK, .map_io = exynos4_map_io, - .init_uarts = exynos4_init_uarts, .init = exynos_init, .name = name_exynos4210, }, { .idcode = EXYNOS4212_CPU_ID, .idmask = EXYNOS4_CPU_MASK, .map_io = exynos4_map_io, - .init_uarts = exynos4_init_uarts, .init = exynos_init, .name = name_exynos4212, }, { .idcode = EXYNOS4412_CPU_ID, .idmask = EXYNOS4_CPU_MASK, .map_io = exynos4_map_io, - .init_uarts = exynos4_init_uarts, .init = exynos_init, .name = name_exynos4412, }, { @@ -113,15 +96,6 @@ static struct cpu_table cpu_ids[] __initdata = { /* Initial IO mappings */ -static struct map_desc exynos_iodesc[] __initdata = { - { - .virtual = (unsigned long)S5P_VA_CHIPID, - .pfn = __phys_to_pfn(EXYNOS_PA_CHIPID), - .length = SZ_4K, - .type = MT_DEVICE, - }, -}; - static struct map_desc exynos4_iodesc[] __initdata = { { .virtual = (unsigned long)S3C_VA_SYS, @@ -304,13 +278,6 @@ static struct map_desc exynos5440_iodesc0[] __initdata = { }, }; -static struct samsung_pwm_variant exynos4_pwm_variant = { - .bits = 32, - .div_base = 0, - .has_tint_cstat = true, - .tclk_mask = 0, -}; - void exynos4_restart(char mode, const char *cmd) { __raw_writel(0x1, S5P_SWRESET); @@ -353,8 +320,7 @@ void __init exynos_init_late(void) exynos_pm_late_initcall(); } -#ifdef CONFIG_OF -int __init exynos_fdt_map_chipid(unsigned long node, const char *uname, +static int __init exynos_fdt_map_chipid(unsigned long node, const char *uname, int depth, void *data) { struct map_desc iodesc; @@ -376,7 +342,6 @@ int __init exynos_fdt_map_chipid(unsigned long node, const char *uname, iotable_init(&iodesc, 1); return 1; } -#endif /* * exynos_map_io @@ -384,19 +349,11 @@ int __init exynos_fdt_map_chipid(unsigned long node, const char *uname, * register the standard cpu IO areas */ -void __init exynos_init_io(struct map_desc *mach_desc, int size) +void __init exynos_init_io(void) { debug_ll_io_init(); -#ifdef CONFIG_OF - if (initial_boot_params) - of_scan_flat_dt(exynos_fdt_map_chipid, NULL); - else -#endif - iotable_init(exynos_iodesc, ARRAY_SIZE(exynos_iodesc)); - - if (mach_desc) - iotable_init(mach_desc, size); + of_scan_flat_dt(exynos_fdt_map_chipid, NULL); /* detect cpu id and rev. */ s5p_init_cpu(S5P_VA_CHIPID); @@ -417,34 +374,6 @@ static void __init exynos4_map_io(void) iotable_init(exynos4210_iodesc, ARRAY_SIZE(exynos4210_iodesc)); if (soc_is_exynos4212() || soc_is_exynos4412()) iotable_init(exynos4x12_iodesc, ARRAY_SIZE(exynos4x12_iodesc)); - - /* initialize device information early */ - exynos4_default_sdhci0(); - exynos4_default_sdhci1(); - exynos4_default_sdhci2(); - exynos4_default_sdhci3(); - - s3c_adc_setname("samsung-adc-v3"); - - s3c_fimc_setname(0, "exynos4-fimc"); - s3c_fimc_setname(1, "exynos4-fimc"); - s3c_fimc_setname(2, "exynos4-fimc"); - s3c_fimc_setname(3, "exynos4-fimc"); - - s3c_sdhci_setname(0, "exynos4-sdhci"); - s3c_sdhci_setname(1, "exynos4-sdhci"); - s3c_sdhci_setname(2, "exynos4-sdhci"); - s3c_sdhci_setname(3, "exynos4-sdhci"); - - /* The I2C bus controllers are directly compatible with s3c2440 */ - s3c_i2c0_setname("s3c2440-i2c"); - s3c_i2c1_setname("s3c2440-i2c"); - s3c_i2c2_setname("s3c2440-i2c"); - - s5p_fb_setname(0, "exynos4-fb"); - s5p_hdmi_setname("exynos4-hdmi"); - - s3c64xx_spi_setname("exynos4210-spi"); } static void __init exynos5_map_io(void) @@ -460,81 +389,10 @@ static void __init exynos5440_map_io(void) iotable_init(exynos5440_iodesc0, ARRAY_SIZE(exynos5440_iodesc0)); } -void __init exynos_set_timer_source(u8 channels) -{ - exynos4_pwm_variant.output_mask = BIT(SAMSUNG_PWM_NUM) - 1; - exynos4_pwm_variant.output_mask &= ~channels; -} - void __init exynos_init_time(void) { - unsigned int timer_irqs[SAMSUNG_PWM_NUM] = { - EXYNOS4_IRQ_TIMER0_VIC, EXYNOS4_IRQ_TIMER1_VIC, - EXYNOS4_IRQ_TIMER2_VIC, EXYNOS4_IRQ_TIMER3_VIC, - EXYNOS4_IRQ_TIMER4_VIC, - }; - - if (of_have_populated_dt()) { -#ifdef CONFIG_OF - of_clk_init(NULL); - clocksource_of_init(); -#endif - } else { - /* todo: remove after migrating legacy E4 platforms to dt */ -#ifdef CONFIG_ARCH_EXYNOS4 - exynos4_clk_init(NULL, !soc_is_exynos4210(), S5P_VA_CMU, readl(S5P_VA_CHIPID + 8) & 1); - exynos4_clk_register_fixed_ext(xxti_f, xusbxti_f); -#endif -#ifdef CONFIG_CLKSRC_SAMSUNG_PWM - if (soc_is_exynos4210() && samsung_rev() == EXYNOS4210_REV_0) - samsung_pwm_clocksource_init(S3C_VA_TIMER, - timer_irqs, &exynos4_pwm_variant); - else -#endif - mct_init(S5P_VA_SYSTIMER, EXYNOS4_IRQ_MCT_G0, - EXYNOS4_IRQ_MCT_L0, EXYNOS4_IRQ_MCT_L1); - } -} - -static unsigned int max_combiner_nr(void) -{ - if (soc_is_exynos5250()) - return EXYNOS5_MAX_COMBINER_NR; - else if (soc_is_exynos4412()) - return EXYNOS4412_MAX_COMBINER_NR; - else if (soc_is_exynos4212()) - return EXYNOS4212_MAX_COMBINER_NR; - else - return EXYNOS4210_MAX_COMBINER_NR; -} - - -void __init exynos4_init_irq(void) -{ - unsigned int gic_bank_offset; - - gic_bank_offset = soc_is_exynos4412() ? 0x4000 : 0x8000; - - if (!of_have_populated_dt()) - gic_init_bases(0, IRQ_PPI(0), S5P_VA_GIC_DIST, S5P_VA_GIC_CPU, gic_bank_offset, NULL); -#ifdef CONFIG_OF - else - irqchip_init(); -#endif - - if (!of_have_populated_dt()) - combiner_init(S5P_VA_COMBINER_BASE, NULL, - max_combiner_nr(), COMBINER_IRQ(0, 0)); - - gic_arch_extn.irq_set_wake = s3c_irq_wake; -} - -void __init exynos5_init_irq(void) -{ -#ifdef CONFIG_OF - irqchip_init(); -#endif - gic_arch_extn.irq_set_wake = s3c_irq_wake; + of_clk_init(NULL); + clocksource_of_init(); } struct bus_type exynos_subsys = { @@ -552,59 +410,19 @@ static int __init exynos_core_init(void) } core_initcall(exynos_core_init); -#ifdef CONFIG_CACHE_L2X0 static int __init exynos4_l2x0_cache_init(void) { int ret; - if (soc_is_exynos5250() || soc_is_exynos5440()) - return 0; - ret = l2x0_of_init(L2_AUX_VAL, L2_AUX_MASK); - if (!ret) { - l2x0_regs_phys = virt_to_phys(&l2x0_saved_regs); - clean_dcache_area(&l2x0_regs_phys, sizeof(unsigned long)); - return 0; - } - - if (!(__raw_readl(S5P_VA_L2CC + L2X0_CTRL) & 0x1)) { - l2x0_saved_regs.phy_base = EXYNOS4_PA_L2CC; - /* TAG, Data Latency Control: 2 cycles */ - l2x0_saved_regs.tag_latency = 0x110; - - if (soc_is_exynos4212() || soc_is_exynos4412()) - l2x0_saved_regs.data_latency = 0x120; - else - l2x0_saved_regs.data_latency = 0x110; - - l2x0_saved_regs.prefetch_ctrl = 0x30000007; - l2x0_saved_regs.pwr_ctrl = - (L2X0_DYNAMIC_CLK_GATING_EN | L2X0_STNDBY_MODE_EN); - - l2x0_regs_phys = virt_to_phys(&l2x0_saved_regs); + if (ret) + return ret; - __raw_writel(l2x0_saved_regs.tag_latency, - S5P_VA_L2CC + L2X0_TAG_LATENCY_CTRL); - __raw_writel(l2x0_saved_regs.data_latency, - S5P_VA_L2CC + L2X0_DATA_LATENCY_CTRL); - - /* L2X0 Prefetch Control */ - __raw_writel(l2x0_saved_regs.prefetch_ctrl, - S5P_VA_L2CC + L2X0_PREFETCH_CTRL); - - /* L2X0 Power Control */ - __raw_writel(l2x0_saved_regs.pwr_ctrl, - S5P_VA_L2CC + L2X0_POWER_CTRL); - - clean_dcache_area(&l2x0_regs_phys, sizeof(unsigned long)); - clean_dcache_area(&l2x0_saved_regs, sizeof(struct l2x0_regs)); - } - - l2x0_init(S5P_VA_L2CC, L2_AUX_VAL, L2_AUX_MASK); + l2x0_regs_phys = virt_to_phys(&l2x0_saved_regs); + clean_dcache_area(&l2x0_regs_phys, sizeof(unsigned long)); return 0; } early_initcall(exynos4_l2x0_cache_init); -#endif static int __init exynos_init(void) { @@ -612,350 +430,3 @@ static int __init exynos_init(void) return device_register(&exynos4_dev); } - -/* uart registration process */ - -static void __init exynos4_init_uarts(struct s3c2410_uartcfg *cfg, int no) -{ - struct s3c2410_uartcfg *tcfg = cfg; - u32 ucnt; - - for (ucnt = 0; ucnt < no; ucnt++, tcfg++) - tcfg->has_fracval = 1; - - s3c24xx_init_uartdevs("exynos4210-uart", exynos4_uart_resources, cfg, no); -} - -static void __iomem *exynos_eint_base; - -static DEFINE_SPINLOCK(eint_lock); - -static unsigned int eint0_15_data[16]; - -static inline int exynos4_irq_to_gpio(unsigned int irq) -{ - if (irq < IRQ_EINT(0)) - return -EINVAL; - - irq -= IRQ_EINT(0); - if (irq < 8) - return EXYNOS4_GPX0(irq); - - irq -= 8; - if (irq < 8) - return EXYNOS4_GPX1(irq); - - irq -= 8; - if (irq < 8) - return EXYNOS4_GPX2(irq); - - irq -= 8; - if (irq < 8) - return EXYNOS4_GPX3(irq); - - return -EINVAL; -} - -static inline int exynos5_irq_to_gpio(unsigned int irq) -{ - if (irq < IRQ_EINT(0)) - return -EINVAL; - - irq -= IRQ_EINT(0); - if (irq < 8) - return EXYNOS5_GPX0(irq); - - irq -= 8; - if (irq < 8) - return EXYNOS5_GPX1(irq); - - irq -= 8; - if (irq < 8) - return EXYNOS5_GPX2(irq); - - irq -= 8; - if (irq < 8) - return EXYNOS5_GPX3(irq); - - return -EINVAL; -} - -static unsigned int exynos4_eint0_15_src_int[16] = { - EXYNOS4_IRQ_EINT0, - EXYNOS4_IRQ_EINT1, - EXYNOS4_IRQ_EINT2, - EXYNOS4_IRQ_EINT3, - EXYNOS4_IRQ_EINT4, - EXYNOS4_IRQ_EINT5, - EXYNOS4_IRQ_EINT6, - EXYNOS4_IRQ_EINT7, - EXYNOS4_IRQ_EINT8, - EXYNOS4_IRQ_EINT9, - EXYNOS4_IRQ_EINT10, - EXYNOS4_IRQ_EINT11, - EXYNOS4_IRQ_EINT12, - EXYNOS4_IRQ_EINT13, - EXYNOS4_IRQ_EINT14, - EXYNOS4_IRQ_EINT15, -}; - -static unsigned int exynos5_eint0_15_src_int[16] = { - EXYNOS5_IRQ_EINT0, - EXYNOS5_IRQ_EINT1, - EXYNOS5_IRQ_EINT2, - EXYNOS5_IRQ_EINT3, - EXYNOS5_IRQ_EINT4, - EXYNOS5_IRQ_EINT5, - EXYNOS5_IRQ_EINT6, - EXYNOS5_IRQ_EINT7, - EXYNOS5_IRQ_EINT8, - EXYNOS5_IRQ_EINT9, - EXYNOS5_IRQ_EINT10, - EXYNOS5_IRQ_EINT11, - EXYNOS5_IRQ_EINT12, - EXYNOS5_IRQ_EINT13, - EXYNOS5_IRQ_EINT14, - EXYNOS5_IRQ_EINT15, -}; -static inline void exynos_irq_eint_mask(struct irq_data *data) -{ - u32 mask; - - spin_lock(&eint_lock); - mask = __raw_readl(EINT_MASK(exynos_eint_base, data->irq)); - mask |= EINT_OFFSET_BIT(data->irq); - __raw_writel(mask, EINT_MASK(exynos_eint_base, data->irq)); - spin_unlock(&eint_lock); -} - -static void exynos_irq_eint_unmask(struct irq_data *data) -{ - u32 mask; - - spin_lock(&eint_lock); - mask = __raw_readl(EINT_MASK(exynos_eint_base, data->irq)); - mask &= ~(EINT_OFFSET_BIT(data->irq)); - __raw_writel(mask, EINT_MASK(exynos_eint_base, data->irq)); - spin_unlock(&eint_lock); -} - -static inline void exynos_irq_eint_ack(struct irq_data *data) -{ - __raw_writel(EINT_OFFSET_BIT(data->irq), - EINT_PEND(exynos_eint_base, data->irq)); -} - -static void exynos_irq_eint_maskack(struct irq_data *data) -{ - exynos_irq_eint_mask(data); - exynos_irq_eint_ack(data); -} - -static int exynos_irq_eint_set_type(struct irq_data *data, unsigned int type) -{ - int offs = EINT_OFFSET(data->irq); - int shift; - u32 ctrl, mask; - u32 newvalue = 0; - - switch (type) { - case IRQ_TYPE_EDGE_RISING: - newvalue = S5P_IRQ_TYPE_EDGE_RISING; - break; - - case IRQ_TYPE_EDGE_FALLING: - newvalue = S5P_IRQ_TYPE_EDGE_FALLING; - break; - - case IRQ_TYPE_EDGE_BOTH: - newvalue = S5P_IRQ_TYPE_EDGE_BOTH; - break; - - case IRQ_TYPE_LEVEL_LOW: - newvalue = S5P_IRQ_TYPE_LEVEL_LOW; - break; - - case IRQ_TYPE_LEVEL_HIGH: - newvalue = S5P_IRQ_TYPE_LEVEL_HIGH; - break; - - default: - printk(KERN_ERR "No such irq type %d", type); - return -EINVAL; - } - - shift = (offs & 0x7) * 4; - mask = 0x7 << shift; - - spin_lock(&eint_lock); - ctrl = __raw_readl(EINT_CON(exynos_eint_base, data->irq)); - ctrl &= ~mask; - ctrl |= newvalue << shift; - __raw_writel(ctrl, EINT_CON(exynos_eint_base, data->irq)); - spin_unlock(&eint_lock); - - if (soc_is_exynos5250()) - s3c_gpio_cfgpin(exynos5_irq_to_gpio(data->irq), S3C_GPIO_SFN(0xf)); - else - s3c_gpio_cfgpin(exynos4_irq_to_gpio(data->irq), S3C_GPIO_SFN(0xf)); - - return 0; -} - -static struct irq_chip exynos_irq_eint = { - .name = "exynos-eint", - .irq_mask = exynos_irq_eint_mask, - .irq_unmask = exynos_irq_eint_unmask, - .irq_mask_ack = exynos_irq_eint_maskack, - .irq_ack = exynos_irq_eint_ack, - .irq_set_type = exynos_irq_eint_set_type, -#ifdef CONFIG_PM - .irq_set_wake = s3c_irqext_wake, -#endif -}; - -/* - * exynos4_irq_demux_eint - * - * This function demuxes the IRQ from from EINTs 16 to 31. - * It is designed to be inlined into the specific handler - * s5p_irq_demux_eintX_Y. - * - * Each EINT pend/mask registers handle eight of them. - */ -static inline void exynos_irq_demux_eint(unsigned int start) -{ - unsigned int irq; - - u32 status = __raw_readl(EINT_PEND(exynos_eint_base, start)); - u32 mask = __raw_readl(EINT_MASK(exynos_eint_base, start)); - - status &= ~mask; - status &= 0xff; - - while (status) { - irq = fls(status) - 1; - generic_handle_irq(irq + start); - status &= ~(1 << irq); - } -} - -static void exynos_irq_demux_eint16_31(unsigned int irq, struct irq_desc *desc) -{ - struct irq_chip *chip = irq_get_chip(irq); - chained_irq_enter(chip, desc); - exynos_irq_demux_eint(IRQ_EINT(16)); - exynos_irq_demux_eint(IRQ_EINT(24)); - chained_irq_exit(chip, desc); -} - -static void exynos_irq_eint0_15(unsigned int irq, struct irq_desc *desc) -{ - u32 *irq_data = irq_get_handler_data(irq); - struct irq_chip *chip = irq_get_chip(irq); - - chained_irq_enter(chip, desc); - generic_handle_irq(*irq_data); - chained_irq_exit(chip, desc); -} - -static int __init exynos_init_irq_eint(void) -{ - int irq; - -#ifdef CONFIG_PINCTRL_SAMSUNG - /* - * The Samsung pinctrl driver provides an integrated gpio/pinmux/pinconf - * functionality along with support for external gpio and wakeup - * interrupts. If the samsung pinctrl driver is enabled and includes - * the wakeup interrupt support, then the setting up external wakeup - * interrupts here can be skipped. This check here is temporary to - * allow exynos4 platforms that do not use Samsung pinctrl driver to - * co-exist with platforms that do. When all of the Samsung Exynos4 - * platforms switch over to using the pinctrl driver, the wakeup - * interrupt support code here can be completely removed. - */ - static const struct of_device_id exynos_pinctrl_ids[] = { - { .compatible = "samsung,exynos4210-pinctrl", }, - { .compatible = "samsung,exynos4x12-pinctrl", }, - { .compatible = "samsung,exynos5250-pinctrl", }, - }; - struct device_node *pctrl_np, *wkup_np; - const char *wkup_compat = "samsung,exynos4210-wakeup-eint"; - - for_each_matching_node(pctrl_np, exynos_pinctrl_ids) { - if (of_device_is_available(pctrl_np)) { - wkup_np = of_find_compatible_node(pctrl_np, NULL, - wkup_compat); - if (wkup_np) - return -ENODEV; - } - } -#endif - if (soc_is_exynos5440()) - return 0; - - if (soc_is_exynos5250()) - exynos_eint_base = ioremap(EXYNOS5_PA_GPIO1, SZ_4K); - else - exynos_eint_base = ioremap(EXYNOS4_PA_GPIO2, SZ_4K); - - if (exynos_eint_base == NULL) { - pr_err("unable to ioremap for EINT base address\n"); - return -ENOMEM; - } - - for (irq = 0 ; irq <= 31 ; irq++) { - irq_set_chip_and_handler(IRQ_EINT(irq), &exynos_irq_eint, - handle_level_irq); - set_irq_flags(IRQ_EINT(irq), IRQF_VALID); - } - - irq_set_chained_handler(EXYNOS_IRQ_EINT16_31, exynos_irq_demux_eint16_31); - - for (irq = 0 ; irq <= 15 ; irq++) { - eint0_15_data[irq] = IRQ_EINT(irq); - - if (soc_is_exynos5250()) { - irq_set_handler_data(exynos5_eint0_15_src_int[irq], - &eint0_15_data[irq]); - irq_set_chained_handler(exynos5_eint0_15_src_int[irq], - exynos_irq_eint0_15); - } else { - irq_set_handler_data(exynos4_eint0_15_src_int[irq], - &eint0_15_data[irq]); - irq_set_chained_handler(exynos4_eint0_15_src_int[irq], - exynos_irq_eint0_15); - } - } - - return 0; -} -arch_initcall(exynos_init_irq_eint); - -static struct resource exynos4_pmu_resource[] = { - DEFINE_RES_IRQ(EXYNOS4_IRQ_PMU), - DEFINE_RES_IRQ(EXYNOS4_IRQ_PMU_CPU1), -#if defined(CONFIG_SOC_EXYNOS4412) - DEFINE_RES_IRQ(EXYNOS4_IRQ_PMU_CPU2), - DEFINE_RES_IRQ(EXYNOS4_IRQ_PMU_CPU3), -#endif -}; - -static struct platform_device exynos4_device_pmu = { - .name = "arm-pmu", - .num_resources = ARRAY_SIZE(exynos4_pmu_resource), - .resource = exynos4_pmu_resource, -}; - -static int __init exynos_armpmu_init(void) -{ - if (!of_have_populated_dt()) { - if (soc_is_exynos4210() || soc_is_exynos4212()) - exynos4_device_pmu.num_resources = 2; - platform_device_register(&exynos4_device_pmu); - } - - return 0; -} -arch_initcall(exynos_armpmu_init); diff --git a/arch/arm/mach-exynos/common.h b/arch/arm/mach-exynos/common.h index 11fc1e29819b..38d45fd23be4 100644 --- a/arch/arm/mach-exynos/common.h +++ b/arch/arm/mach-exynos/common.h @@ -19,9 +19,7 @@ void exynos_init_time(void); extern unsigned long xxti_f, xusbxti_f; struct map_desc; -void exynos_init_io(struct map_desc *mach_desc, int size); -void exynos4_init_irq(void); -void exynos5_init_irq(void); +void exynos_init_io(void); void exynos4_restart(char mode, const char *cmd); void exynos5_restart(char mode, const char *cmd); void exynos_init_late(void); diff --git a/arch/arm/mach-exynos/dev-ahci.c b/arch/arm/mach-exynos/dev-ahci.c deleted file mode 100644 index ce1aad3eeeb9..000000000000 --- a/arch/arm/mach-exynos/dev-ahci.c +++ /dev/null @@ -1,255 +0,0 @@ -/* linux/arch/arm/mach-exynos4/dev-ahci.c - * - * Copyright (c) 2011 Samsung Electronics Co., Ltd. - * http://www.samsung.com - * - * EXYNOS4 - AHCI support - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include <linux/clk.h> -#include <linux/delay.h> -#include <linux/dma-mapping.h> -#include <linux/platform_device.h> -#include <linux/ahci_platform.h> - -#include <plat/cpu.h> - -#include <mach/irqs.h> -#include <mach/map.h> -#include <mach/regs-pmu.h> - -/* PHY Control Register */ -#define SATA_CTRL0 0x0 -/* PHY Link Control Register */ -#define SATA_CTRL1 0x4 -/* PHY Status Register */ -#define SATA_PHY_STATUS 0x8 - -#define SATA_CTRL0_RX_DATA_VALID(x) (x << 27) -#define SATA_CTRL0_SPEED_MODE (1 << 26) -#define SATA_CTRL0_M_PHY_CAL (1 << 19) -#define SATA_CTRL0_PHY_CMU_RST_N (1 << 10) -#define SATA_CTRL0_M_PHY_LN_RST_N (1 << 9) -#define SATA_CTRL0_PHY_POR_N (1 << 8) - -#define SATA_CTRL1_RST_PMALIVE_N (1 << 8) -#define SATA_CTRL1_RST_RXOOB_N (1 << 7) -#define SATA_CTRL1_RST_RX_N (1 << 6) -#define SATA_CTRL1_RST_TX_N (1 << 5) - -#define SATA_PHY_STATUS_CMU_OK (1 << 18) -#define SATA_PHY_STATUS_LANE_OK (1 << 16) - -#define LANE0 0x200 -#define COM_LANE 0xA00 - -#define HOST_PORTS_IMPL 0xC -#define SCLK_SATA_FREQ (67 * MHZ) - -static void __iomem *phy_base, *phy_ctrl; - -struct phy_reg { - u8 reg; - u8 val; -}; - -/* SATA PHY setup */ -static const struct phy_reg exynos4_sataphy_cmu[] = { - { 0x00, 0x06 }, { 0x02, 0x80 }, { 0x22, 0xa0 }, { 0x23, 0x42 }, - { 0x2e, 0x04 }, { 0x2f, 0x50 }, { 0x30, 0x70 }, { 0x31, 0x02 }, - { 0x32, 0x25 }, { 0x33, 0x40 }, { 0x34, 0x01 }, { 0x35, 0x40 }, - { 0x61, 0x2e }, { 0x63, 0x5e }, { 0x65, 0x42 }, { 0x66, 0xd1 }, - { 0x67, 0x20 }, { 0x68, 0x28 }, { 0x69, 0x78 }, { 0x6a, 0x04 }, - { 0x6b, 0xc8 }, { 0x6c, 0x06 }, -}; - -static const struct phy_reg exynos4_sataphy_lane[] = { - { 0x00, 0x02 }, { 0x05, 0x10 }, { 0x06, 0x84 }, { 0x07, 0x04 }, - { 0x08, 0xe0 }, { 0x10, 0x23 }, { 0x13, 0x05 }, { 0x14, 0x30 }, - { 0x15, 0x00 }, { 0x17, 0x70 }, { 0x18, 0xf2 }, { 0x19, 0x1e }, - { 0x1a, 0x18 }, { 0x1b, 0x0d }, { 0x1c, 0x08 }, { 0x50, 0x60 }, - { 0x51, 0x0f }, -}; - -static const struct phy_reg exynos4_sataphy_comlane[] = { - { 0x01, 0x20 }, { 0x03, 0x40 }, { 0x04, 0x3c }, { 0x05, 0x7d }, - { 0x06, 0x1d }, { 0x07, 0xcf }, { 0x08, 0x05 }, { 0x09, 0x63 }, - { 0x0a, 0x29 }, { 0x0b, 0xc4 }, { 0x0c, 0x01 }, { 0x0d, 0x03 }, - { 0x0e, 0x28 }, { 0x0f, 0x98 }, { 0x10, 0x19 }, { 0x13, 0x80 }, - { 0x14, 0xf0 }, { 0x15, 0xd0 }, { 0x39, 0xa0 }, { 0x3a, 0xa0 }, - { 0x3b, 0xa0 }, { 0x3c, 0xa0 }, { 0x3d, 0xa0 }, { 0x3e, 0xa0 }, - { 0x3f, 0xa0 }, { 0x40, 0x42 }, { 0x42, 0x80 }, { 0x43, 0x58 }, - { 0x45, 0x44 }, { 0x46, 0x5c }, { 0x47, 0x86 }, { 0x48, 0x8d }, - { 0x49, 0xd0 }, { 0x4a, 0x09 }, { 0x4b, 0x90 }, { 0x4c, 0x07 }, - { 0x4d, 0x40 }, { 0x51, 0x20 }, { 0x52, 0x32 }, { 0x7f, 0xd8 }, - { 0x80, 0x1a }, { 0x81, 0xff }, { 0x82, 0x11 }, { 0x83, 0x00 }, - { 0x87, 0xf0 }, { 0x87, 0xff }, { 0x87, 0xff }, { 0x87, 0xff }, - { 0x87, 0xff }, { 0x8c, 0x1c }, { 0x8d, 0xc2 }, { 0x8e, 0xc3 }, - { 0x8f, 0x3f }, { 0x90, 0x0a }, { 0x96, 0xf8 }, -}; - -static int wait_for_phy_ready(void __iomem *reg, unsigned long bit) -{ - unsigned long timeout; - - /* wait for maximum of 3 sec */ - timeout = jiffies + msecs_to_jiffies(3000); - while (!(__raw_readl(reg) & bit)) { - if (time_after(jiffies, timeout)) - return -1; - cpu_relax(); - } - return 0; -} - -static int ahci_phy_init(void __iomem *mmio) -{ - int i, ctrl0; - - for (i = 0; i < ARRAY_SIZE(exynos4_sataphy_cmu); i++) - __raw_writeb(exynos4_sataphy_cmu[i].val, - phy_base + (exynos4_sataphy_cmu[i].reg * 4)); - - for (i = 0; i < ARRAY_SIZE(exynos4_sataphy_lane); i++) - __raw_writeb(exynos4_sataphy_lane[i].val, - phy_base + (LANE0 + exynos4_sataphy_lane[i].reg) * 4); - - for (i = 0; i < ARRAY_SIZE(exynos4_sataphy_comlane); i++) - __raw_writeb(exynos4_sataphy_comlane[i].val, - phy_base + (COM_LANE + exynos4_sataphy_comlane[i].reg) * 4); - - __raw_writeb(0x07, phy_base); - - ctrl0 = __raw_readl(phy_ctrl + SATA_CTRL0); - ctrl0 |= SATA_CTRL0_PHY_CMU_RST_N; - __raw_writel(ctrl0, phy_ctrl + SATA_CTRL0); - - if (wait_for_phy_ready(phy_ctrl + SATA_PHY_STATUS, - SATA_PHY_STATUS_CMU_OK) < 0) { - printk(KERN_ERR "PHY CMU not ready\n"); - return -EBUSY; - } - - __raw_writeb(0x03, phy_base + (COM_LANE * 4)); - - ctrl0 = __raw_readl(phy_ctrl + SATA_CTRL0); - ctrl0 |= SATA_CTRL0_M_PHY_LN_RST_N; - __raw_writel(ctrl0, phy_ctrl + SATA_CTRL0); - - if (wait_for_phy_ready(phy_ctrl + SATA_PHY_STATUS, - SATA_PHY_STATUS_LANE_OK) < 0) { - printk(KERN_ERR "PHY LANE not ready\n"); - return -EBUSY; - } - - ctrl0 = __raw_readl(phy_ctrl + SATA_CTRL0); - ctrl0 |= SATA_CTRL0_M_PHY_CAL; - __raw_writel(ctrl0, phy_ctrl + SATA_CTRL0); - - return 0; -} - -static int exynos4_ahci_init(struct device *dev, void __iomem *mmio) -{ - struct clk *clk_sata, *clk_sataphy, *clk_sclk_sata; - int val, ret; - - phy_base = ioremap(EXYNOS4_PA_SATAPHY, SZ_64K); - if (!phy_base) { - dev_err(dev, "failed to allocate memory for SATA PHY\n"); - return -ENOMEM; - } - - phy_ctrl = ioremap(EXYNOS4_PA_SATAPHY_CTRL, SZ_16); - if (!phy_ctrl) { - dev_err(dev, "failed to allocate memory for SATA PHY CTRL\n"); - ret = -ENOMEM; - goto err1; - } - - clk_sata = clk_get(dev, "sata"); - if (IS_ERR(clk_sata)) { - dev_err(dev, "failed to get sata clock\n"); - ret = PTR_ERR(clk_sata); - clk_sata = NULL; - goto err2; - - } - clk_enable(clk_sata); - - clk_sataphy = clk_get(dev, "sataphy"); - if (IS_ERR(clk_sataphy)) { - dev_err(dev, "failed to get sataphy clock\n"); - ret = PTR_ERR(clk_sataphy); - clk_sataphy = NULL; - goto err3; - } - clk_enable(clk_sataphy); - - clk_sclk_sata = clk_get(dev, "sclk_sata"); - if (IS_ERR(clk_sclk_sata)) { - dev_err(dev, "failed to get sclk_sata\n"); - ret = PTR_ERR(clk_sclk_sata); - clk_sclk_sata = NULL; - goto err4; - } - clk_enable(clk_sclk_sata); - clk_set_rate(clk_sclk_sata, SCLK_SATA_FREQ); - - __raw_writel(S5P_PMU_SATA_PHY_CONTROL_EN, S5P_PMU_SATA_PHY_CONTROL); - - /* Enable PHY link control */ - val = SATA_CTRL1_RST_PMALIVE_N | SATA_CTRL1_RST_RXOOB_N | - SATA_CTRL1_RST_RX_N | SATA_CTRL1_RST_TX_N; - __raw_writel(val, phy_ctrl + SATA_CTRL1); - - /* Set communication speed as 3Gbps and enable PHY power */ - val = SATA_CTRL0_RX_DATA_VALID(3) | SATA_CTRL0_SPEED_MODE | - SATA_CTRL0_PHY_POR_N; - __raw_writel(val, phy_ctrl + SATA_CTRL0); - - /* Port0 is available */ - __raw_writel(0x1, mmio + HOST_PORTS_IMPL); - - return ahci_phy_init(mmio); - -err4: - clk_disable(clk_sataphy); - clk_put(clk_sataphy); -err3: - clk_disable(clk_sata); - clk_put(clk_sata); -err2: - iounmap(phy_ctrl); -err1: - iounmap(phy_base); - - return ret; -} - -static struct ahci_platform_data exynos4_ahci_pdata = { - .init = exynos4_ahci_init, -}; - -static struct resource exynos4_ahci_resource[] = { - [0] = DEFINE_RES_MEM(EXYNOS4_PA_SATA, SZ_64K), - [1] = DEFINE_RES_IRQ(EXYNOS4_IRQ_SATA), -}; - -static u64 exynos4_ahci_dmamask = DMA_BIT_MASK(32); - -struct platform_device exynos4_device_ahci = { - .name = "ahci", - .id = -1, - .resource = exynos4_ahci_resource, - .num_resources = ARRAY_SIZE(exynos4_ahci_resource), - .dev = { - .platform_data = &exynos4_ahci_pdata, - .dma_mask = &exynos4_ahci_dmamask, - .coherent_dma_mask = DMA_BIT_MASK(32), - }, -}; diff --git a/arch/arm/mach-exynos/dev-audio.c b/arch/arm/mach-exynos/dev-audio.c deleted file mode 100644 index c662c89794b2..000000000000 --- a/arch/arm/mach-exynos/dev-audio.c +++ /dev/null @@ -1,254 +0,0 @@ -/* linux/arch/arm/mach-exynos4/dev-audio.c - * - * Copyright (c) 2011 Samsung Electronics Co., Ltd. - * http://www.samsung.com - * - * Copyright (c) 2010 Samsung Electronics Co. Ltd - * Jaswinder Singh <jassi.brar@samsung.com> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include <linux/platform_device.h> -#include <linux/dma-mapping.h> -#include <linux/gpio.h> -#include <linux/platform_data/asoc-s3c.h> - -#include <plat/gpio-cfg.h> - -#include <mach/map.h> -#include <mach/dma.h> -#include <mach/irqs.h> - -#define EXYNOS4_AUDSS_INT_MEM (0x03000000) - -static int exynos4_cfg_i2s(struct platform_device *pdev) -{ - /* configure GPIO for i2s port */ - switch (pdev->id) { - case 0: - s3c_gpio_cfgpin_range(EXYNOS4_GPZ(0), 7, S3C_GPIO_SFN(2)); - break; - case 1: - s3c_gpio_cfgpin_range(EXYNOS4_GPC0(0), 5, S3C_GPIO_SFN(2)); - break; - case 2: - s3c_gpio_cfgpin_range(EXYNOS4_GPC1(0), 5, S3C_GPIO_SFN(4)); - break; - default: - printk(KERN_ERR "Invalid Device %d\n", pdev->id); - return -EINVAL; - } - - return 0; -} - -static struct s3c_audio_pdata i2sv5_pdata = { - .cfg_gpio = exynos4_cfg_i2s, - .type = { - .i2s = { - .quirks = QUIRK_PRI_6CHAN | QUIRK_SEC_DAI - | QUIRK_NEED_RSTCLR, - .idma_addr = EXYNOS4_AUDSS_INT_MEM, - }, - }, -}; - -static struct resource exynos4_i2s0_resource[] = { - [0] = DEFINE_RES_MEM(EXYNOS4_PA_I2S0, SZ_256), - [1] = DEFINE_RES_DMA(DMACH_I2S0_TX), - [2] = DEFINE_RES_DMA(DMACH_I2S0_RX), - [3] = DEFINE_RES_DMA(DMACH_I2S0S_TX), -}; - -struct platform_device exynos4_device_i2s0 = { - .name = "samsung-i2s", - .id = 0, - .num_resources = ARRAY_SIZE(exynos4_i2s0_resource), - .resource = exynos4_i2s0_resource, - .dev = { - .platform_data = &i2sv5_pdata, - }, -}; - -static struct s3c_audio_pdata i2sv3_pdata = { - .cfg_gpio = exynos4_cfg_i2s, - .type = { - .i2s = { - .quirks = QUIRK_NO_MUXPSR, - }, - }, -}; - -static struct resource exynos4_i2s1_resource[] = { - [0] = DEFINE_RES_MEM(EXYNOS4_PA_I2S1, SZ_256), - [1] = DEFINE_RES_DMA(DMACH_I2S1_TX), - [2] = DEFINE_RES_DMA(DMACH_I2S1_RX), -}; - -struct platform_device exynos4_device_i2s1 = { - .name = "samsung-i2s", - .id = 1, - .num_resources = ARRAY_SIZE(exynos4_i2s1_resource), - .resource = exynos4_i2s1_resource, - .dev = { - .platform_data = &i2sv3_pdata, - }, -}; - -static struct resource exynos4_i2s2_resource[] = { - [0] = DEFINE_RES_MEM(EXYNOS4_PA_I2S2, SZ_256), - [1] = DEFINE_RES_DMA(DMACH_I2S2_TX), - [2] = DEFINE_RES_DMA(DMACH_I2S2_RX), -}; - -struct platform_device exynos4_device_i2s2 = { - .name = "samsung-i2s", - .id = 2, - .num_resources = ARRAY_SIZE(exynos4_i2s2_resource), - .resource = exynos4_i2s2_resource, - .dev = { - .platform_data = &i2sv3_pdata, - }, -}; - -/* PCM Controller platform_devices */ - -static int exynos4_pcm_cfg_gpio(struct platform_device *pdev) -{ - switch (pdev->id) { - case 0: - s3c_gpio_cfgpin_range(EXYNOS4_GPZ(0), 5, S3C_GPIO_SFN(3)); - break; - case 1: - s3c_gpio_cfgpin_range(EXYNOS4_GPC0(0), 5, S3C_GPIO_SFN(3)); - break; - case 2: - s3c_gpio_cfgpin_range(EXYNOS4_GPC1(0), 5, S3C_GPIO_SFN(3)); - break; - default: - printk(KERN_DEBUG "Invalid PCM Controller number!"); - return -EINVAL; - } - - return 0; -} - -static struct s3c_audio_pdata s3c_pcm_pdata = { - .cfg_gpio = exynos4_pcm_cfg_gpio, -}; - -static struct resource exynos4_pcm0_resource[] = { - [0] = DEFINE_RES_MEM(EXYNOS4_PA_PCM0, SZ_256), - [1] = DEFINE_RES_DMA(DMACH_PCM0_TX), - [2] = DEFINE_RES_DMA(DMACH_PCM0_RX), -}; - -struct platform_device exynos4_device_pcm0 = { - .name = "samsung-pcm", - .id = 0, - .num_resources = ARRAY_SIZE(exynos4_pcm0_resource), - .resource = exynos4_pcm0_resource, - .dev = { - .platform_data = &s3c_pcm_pdata, - }, -}; - -static struct resource exynos4_pcm1_resource[] = { - [0] = DEFINE_RES_MEM(EXYNOS4_PA_PCM1, SZ_256), - [1] = DEFINE_RES_DMA(DMACH_PCM1_TX), - [2] = DEFINE_RES_DMA(DMACH_PCM1_RX), -}; - -struct platform_device exynos4_device_pcm1 = { - .name = "samsung-pcm", - .id = 1, - .num_resources = ARRAY_SIZE(exynos4_pcm1_resource), - .resource = exynos4_pcm1_resource, - .dev = { - .platform_data = &s3c_pcm_pdata, - }, -}; - -static struct resource exynos4_pcm2_resource[] = { - [0] = DEFINE_RES_MEM(EXYNOS4_PA_PCM2, SZ_256), - [1] = DEFINE_RES_DMA(DMACH_PCM2_TX), - [2] = DEFINE_RES_DMA(DMACH_PCM2_RX), -}; - -struct platform_device exynos4_device_pcm2 = { - .name = "samsung-pcm", - .id = 2, - .num_resources = ARRAY_SIZE(exynos4_pcm2_resource), - .resource = exynos4_pcm2_resource, - .dev = { - .platform_data = &s3c_pcm_pdata, - }, -}; - -/* AC97 Controller platform devices */ - -static int exynos4_ac97_cfg_gpio(struct platform_device *pdev) -{ - return s3c_gpio_cfgpin_range(EXYNOS4_GPC0(0), 5, S3C_GPIO_SFN(4)); -} - -static struct resource exynos4_ac97_resource[] = { - [0] = DEFINE_RES_MEM(EXYNOS4_PA_AC97, SZ_256), - [1] = DEFINE_RES_DMA(DMACH_AC97_PCMOUT), - [2] = DEFINE_RES_DMA(DMACH_AC97_PCMIN), - [3] = DEFINE_RES_DMA(DMACH_AC97_MICIN), - [4] = DEFINE_RES_IRQ(EXYNOS4_IRQ_AC97), -}; - -static struct s3c_audio_pdata s3c_ac97_pdata = { - .cfg_gpio = exynos4_ac97_cfg_gpio, -}; - -static u64 exynos4_ac97_dmamask = DMA_BIT_MASK(32); - -struct platform_device exynos4_device_ac97 = { - .name = "samsung-ac97", - .id = -1, - .num_resources = ARRAY_SIZE(exynos4_ac97_resource), - .resource = exynos4_ac97_resource, - .dev = { - .platform_data = &s3c_ac97_pdata, - .dma_mask = &exynos4_ac97_dmamask, - .coherent_dma_mask = DMA_BIT_MASK(32), - }, -}; - -/* S/PDIF Controller platform_device */ - -static int exynos4_spdif_cfg_gpio(struct platform_device *pdev) -{ - s3c_gpio_cfgpin_range(EXYNOS4_GPC1(0), 2, S3C_GPIO_SFN(4)); - - return 0; -} - -static struct resource exynos4_spdif_resource[] = { - [0] = DEFINE_RES_MEM(EXYNOS4_PA_SPDIF, SZ_256), - [1] = DEFINE_RES_DMA(DMACH_SPDIF), -}; - -static struct s3c_audio_pdata samsung_spdif_pdata = { - .cfg_gpio = exynos4_spdif_cfg_gpio, -}; - -static u64 exynos4_spdif_dmamask = DMA_BIT_MASK(32); - -struct platform_device exynos4_device_spdif = { - .name = "samsung-spdif", - .id = -1, - .num_resources = ARRAY_SIZE(exynos4_spdif_resource), - .resource = exynos4_spdif_resource, - .dev = { - .platform_data = &samsung_spdif_pdata, - .dma_mask = &exynos4_spdif_dmamask, - .coherent_dma_mask = DMA_BIT_MASK(32), - }, -}; diff --git a/arch/arm/mach-exynos/dev-ohci.c b/arch/arm/mach-exynos/dev-ohci.c deleted file mode 100644 index d5bc129e6bb7..000000000000 --- a/arch/arm/mach-exynos/dev-ohci.c +++ /dev/null @@ -1,52 +0,0 @@ -/* linux/arch/arm/mach-exynos/dev-ohci.c - * - * Copyright (c) 2011 Samsung Electronics Co., Ltd. - * http://www.samsung.com - * - * EXYNOS - OHCI support - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include <linux/dma-mapping.h> -#include <linux/platform_device.h> -#include <linux/platform_data/usb-ohci-exynos.h> - -#include <mach/irqs.h> -#include <mach/map.h> - -#include <plat/devs.h> -#include <plat/usb-phy.h> - -static struct resource exynos4_ohci_resource[] = { - [0] = DEFINE_RES_MEM(EXYNOS4_PA_OHCI, SZ_256), - [1] = DEFINE_RES_IRQ(IRQ_USB_HOST), -}; - -static u64 exynos4_ohci_dma_mask = DMA_BIT_MASK(32); - -struct platform_device exynos4_device_ohci = { - .name = "exynos-ohci", - .id = -1, - .num_resources = ARRAY_SIZE(exynos4_ohci_resource), - .resource = exynos4_ohci_resource, - .dev = { - .dma_mask = &exynos4_ohci_dma_mask, - .coherent_dma_mask = DMA_BIT_MASK(32), - } -}; - -void __init exynos4_ohci_set_platdata(struct exynos4_ohci_platdata *pd) -{ - struct exynos4_ohci_platdata *npd; - - npd = s3c_set_platdata(pd, sizeof(struct exynos4_ohci_platdata), - &exynos4_device_ohci); - - if (!npd->phy_init) - npd->phy_init = s5p_usb_phy_init; - if (!npd->phy_exit) - npd->phy_exit = s5p_usb_phy_exit; -} diff --git a/arch/arm/mach-exynos/dev-uart.c b/arch/arm/mach-exynos/dev-uart.c deleted file mode 100644 index c48aff02c786..000000000000 --- a/arch/arm/mach-exynos/dev-uart.c +++ /dev/null @@ -1,55 +0,0 @@ -/* - * Copyright (c) 2012 Samsung Electronics Co., Ltd. - * http://www.samsung.com - * - * Base EXYNOS UART resource and device definitions - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include <linux/kernel.h> -#include <linux/types.h> -#include <linux/interrupt.h> -#include <linux/list.h> -#include <linux/ioport.h> -#include <linux/platform_device.h> - -#include <asm/mach/arch.h> -#include <asm/mach/irq.h> -#include <mach/hardware.h> -#include <mach/map.h> -#include <mach/irqs.h> - -#include <plat/devs.h> - -#define EXYNOS_UART_RESOURCE(_series, _nr) \ -static struct resource exynos##_series##_uart##_nr##_resource[] = { \ - [0] = DEFINE_RES_MEM(EXYNOS##_series##_PA_UART##_nr, EXYNOS##_series##_SZ_UART), \ - [1] = DEFINE_RES_IRQ(EXYNOS##_series##_IRQ_UART##_nr), \ -}; - -EXYNOS_UART_RESOURCE(4, 0) -EXYNOS_UART_RESOURCE(4, 1) -EXYNOS_UART_RESOURCE(4, 2) -EXYNOS_UART_RESOURCE(4, 3) - -struct s3c24xx_uart_resources exynos4_uart_resources[] __initdata = { - [0] = { - .resources = exynos4_uart0_resource, - .nr_resources = ARRAY_SIZE(exynos4_uart0_resource), - }, - [1] = { - .resources = exynos4_uart1_resource, - .nr_resources = ARRAY_SIZE(exynos4_uart1_resource), - }, - [2] = { - .resources = exynos4_uart2_resource, - .nr_resources = ARRAY_SIZE(exynos4_uart2_resource), - }, - [3] = { - .resources = exynos4_uart3_resource, - .nr_resources = ARRAY_SIZE(exynos4_uart3_resource), - }, -}; diff --git a/arch/arm/mach-exynos/dma.c b/arch/arm/mach-exynos/dma.c deleted file mode 100644 index 87e07d6fc615..000000000000 --- a/arch/arm/mach-exynos/dma.c +++ /dev/null @@ -1,322 +0,0 @@ -/* linux/arch/arm/mach-exynos4/dma.c - * - * Copyright (c) 2011 Samsung Electronics Co., Ltd. - * http://www.samsung.com - * - * Copyright (C) 2010 Samsung Electronics Co. Ltd. - * Jaswinder Singh <jassi.brar@samsung.com> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. - */ - -#include <linux/dma-mapping.h> -#include <linux/amba/bus.h> -#include <linux/amba/pl330.h> -#include <linux/of.h> - -#include <asm/irq.h> -#include <plat/devs.h> -#include <plat/irqs.h> -#include <plat/cpu.h> - -#include <mach/map.h> -#include <mach/irqs.h> -#include <mach/dma.h> - -static u8 exynos4210_pdma0_peri[] = { - DMACH_PCM0_RX, - DMACH_PCM0_TX, - DMACH_PCM2_RX, - DMACH_PCM2_TX, - DMACH_MSM_REQ0, - DMACH_MSM_REQ2, - DMACH_SPI0_RX, - DMACH_SPI0_TX, - DMACH_SPI2_RX, - DMACH_SPI2_TX, - DMACH_I2S0S_TX, - DMACH_I2S0_RX, - DMACH_I2S0_TX, - DMACH_I2S2_RX, - DMACH_I2S2_TX, - DMACH_UART0_RX, - DMACH_UART0_TX, - DMACH_UART2_RX, - DMACH_UART2_TX, - DMACH_UART4_RX, - DMACH_UART4_TX, - DMACH_SLIMBUS0_RX, - DMACH_SLIMBUS0_TX, - DMACH_SLIMBUS2_RX, - DMACH_SLIMBUS2_TX, - DMACH_SLIMBUS4_RX, - DMACH_SLIMBUS4_TX, - DMACH_AC97_MICIN, - DMACH_AC97_PCMIN, - DMACH_AC97_PCMOUT, -}; - -static u8 exynos4212_pdma0_peri[] = { - DMACH_PCM0_RX, - DMACH_PCM0_TX, - DMACH_PCM2_RX, - DMACH_PCM2_TX, - DMACH_MIPI_HSI0, - DMACH_MIPI_HSI1, - DMACH_SPI0_RX, - DMACH_SPI0_TX, - DMACH_SPI2_RX, - DMACH_SPI2_TX, - DMACH_I2S0S_TX, - DMACH_I2S0_RX, - DMACH_I2S0_TX, - DMACH_I2S2_RX, - DMACH_I2S2_TX, - DMACH_UART0_RX, - DMACH_UART0_TX, - DMACH_UART2_RX, - DMACH_UART2_TX, - DMACH_UART4_RX, - DMACH_UART4_TX, - DMACH_SLIMBUS0_RX, - DMACH_SLIMBUS0_TX, - DMACH_SLIMBUS2_RX, - DMACH_SLIMBUS2_TX, - DMACH_SLIMBUS4_RX, - DMACH_SLIMBUS4_TX, - DMACH_AC97_MICIN, - DMACH_AC97_PCMIN, - DMACH_AC97_PCMOUT, - DMACH_MIPI_HSI4, - DMACH_MIPI_HSI5, -}; - -static u8 exynos5250_pdma0_peri[] = { - DMACH_PCM0_RX, - DMACH_PCM0_TX, - DMACH_PCM2_RX, - DMACH_PCM2_TX, - DMACH_SPI0_RX, - DMACH_SPI0_TX, - DMACH_SPI2_RX, - DMACH_SPI2_TX, - DMACH_I2S0S_TX, - DMACH_I2S0_RX, - DMACH_I2S0_TX, - DMACH_I2S2_RX, - DMACH_I2S2_TX, - DMACH_UART0_RX, - DMACH_UART0_TX, - DMACH_UART2_RX, - DMACH_UART2_TX, - DMACH_UART4_RX, - DMACH_UART4_TX, - DMACH_SLIMBUS0_RX, - DMACH_SLIMBUS0_TX, - DMACH_SLIMBUS2_RX, - DMACH_SLIMBUS2_TX, - DMACH_SLIMBUS4_RX, - DMACH_SLIMBUS4_TX, - DMACH_AC97_MICIN, - DMACH_AC97_PCMIN, - DMACH_AC97_PCMOUT, - DMACH_MIPI_HSI0, - DMACH_MIPI_HSI2, - DMACH_MIPI_HSI4, - DMACH_MIPI_HSI6, -}; - -static struct dma_pl330_platdata exynos_pdma0_pdata; - -static AMBA_AHB_DEVICE(exynos_pdma0, "dma-pl330.0", 0x00041330, - EXYNOS4_PA_PDMA0, {EXYNOS4_IRQ_PDMA0}, &exynos_pdma0_pdata); - -static u8 exynos4210_pdma1_peri[] = { - DMACH_PCM0_RX, - DMACH_PCM0_TX, - DMACH_PCM1_RX, - DMACH_PCM1_TX, - DMACH_MSM_REQ1, - DMACH_MSM_REQ3, - DMACH_SPI1_RX, - DMACH_SPI1_TX, - DMACH_I2S0S_TX, - DMACH_I2S0_RX, - DMACH_I2S0_TX, - DMACH_I2S1_RX, - DMACH_I2S1_TX, - DMACH_UART0_RX, - DMACH_UART0_TX, - DMACH_UART1_RX, - DMACH_UART1_TX, - DMACH_UART3_RX, - DMACH_UART3_TX, - DMACH_SLIMBUS1_RX, - DMACH_SLIMBUS1_TX, - DMACH_SLIMBUS3_RX, - DMACH_SLIMBUS3_TX, - DMACH_SLIMBUS5_RX, - DMACH_SLIMBUS5_TX, -}; - -static u8 exynos4212_pdma1_peri[] = { - DMACH_PCM0_RX, - DMACH_PCM0_TX, - DMACH_PCM1_RX, - DMACH_PCM1_TX, - DMACH_MIPI_HSI2, - DMACH_MIPI_HSI3, - DMACH_SPI1_RX, - DMACH_SPI1_TX, - DMACH_I2S0S_TX, - DMACH_I2S0_RX, - DMACH_I2S0_TX, - DMACH_I2S1_RX, - DMACH_I2S1_TX, - DMACH_UART0_RX, - DMACH_UART0_TX, - DMACH_UART1_RX, - DMACH_UART1_TX, - DMACH_UART3_RX, - DMACH_UART3_TX, - DMACH_SLIMBUS1_RX, - DMACH_SLIMBUS1_TX, - DMACH_SLIMBUS3_RX, - DMACH_SLIMBUS3_TX, - DMACH_SLIMBUS5_RX, - DMACH_SLIMBUS5_TX, - DMACH_SLIMBUS0AUX_RX, - DMACH_SLIMBUS0AUX_TX, - DMACH_SPDIF, - DMACH_MIPI_HSI6, - DMACH_MIPI_HSI7, -}; - -static u8 exynos5250_pdma1_peri[] = { - DMACH_PCM0_RX, - DMACH_PCM0_TX, - DMACH_PCM1_RX, - DMACH_PCM1_TX, - DMACH_SPI1_RX, - DMACH_SPI1_TX, - DMACH_PWM, - DMACH_SPDIF, - DMACH_I2S0S_TX, - DMACH_I2S0_RX, - DMACH_I2S0_TX, - DMACH_I2S1_RX, - DMACH_I2S1_TX, - DMACH_UART0_RX, - DMACH_UART0_TX, - DMACH_UART1_RX, - DMACH_UART1_TX, - DMACH_UART3_RX, - DMACH_UART3_TX, - DMACH_SLIMBUS1_RX, - DMACH_SLIMBUS1_TX, - DMACH_SLIMBUS3_RX, - DMACH_SLIMBUS3_TX, - DMACH_SLIMBUS5_RX, - DMACH_SLIMBUS5_TX, - DMACH_SLIMBUS0AUX_RX, - DMACH_SLIMBUS0AUX_TX, - DMACH_DISP1, - DMACH_MIPI_HSI1, - DMACH_MIPI_HSI3, - DMACH_MIPI_HSI5, - DMACH_MIPI_HSI7, -}; - -static struct dma_pl330_platdata exynos_pdma1_pdata; - -static AMBA_AHB_DEVICE(exynos_pdma1, "dma-pl330.1", 0x00041330, - EXYNOS4_PA_PDMA1, {EXYNOS4_IRQ_PDMA1}, &exynos_pdma1_pdata); - -static u8 mdma_peri[] = { - DMACH_MTOM_0, - DMACH_MTOM_1, - DMACH_MTOM_2, - DMACH_MTOM_3, - DMACH_MTOM_4, - DMACH_MTOM_5, - DMACH_MTOM_6, - DMACH_MTOM_7, -}; - -static struct dma_pl330_platdata exynos_mdma1_pdata = { - .nr_valid_peri = ARRAY_SIZE(mdma_peri), - .peri_id = mdma_peri, -}; - -static AMBA_AHB_DEVICE(exynos_mdma1, "dma-pl330.2", 0x00041330, - EXYNOS4_PA_MDMA1, {EXYNOS4_IRQ_MDMA1}, &exynos_mdma1_pdata); - -static int __init exynos_dma_init(void) -{ - if (of_have_populated_dt()) - return 0; - - if (soc_is_exynos4210()) { - exynos_pdma0_pdata.nr_valid_peri = - ARRAY_SIZE(exynos4210_pdma0_peri); - exynos_pdma0_pdata.peri_id = exynos4210_pdma0_peri; - exynos_pdma1_pdata.nr_valid_peri = - ARRAY_SIZE(exynos4210_pdma1_peri); - exynos_pdma1_pdata.peri_id = exynos4210_pdma1_peri; - - if (samsung_rev() == EXYNOS4210_REV_0) - exynos_mdma1_device.res.start = EXYNOS4_PA_S_MDMA1; - } else if (soc_is_exynos4212() || soc_is_exynos4412()) { - exynos_pdma0_pdata.nr_valid_peri = - ARRAY_SIZE(exynos4212_pdma0_peri); - exynos_pdma0_pdata.peri_id = exynos4212_pdma0_peri; - exynos_pdma1_pdata.nr_valid_peri = - ARRAY_SIZE(exynos4212_pdma1_peri); - exynos_pdma1_pdata.peri_id = exynos4212_pdma1_peri; - } else if (soc_is_exynos5250()) { - exynos_pdma0_pdata.nr_valid_peri = - ARRAY_SIZE(exynos5250_pdma0_peri); - exynos_pdma0_pdata.peri_id = exynos5250_pdma0_peri; - exynos_pdma1_pdata.nr_valid_peri = - ARRAY_SIZE(exynos5250_pdma1_peri); - exynos_pdma1_pdata.peri_id = exynos5250_pdma1_peri; - - exynos_pdma0_device.res.start = EXYNOS5_PA_PDMA0; - exynos_pdma0_device.res.end = EXYNOS5_PA_PDMA0 + SZ_4K; - exynos_pdma0_device.irq[0] = EXYNOS5_IRQ_PDMA0; - exynos_pdma1_device.res.start = EXYNOS5_PA_PDMA1; - exynos_pdma1_device.res.end = EXYNOS5_PA_PDMA1 + SZ_4K; - exynos_pdma0_device.irq[0] = EXYNOS5_IRQ_PDMA1; - exynos_mdma1_device.res.start = EXYNOS5_PA_MDMA1; - exynos_mdma1_device.res.end = EXYNOS5_PA_MDMA1 + SZ_4K; - exynos_pdma0_device.irq[0] = EXYNOS5_IRQ_MDMA1; - } - - dma_cap_set(DMA_SLAVE, exynos_pdma0_pdata.cap_mask); - dma_cap_set(DMA_CYCLIC, exynos_pdma0_pdata.cap_mask); - dma_cap_set(DMA_PRIVATE, exynos_pdma0_pdata.cap_mask); - amba_device_register(&exynos_pdma0_device, &iomem_resource); - - dma_cap_set(DMA_SLAVE, exynos_pdma1_pdata.cap_mask); - dma_cap_set(DMA_CYCLIC, exynos_pdma1_pdata.cap_mask); - dma_cap_set(DMA_PRIVATE, exynos_pdma1_pdata.cap_mask); - amba_device_register(&exynos_pdma1_device, &iomem_resource); - - dma_cap_set(DMA_MEMCPY, exynos_mdma1_pdata.cap_mask); - amba_device_register(&exynos_mdma1_device, &iomem_resource); - - return 0; -} -arch_initcall(exynos_dma_init); diff --git a/arch/arm/mach-exynos/firmware.c b/arch/arm/mach-exynos/firmware.c index ed11f100d479..932129ef26c6 100644 --- a/arch/arm/mach-exynos/firmware.c +++ b/arch/arm/mach-exynos/firmware.c @@ -48,20 +48,18 @@ static const struct firmware_ops exynos_firmware_ops = { void __init exynos_firmware_init(void) { - if (of_have_populated_dt()) { - struct device_node *nd; - const __be32 *addr; + struct device_node *nd; + const __be32 *addr; - nd = of_find_compatible_node(NULL, NULL, - "samsung,secure-firmware"); - if (!nd) - return; + nd = of_find_compatible_node(NULL, NULL, + "samsung,secure-firmware"); + if (!nd) + return; - addr = of_get_address(nd, 0, NULL, NULL); - if (!addr) { - pr_err("%s: No address specified.\n", __func__); - return; - } + addr = of_get_address(nd, 0, NULL, NULL); + if (!addr) { + pr_err("%s: No address specified.\n", __func__); + return; } pr_info("Running under secure firmware.\n"); diff --git a/arch/arm/mach-exynos/include/mach/gpio.h b/arch/arm/mach-exynos/include/mach/gpio.h deleted file mode 100644 index eb24f1eb8e3b..000000000000 --- a/arch/arm/mach-exynos/include/mach/gpio.h +++ /dev/null @@ -1,289 +0,0 @@ -/* - * Copyright (c) 2010-2012 Samsung Electronics Co., Ltd. - * http://www.samsung.com - * - * EXYNOS - GPIO lib support - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __ASM_ARCH_GPIO_H -#define __ASM_ARCH_GPIO_H __FILE__ - -/* Macro for EXYNOS GPIO numbering */ - -#define EXYNOS_GPIO_NEXT(__gpio) \ - ((__gpio##_START) + (__gpio##_NR) + CONFIG_S3C_GPIO_SPACE + 1) - -/* EXYNOS4 GPIO bank sizes */ - -#define EXYNOS4_GPIO_A0_NR (8) -#define EXYNOS4_GPIO_A1_NR (6) -#define EXYNOS4_GPIO_B_NR (8) -#define EXYNOS4_GPIO_C0_NR (5) -#define EXYNOS4_GPIO_C1_NR (5) -#define EXYNOS4_GPIO_D0_NR (4) -#define EXYNOS4_GPIO_D1_NR (4) -#define EXYNOS4_GPIO_E0_NR (5) -#define EXYNOS4_GPIO_E1_NR (8) -#define EXYNOS4_GPIO_E2_NR (6) -#define EXYNOS4_GPIO_E3_NR (8) -#define EXYNOS4_GPIO_E4_NR (8) -#define EXYNOS4_GPIO_F0_NR (8) -#define EXYNOS4_GPIO_F1_NR (8) -#define EXYNOS4_GPIO_F2_NR (8) -#define EXYNOS4_GPIO_F3_NR (6) -#define EXYNOS4_GPIO_J0_NR (8) -#define EXYNOS4_GPIO_J1_NR (5) -#define EXYNOS4_GPIO_K0_NR (7) -#define EXYNOS4_GPIO_K1_NR (7) -#define EXYNOS4_GPIO_K2_NR (7) -#define EXYNOS4_GPIO_K3_NR (7) -#define EXYNOS4_GPIO_L0_NR (8) -#define EXYNOS4_GPIO_L1_NR (3) -#define EXYNOS4_GPIO_L2_NR (8) -#define EXYNOS4_GPIO_X0_NR (8) -#define EXYNOS4_GPIO_X1_NR (8) -#define EXYNOS4_GPIO_X2_NR (8) -#define EXYNOS4_GPIO_X3_NR (8) -#define EXYNOS4_GPIO_Y0_NR (6) -#define EXYNOS4_GPIO_Y1_NR (4) -#define EXYNOS4_GPIO_Y2_NR (6) -#define EXYNOS4_GPIO_Y3_NR (8) -#define EXYNOS4_GPIO_Y4_NR (8) -#define EXYNOS4_GPIO_Y5_NR (8) -#define EXYNOS4_GPIO_Y6_NR (8) -#define EXYNOS4_GPIO_Z_NR (7) - -/* EXYNOS4 GPIO bank numbers */ - -enum exynos4_gpio_number { - EXYNOS4_GPIO_A0_START = 0, - EXYNOS4_GPIO_A1_START = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_A0), - EXYNOS4_GPIO_B_START = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_A1), - EXYNOS4_GPIO_C0_START = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_B), - EXYNOS4_GPIO_C1_START = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_C0), - EXYNOS4_GPIO_D0_START = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_C1), - EXYNOS4_GPIO_D1_START = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_D0), - EXYNOS4_GPIO_E0_START = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_D1), - EXYNOS4_GPIO_E1_START = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_E0), - EXYNOS4_GPIO_E2_START = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_E1), - EXYNOS4_GPIO_E3_START = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_E2), - EXYNOS4_GPIO_E4_START = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_E3), - EXYNOS4_GPIO_F0_START = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_E4), - EXYNOS4_GPIO_F1_START = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_F0), - EXYNOS4_GPIO_F2_START = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_F1), - EXYNOS4_GPIO_F3_START = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_F2), - EXYNOS4_GPIO_J0_START = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_F3), - EXYNOS4_GPIO_J1_START = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_J0), - EXYNOS4_GPIO_K0_START = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_J1), - EXYNOS4_GPIO_K1_START = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_K0), - EXYNOS4_GPIO_K2_START = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_K1), - EXYNOS4_GPIO_K3_START = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_K2), - EXYNOS4_GPIO_L0_START = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_K3), - EXYNOS4_GPIO_L1_START = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_L0), - EXYNOS4_GPIO_L2_START = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_L1), - EXYNOS4_GPIO_X0_START = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_L2), - EXYNOS4_GPIO_X1_START = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_X0), - EXYNOS4_GPIO_X2_START = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_X1), - EXYNOS4_GPIO_X3_START = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_X2), - EXYNOS4_GPIO_Y0_START = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_X3), - EXYNOS4_GPIO_Y1_START = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_Y0), - EXYNOS4_GPIO_Y2_START = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_Y1), - EXYNOS4_GPIO_Y3_START = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_Y2), - EXYNOS4_GPIO_Y4_START = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_Y3), - EXYNOS4_GPIO_Y5_START = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_Y4), - EXYNOS4_GPIO_Y6_START = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_Y5), - EXYNOS4_GPIO_Z_START = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_Y6), -}; - -/* EXYNOS4 GPIO number definitions */ - -#define EXYNOS4_GPA0(_nr) (EXYNOS4_GPIO_A0_START + (_nr)) -#define EXYNOS4_GPA1(_nr) (EXYNOS4_GPIO_A1_START + (_nr)) -#define EXYNOS4_GPB(_nr) (EXYNOS4_GPIO_B_START + (_nr)) -#define EXYNOS4_GPC0(_nr) (EXYNOS4_GPIO_C0_START + (_nr)) -#define EXYNOS4_GPC1(_nr) (EXYNOS4_GPIO_C1_START + (_nr)) -#define EXYNOS4_GPD0(_nr) (EXYNOS4_GPIO_D0_START + (_nr)) -#define EXYNOS4_GPD1(_nr) (EXYNOS4_GPIO_D1_START + (_nr)) -#define EXYNOS4_GPE0(_nr) (EXYNOS4_GPIO_E0_START + (_nr)) -#define EXYNOS4_GPE1(_nr) (EXYNOS4_GPIO_E1_START + (_nr)) -#define EXYNOS4_GPE2(_nr) (EXYNOS4_GPIO_E2_START + (_nr)) -#define EXYNOS4_GPE3(_nr) (EXYNOS4_GPIO_E3_START + (_nr)) -#define EXYNOS4_GPE4(_nr) (EXYNOS4_GPIO_E4_START + (_nr)) -#define EXYNOS4_GPF0(_nr) (EXYNOS4_GPIO_F0_START + (_nr)) -#define EXYNOS4_GPF1(_nr) (EXYNOS4_GPIO_F1_START + (_nr)) -#define EXYNOS4_GPF2(_nr) (EXYNOS4_GPIO_F2_START + (_nr)) -#define EXYNOS4_GPF3(_nr) (EXYNOS4_GPIO_F3_START + (_nr)) -#define EXYNOS4_GPJ0(_nr) (EXYNOS4_GPIO_J0_START + (_nr)) -#define EXYNOS4_GPJ1(_nr) (EXYNOS4_GPIO_J1_START + (_nr)) -#define EXYNOS4_GPK0(_nr) (EXYNOS4_GPIO_K0_START + (_nr)) -#define EXYNOS4_GPK1(_nr) (EXYNOS4_GPIO_K1_START + (_nr)) -#define EXYNOS4_GPK2(_nr) (EXYNOS4_GPIO_K2_START + (_nr)) -#define EXYNOS4_GPK3(_nr) (EXYNOS4_GPIO_K3_START + (_nr)) -#define EXYNOS4_GPL0(_nr) (EXYNOS4_GPIO_L0_START + (_nr)) -#define EXYNOS4_GPL1(_nr) (EXYNOS4_GPIO_L1_START + (_nr)) -#define EXYNOS4_GPL2(_nr) (EXYNOS4_GPIO_L2_START + (_nr)) -#define EXYNOS4_GPX0(_nr) (EXYNOS4_GPIO_X0_START + (_nr)) -#define EXYNOS4_GPX1(_nr) (EXYNOS4_GPIO_X1_START + (_nr)) -#define EXYNOS4_GPX2(_nr) (EXYNOS4_GPIO_X2_START + (_nr)) -#define EXYNOS4_GPX3(_nr) (EXYNOS4_GPIO_X3_START + (_nr)) -#define EXYNOS4_GPY0(_nr) (EXYNOS4_GPIO_Y0_START + (_nr)) -#define EXYNOS4_GPY1(_nr) (EXYNOS4_GPIO_Y1_START + (_nr)) -#define EXYNOS4_GPY2(_nr) (EXYNOS4_GPIO_Y2_START + (_nr)) -#define EXYNOS4_GPY3(_nr) (EXYNOS4_GPIO_Y3_START + (_nr)) -#define EXYNOS4_GPY4(_nr) (EXYNOS4_GPIO_Y4_START + (_nr)) -#define EXYNOS4_GPY5(_nr) (EXYNOS4_GPIO_Y5_START + (_nr)) -#define EXYNOS4_GPY6(_nr) (EXYNOS4_GPIO_Y6_START + (_nr)) -#define EXYNOS4_GPZ(_nr) (EXYNOS4_GPIO_Z_START + (_nr)) - -/* the end of the EXYNOS4 specific gpios */ - -#define EXYNOS4_GPIO_END (EXYNOS4_GPZ(EXYNOS4_GPIO_Z_NR) + 1) - -/* EXYNOS5 GPIO bank sizes */ - -#define EXYNOS5_GPIO_A0_NR (8) -#define EXYNOS5_GPIO_A1_NR (6) -#define EXYNOS5_GPIO_A2_NR (8) -#define EXYNOS5_GPIO_B0_NR (5) -#define EXYNOS5_GPIO_B1_NR (5) -#define EXYNOS5_GPIO_B2_NR (4) -#define EXYNOS5_GPIO_B3_NR (4) -#define EXYNOS5_GPIO_C0_NR (7) -#define EXYNOS5_GPIO_C1_NR (4) -#define EXYNOS5_GPIO_C2_NR (7) -#define EXYNOS5_GPIO_C3_NR (7) -#define EXYNOS5_GPIO_C4_NR (7) -#define EXYNOS5_GPIO_D0_NR (4) -#define EXYNOS5_GPIO_D1_NR (8) -#define EXYNOS5_GPIO_Y0_NR (6) -#define EXYNOS5_GPIO_Y1_NR (4) -#define EXYNOS5_GPIO_Y2_NR (6) -#define EXYNOS5_GPIO_Y3_NR (8) -#define EXYNOS5_GPIO_Y4_NR (8) -#define EXYNOS5_GPIO_Y5_NR (8) -#define EXYNOS5_GPIO_Y6_NR (8) -#define EXYNOS5_GPIO_X0_NR (8) -#define EXYNOS5_GPIO_X1_NR (8) -#define EXYNOS5_GPIO_X2_NR (8) -#define EXYNOS5_GPIO_X3_NR (8) -#define EXYNOS5_GPIO_E0_NR (8) -#define EXYNOS5_GPIO_E1_NR (2) -#define EXYNOS5_GPIO_F0_NR (4) -#define EXYNOS5_GPIO_F1_NR (4) -#define EXYNOS5_GPIO_G0_NR (8) -#define EXYNOS5_GPIO_G1_NR (8) -#define EXYNOS5_GPIO_G2_NR (2) -#define EXYNOS5_GPIO_H0_NR (4) -#define EXYNOS5_GPIO_H1_NR (8) -#define EXYNOS5_GPIO_V0_NR (8) -#define EXYNOS5_GPIO_V1_NR (8) -#define EXYNOS5_GPIO_V2_NR (8) -#define EXYNOS5_GPIO_V3_NR (8) -#define EXYNOS5_GPIO_V4_NR (2) -#define EXYNOS5_GPIO_Z_NR (7) - -/* EXYNOS5 GPIO bank numbers */ - -enum exynos5_gpio_number { - EXYNOS5_GPIO_A0_START = 0, - EXYNOS5_GPIO_A1_START = EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_A0), - EXYNOS5_GPIO_A2_START = EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_A1), - EXYNOS5_GPIO_B0_START = EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_A2), - EXYNOS5_GPIO_B1_START = EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_B0), - EXYNOS5_GPIO_B2_START = EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_B1), - EXYNOS5_GPIO_B3_START = EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_B2), - EXYNOS5_GPIO_C0_START = EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_B3), - EXYNOS5_GPIO_C1_START = EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_C0), - EXYNOS5_GPIO_C2_START = EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_C1), - EXYNOS5_GPIO_C3_START = EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_C2), - EXYNOS5_GPIO_C4_START = EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_C3), - EXYNOS5_GPIO_D0_START = EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_C4), - EXYNOS5_GPIO_D1_START = EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_D0), - EXYNOS5_GPIO_Y0_START = EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_D1), - EXYNOS5_GPIO_Y1_START = EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_Y0), - EXYNOS5_GPIO_Y2_START = EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_Y1), - EXYNOS5_GPIO_Y3_START = EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_Y2), - EXYNOS5_GPIO_Y4_START = EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_Y3), - EXYNOS5_GPIO_Y5_START = EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_Y4), - EXYNOS5_GPIO_Y6_START = EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_Y5), - EXYNOS5_GPIO_X0_START = EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_Y6), - EXYNOS5_GPIO_X1_START = EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_X0), - EXYNOS5_GPIO_X2_START = EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_X1), - EXYNOS5_GPIO_X3_START = EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_X2), - EXYNOS5_GPIO_E0_START = EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_X3), - EXYNOS5_GPIO_E1_START = EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_E0), - EXYNOS5_GPIO_F0_START = EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_E1), - EXYNOS5_GPIO_F1_START = EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_F0), - EXYNOS5_GPIO_G0_START = EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_F1), - EXYNOS5_GPIO_G1_START = EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_G0), - EXYNOS5_GPIO_G2_START = EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_G1), - EXYNOS5_GPIO_H0_START = EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_G2), - EXYNOS5_GPIO_H1_START = EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_H0), - EXYNOS5_GPIO_V0_START = EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_H1), - EXYNOS5_GPIO_V1_START = EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_V0), - EXYNOS5_GPIO_V2_START = EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_V1), - EXYNOS5_GPIO_V3_START = EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_V2), - EXYNOS5_GPIO_V4_START = EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_V3), - EXYNOS5_GPIO_Z_START = EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_V4), -}; - -/* EXYNOS5 GPIO number definitions */ - -#define EXYNOS5_GPA0(_nr) (EXYNOS5_GPIO_A0_START + (_nr)) -#define EXYNOS5_GPA1(_nr) (EXYNOS5_GPIO_A1_START + (_nr)) -#define EXYNOS5_GPA2(_nr) (EXYNOS5_GPIO_A2_START + (_nr)) -#define EXYNOS5_GPB0(_nr) (EXYNOS5_GPIO_B0_START + (_nr)) -#define EXYNOS5_GPB1(_nr) (EXYNOS5_GPIO_B1_START + (_nr)) -#define EXYNOS5_GPB2(_nr) (EXYNOS5_GPIO_B2_START + (_nr)) -#define EXYNOS5_GPB3(_nr) (EXYNOS5_GPIO_B3_START + (_nr)) -#define EXYNOS5_GPC0(_nr) (EXYNOS5_GPIO_C0_START + (_nr)) -#define EXYNOS5_GPC1(_nr) (EXYNOS5_GPIO_C1_START + (_nr)) -#define EXYNOS5_GPC2(_nr) (EXYNOS5_GPIO_C2_START + (_nr)) -#define EXYNOS5_GPC3(_nr) (EXYNOS5_GPIO_C3_START + (_nr)) -#define EXYNOS5_GPC4(_nr) (EXYNOS5_GPIO_C4_START + (_nr)) -#define EXYNOS5_GPD0(_nr) (EXYNOS5_GPIO_D0_START + (_nr)) -#define EXYNOS5_GPD1(_nr) (EXYNOS5_GPIO_D1_START + (_nr)) -#define EXYNOS5_GPY0(_nr) (EXYNOS5_GPIO_Y0_START + (_nr)) -#define EXYNOS5_GPY1(_nr) (EXYNOS5_GPIO_Y1_START + (_nr)) -#define EXYNOS5_GPY2(_nr) (EXYNOS5_GPIO_Y2_START + (_nr)) -#define EXYNOS5_GPY3(_nr) (EXYNOS5_GPIO_Y3_START + (_nr)) -#define EXYNOS5_GPY4(_nr) (EXYNOS5_GPIO_Y4_START + (_nr)) -#define EXYNOS5_GPY5(_nr) (EXYNOS5_GPIO_Y5_START + (_nr)) -#define EXYNOS5_GPY6(_nr) (EXYNOS5_GPIO_Y6_START + (_nr)) -#define EXYNOS5_GPX0(_nr) (EXYNOS5_GPIO_X0_START + (_nr)) -#define EXYNOS5_GPX1(_nr) (EXYNOS5_GPIO_X1_START + (_nr)) -#define EXYNOS5_GPX2(_nr) (EXYNOS5_GPIO_X2_START + (_nr)) -#define EXYNOS5_GPX3(_nr) (EXYNOS5_GPIO_X3_START + (_nr)) -#define EXYNOS5_GPE0(_nr) (EXYNOS5_GPIO_E0_START + (_nr)) -#define EXYNOS5_GPE1(_nr) (EXYNOS5_GPIO_E1_START + (_nr)) -#define EXYNOS5_GPF0(_nr) (EXYNOS5_GPIO_F0_START + (_nr)) -#define EXYNOS5_GPF1(_nr) (EXYNOS5_GPIO_F1_START + (_nr)) -#define EXYNOS5_GPG0(_nr) (EXYNOS5_GPIO_G0_START + (_nr)) -#define EXYNOS5_GPG1(_nr) (EXYNOS5_GPIO_G1_START + (_nr)) -#define EXYNOS5_GPG2(_nr) (EXYNOS5_GPIO_G2_START + (_nr)) -#define EXYNOS5_GPH0(_nr) (EXYNOS5_GPIO_H0_START + (_nr)) -#define EXYNOS5_GPH1(_nr) (EXYNOS5_GPIO_H1_START + (_nr)) -#define EXYNOS5_GPV0(_nr) (EXYNOS5_GPIO_V0_START + (_nr)) -#define EXYNOS5_GPV1(_nr) (EXYNOS5_GPIO_V1_START + (_nr)) -#define EXYNOS5_GPV2(_nr) (EXYNOS5_GPIO_V2_START + (_nr)) -#define EXYNOS5_GPV3(_nr) (EXYNOS5_GPIO_V3_START + (_nr)) -#define EXYNOS5_GPV4(_nr) (EXYNOS5_GPIO_V4_START + (_nr)) -#define EXYNOS5_GPZ(_nr) (EXYNOS5_GPIO_Z_START + (_nr)) - -/* the end of the EXYNOS5 specific gpios */ - -#define EXYNOS5_GPIO_END (EXYNOS5_GPZ(EXYNOS5_GPIO_Z_NR) + 1) - -/* actually, EXYNOS5_GPIO_END is bigger than EXYNOS4 */ - -#define S3C_GPIO_END (EXYNOS5_GPIO_END) - -/* define the number of gpios */ - -#define ARCH_NR_GPIOS (CONFIG_SAMSUNG_GPIO_EXTRA + S3C_GPIO_END) - -#endif /* __ASM_ARCH_GPIO_H */ diff --git a/arch/arm/mach-exynos/include/mach/irqs.h b/arch/arm/mach-exynos/include/mach/irqs.h deleted file mode 100644 index c72f59d91fce..000000000000 --- a/arch/arm/mach-exynos/include/mach/irqs.h +++ /dev/null @@ -1,476 +0,0 @@ -/* - * Copyright (c) 2010-2012 Samsung Electronics Co., Ltd. - * http://www.samsung.com - * - * EXYNOS - IRQ definitions - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __ASM_ARCH_IRQS_H -#define __ASM_ARCH_IRQS_H __FILE__ - -#include <plat/irqs.h> - -/* PPI: Private Peripheral Interrupt */ - -#define IRQ_PPI(x) (x + 16) - -/* SPI: Shared Peripheral Interrupt */ - -#define IRQ_SPI(x) (x + 32) - -/* COMBINER */ - -#define MAX_IRQ_IN_COMBINER 8 -#define COMBINER_GROUP(x) ((x) * MAX_IRQ_IN_COMBINER + IRQ_SPI(128)) -#define COMBINER_IRQ(x, y) (COMBINER_GROUP(x) + y) - -/* For EXYNOS4 and EXYNOS5 */ - -#define EXYNOS_IRQ_EINT16_31 IRQ_SPI(32) - -/* For EXYNOS4 SoCs */ - -#define EXYNOS4_IRQ_EINT0 IRQ_SPI(16) -#define EXYNOS4_IRQ_EINT1 IRQ_SPI(17) -#define EXYNOS4_IRQ_EINT2 IRQ_SPI(18) -#define EXYNOS4_IRQ_EINT3 IRQ_SPI(19) -#define EXYNOS4_IRQ_EINT4 IRQ_SPI(20) -#define EXYNOS4_IRQ_EINT5 IRQ_SPI(21) -#define EXYNOS4_IRQ_EINT6 IRQ_SPI(22) -#define EXYNOS4_IRQ_EINT7 IRQ_SPI(23) -#define EXYNOS4_IRQ_EINT8 IRQ_SPI(24) -#define EXYNOS4_IRQ_EINT9 IRQ_SPI(25) -#define EXYNOS4_IRQ_EINT10 IRQ_SPI(26) -#define EXYNOS4_IRQ_EINT11 IRQ_SPI(27) -#define EXYNOS4_IRQ_EINT12 IRQ_SPI(28) -#define EXYNOS4_IRQ_EINT13 IRQ_SPI(29) -#define EXYNOS4_IRQ_EINT14 IRQ_SPI(30) -#define EXYNOS4_IRQ_EINT15 IRQ_SPI(31) - -#define EXYNOS4_IRQ_MDMA0 IRQ_SPI(33) -#define EXYNOS4_IRQ_MDMA1 IRQ_SPI(34) -#define EXYNOS4_IRQ_PDMA0 IRQ_SPI(35) -#define EXYNOS4_IRQ_PDMA1 IRQ_SPI(36) -#define EXYNOS4_IRQ_TIMER0_VIC IRQ_SPI(37) -#define EXYNOS4_IRQ_TIMER1_VIC IRQ_SPI(38) -#define EXYNOS4_IRQ_TIMER2_VIC IRQ_SPI(39) -#define EXYNOS4_IRQ_TIMER3_VIC IRQ_SPI(40) -#define EXYNOS4_IRQ_TIMER4_VIC IRQ_SPI(41) -#define EXYNOS4_IRQ_MCT_L0 IRQ_SPI(42) -#define EXYNOS4_IRQ_WDT IRQ_SPI(43) -#define EXYNOS4_IRQ_RTC_ALARM IRQ_SPI(44) -#define EXYNOS4_IRQ_RTC_TIC IRQ_SPI(45) -#define EXYNOS4_IRQ_GPIO_XB IRQ_SPI(46) -#define EXYNOS4_IRQ_GPIO_XA IRQ_SPI(47) -#define EXYNOS4_IRQ_MCT_L1 IRQ_SPI(48) - -#define EXYNOS4_IRQ_UART0 IRQ_SPI(52) -#define EXYNOS4_IRQ_UART1 IRQ_SPI(53) -#define EXYNOS4_IRQ_UART2 IRQ_SPI(54) -#define EXYNOS4_IRQ_UART3 IRQ_SPI(55) -#define EXYNOS4_IRQ_UART4 IRQ_SPI(56) -#define EXYNOS4_IRQ_MCT_G0 IRQ_SPI(57) -#define EXYNOS4_IRQ_IIC IRQ_SPI(58) -#define EXYNOS4_IRQ_IIC1 IRQ_SPI(59) -#define EXYNOS4_IRQ_IIC2 IRQ_SPI(60) -#define EXYNOS4_IRQ_IIC3 IRQ_SPI(61) -#define EXYNOS4_IRQ_IIC4 IRQ_SPI(62) -#define EXYNOS4_IRQ_IIC5 IRQ_SPI(63) -#define EXYNOS4_IRQ_IIC6 IRQ_SPI(64) -#define EXYNOS4_IRQ_IIC7 IRQ_SPI(65) -#define EXYNOS4_IRQ_SPI0 IRQ_SPI(66) -#define EXYNOS4_IRQ_SPI1 IRQ_SPI(67) -#define EXYNOS4_IRQ_SPI2 IRQ_SPI(68) - -#define EXYNOS4_IRQ_USB_HOST IRQ_SPI(70) -#define EXYNOS4_IRQ_USB_HSOTG IRQ_SPI(71) -#define EXYNOS4_IRQ_MODEM_IF IRQ_SPI(72) -#define EXYNOS4_IRQ_HSMMC0 IRQ_SPI(73) -#define EXYNOS4_IRQ_HSMMC1 IRQ_SPI(74) -#define EXYNOS4_IRQ_HSMMC2 IRQ_SPI(75) -#define EXYNOS4_IRQ_HSMMC3 IRQ_SPI(76) -#define EXYNOS4_IRQ_DWMCI IRQ_SPI(77) - -#define EXYNOS4_IRQ_MIPI_CSIS0 IRQ_SPI(78) -#define EXYNOS4_IRQ_MIPI_CSIS1 IRQ_SPI(80) - -#define EXYNOS4_IRQ_ONENAND_AUDI IRQ_SPI(82) -#define EXYNOS4_IRQ_ROTATOR IRQ_SPI(83) -#define EXYNOS4_IRQ_FIMC0 IRQ_SPI(84) -#define EXYNOS4_IRQ_FIMC1 IRQ_SPI(85) -#define EXYNOS4_IRQ_FIMC2 IRQ_SPI(86) -#define EXYNOS4_IRQ_FIMC3 IRQ_SPI(87) -#define EXYNOS4_IRQ_JPEG IRQ_SPI(88) -#define EXYNOS4_IRQ_2D IRQ_SPI(89) -#define EXYNOS4_IRQ_PCIE IRQ_SPI(90) - -#define EXYNOS4_IRQ_MIXER IRQ_SPI(91) -#define EXYNOS4_IRQ_HDMI IRQ_SPI(92) -#define EXYNOS4_IRQ_IIC_HDMIPHY IRQ_SPI(93) -#define EXYNOS4_IRQ_MFC IRQ_SPI(94) -#define EXYNOS4_IRQ_SDO IRQ_SPI(95) - -#define EXYNOS4_IRQ_AUDIO_SS IRQ_SPI(96) -#define EXYNOS4_IRQ_I2S0 IRQ_SPI(97) -#define EXYNOS4_IRQ_I2S1 IRQ_SPI(98) -#define EXYNOS4_IRQ_I2S2 IRQ_SPI(99) -#define EXYNOS4_IRQ_AC97 IRQ_SPI(100) - -#define EXYNOS4_IRQ_SPDIF IRQ_SPI(104) -#define EXYNOS4_IRQ_ADC0 IRQ_SPI(105) -#define EXYNOS4_IRQ_PEN0 IRQ_SPI(106) -#define EXYNOS4_IRQ_ADC1 IRQ_SPI(107) -#define EXYNOS4_IRQ_PEN1 IRQ_SPI(108) -#define EXYNOS4_IRQ_KEYPAD IRQ_SPI(109) -#define EXYNOS4_IRQ_POWER_PMU IRQ_SPI(110) -#define EXYNOS4_IRQ_GPS IRQ_SPI(111) -#define EXYNOS4_IRQ_INTFEEDCTRL_SSS IRQ_SPI(112) -#define EXYNOS4_IRQ_SLIMBUS IRQ_SPI(113) - -#define EXYNOS4_IRQ_TSI IRQ_SPI(115) -#define EXYNOS4_IRQ_SATA IRQ_SPI(116) - -#define EXYNOS4_IRQ_PMU COMBINER_IRQ(2, 2) -#define EXYNOS4_IRQ_PMU_CPU1 COMBINER_IRQ(3, 2) -#define EXYNOS4_IRQ_PMU_CPU2 COMBINER_IRQ(18, 2) -#define EXYNOS4_IRQ_PMU_CPU3 COMBINER_IRQ(19, 2) - -#define EXYNOS4_IRQ_TMU_TRIG0 COMBINER_IRQ(2, 4) -#define EXYNOS4_IRQ_TMU_TRIG1 COMBINER_IRQ(3, 4) - -#define EXYNOS4_IRQ_SYSMMU_MDMA0_0 COMBINER_IRQ(4, 0) -#define EXYNOS4_IRQ_SYSMMU_SSS_0 COMBINER_IRQ(4, 1) -#define EXYNOS4_IRQ_SYSMMU_FIMC0_0 COMBINER_IRQ(4, 2) -#define EXYNOS4_IRQ_SYSMMU_FIMC1_0 COMBINER_IRQ(4, 3) -#define EXYNOS4_IRQ_SYSMMU_FIMC2_0 COMBINER_IRQ(4, 4) -#define EXYNOS4_IRQ_SYSMMU_FIMC3_0 COMBINER_IRQ(4, 5) -#define EXYNOS4_IRQ_SYSMMU_JPEG_0 COMBINER_IRQ(4, 6) -#define EXYNOS4_IRQ_SYSMMU_2D_0 COMBINER_IRQ(4, 7) - -#define EXYNOS4_IRQ_SYSMMU_ROTATOR_0 COMBINER_IRQ(5, 0) -#define EXYNOS4_IRQ_SYSMMU_MDMA1_0 COMBINER_IRQ(5, 1) -#define EXYNOS4_IRQ_SYSMMU_LCD0_M0_0 COMBINER_IRQ(5, 2) -#define EXYNOS4_IRQ_SYSMMU_LCD1_M1_0 COMBINER_IRQ(5, 3) -#define EXYNOS4_IRQ_SYSMMU_TV_M0_0 COMBINER_IRQ(5, 4) -#define EXYNOS4_IRQ_SYSMMU_MFC_M0_0 COMBINER_IRQ(5, 5) -#define EXYNOS4_IRQ_SYSMMU_MFC_M1_0 COMBINER_IRQ(5, 6) -#define EXYNOS4_IRQ_SYSMMU_PCIE_0 COMBINER_IRQ(5, 7) - -#define EXYNOS4_IRQ_SYSMMU_FIMC_LITE0_0 COMBINER_IRQ(16, 0) -#define EXYNOS4_IRQ_SYSMMU_FIMC_LITE1_0 COMBINER_IRQ(16, 1) -#define EXYNOS4_IRQ_SYSMMU_FIMC_ISP_0 COMBINER_IRQ(16, 2) -#define EXYNOS4_IRQ_SYSMMU_FIMC_DRC_0 COMBINER_IRQ(16, 3) -#define EXYNOS4_IRQ_SYSMMU_FIMC_FD_0 COMBINER_IRQ(16, 4) -#define EXYNOS4_IRQ_SYSMMU_FIMC_CX_0 COMBINER_IRQ(16, 5) - -#define EXYNOS4_IRQ_FIMD0_FIFO COMBINER_IRQ(11, 0) -#define EXYNOS4_IRQ_FIMD0_VSYNC COMBINER_IRQ(11, 1) -#define EXYNOS4_IRQ_FIMD0_SYSTEM COMBINER_IRQ(11, 2) - -#define EXYNOS4210_MAX_COMBINER_NR 16 -#define EXYNOS4212_MAX_COMBINER_NR 18 -#define EXYNOS4412_MAX_COMBINER_NR 20 -#define EXYNOS4_MAX_COMBINER_NR EXYNOS4412_MAX_COMBINER_NR - -#define EXYNOS4_IRQ_GPIO1_NR_GROUPS 16 -#define EXYNOS4_IRQ_GPIO2_NR_GROUPS 9 - -/* - * For Compatibility: - * the default is for EXYNOS4, and - * for exynos5, should be re-mapped at function - */ - -#define IRQ_TIMER0_VIC EXYNOS4_IRQ_TIMER0_VIC -#define IRQ_TIMER1_VIC EXYNOS4_IRQ_TIMER1_VIC -#define IRQ_TIMER2_VIC EXYNOS4_IRQ_TIMER2_VIC -#define IRQ_TIMER3_VIC EXYNOS4_IRQ_TIMER3_VIC -#define IRQ_TIMER4_VIC EXYNOS4_IRQ_TIMER4_VIC - -#define IRQ_WDT EXYNOS4_IRQ_WDT -#define IRQ_RTC_ALARM EXYNOS4_IRQ_RTC_ALARM -#define IRQ_RTC_TIC EXYNOS4_IRQ_RTC_TIC -#define IRQ_GPIO_XB EXYNOS4_IRQ_GPIO_XB -#define IRQ_GPIO_XA EXYNOS4_IRQ_GPIO_XA - -#define IRQ_IIC EXYNOS4_IRQ_IIC -#define IRQ_IIC1 EXYNOS4_IRQ_IIC1 -#define IRQ_IIC3 EXYNOS4_IRQ_IIC3 -#define IRQ_IIC5 EXYNOS4_IRQ_IIC5 -#define IRQ_IIC6 EXYNOS4_IRQ_IIC6 -#define IRQ_IIC7 EXYNOS4_IRQ_IIC7 - -#define IRQ_SPI0 EXYNOS4_IRQ_SPI0 -#define IRQ_SPI1 EXYNOS4_IRQ_SPI1 -#define IRQ_SPI2 EXYNOS4_IRQ_SPI2 - -#define IRQ_USB_HOST EXYNOS4_IRQ_USB_HOST -#define IRQ_OTG EXYNOS4_IRQ_USB_HSOTG - -#define IRQ_HSMMC0 EXYNOS4_IRQ_HSMMC0 -#define IRQ_HSMMC1 EXYNOS4_IRQ_HSMMC1 -#define IRQ_HSMMC2 EXYNOS4_IRQ_HSMMC2 -#define IRQ_HSMMC3 EXYNOS4_IRQ_HSMMC3 - -#define IRQ_MIPI_CSIS0 EXYNOS4_IRQ_MIPI_CSIS0 - -#define IRQ_ONENAND_AUDI EXYNOS4_IRQ_ONENAND_AUDI - -#define IRQ_FIMC0 EXYNOS4_IRQ_FIMC0 -#define IRQ_FIMC1 EXYNOS4_IRQ_FIMC1 -#define IRQ_FIMC2 EXYNOS4_IRQ_FIMC2 -#define IRQ_FIMC3 EXYNOS4_IRQ_FIMC3 -#define IRQ_JPEG EXYNOS4_IRQ_JPEG -#define IRQ_2D EXYNOS4_IRQ_2D - -#define IRQ_MIXER EXYNOS4_IRQ_MIXER -#define IRQ_HDMI EXYNOS4_IRQ_HDMI -#define IRQ_IIC_HDMIPHY EXYNOS4_IRQ_IIC_HDMIPHY -#define IRQ_MFC EXYNOS4_IRQ_MFC -#define IRQ_SDO EXYNOS4_IRQ_SDO - -#define IRQ_I2S0 EXYNOS4_IRQ_I2S0 - -#define IRQ_ADC EXYNOS4_IRQ_ADC0 -#define IRQ_TC EXYNOS4_IRQ_PEN0 - -#define IRQ_KEYPAD EXYNOS4_IRQ_KEYPAD - -#define IRQ_FIMD0_FIFO EXYNOS4_IRQ_FIMD0_FIFO -#define IRQ_FIMD0_VSYNC EXYNOS4_IRQ_FIMD0_VSYNC -#define IRQ_FIMD0_SYSTEM EXYNOS4_IRQ_FIMD0_SYSTEM - -#define IRQ_GPIO1_NR_GROUPS EXYNOS4_IRQ_GPIO1_NR_GROUPS -#define IRQ_GPIO2_NR_GROUPS EXYNOS4_IRQ_GPIO2_NR_GROUPS - -/* For EXYNOS5 SoCs */ - -#define EXYNOS5_IRQ_MDMA0 IRQ_SPI(33) -#define EXYNOS5_IRQ_PDMA0 IRQ_SPI(34) -#define EXYNOS5_IRQ_PDMA1 IRQ_SPI(35) -#define EXYNOS5_IRQ_TIMER0_VIC IRQ_SPI(36) -#define EXYNOS5_IRQ_TIMER1_VIC IRQ_SPI(37) -#define EXYNOS5_IRQ_TIMER2_VIC IRQ_SPI(38) -#define EXYNOS5_IRQ_TIMER3_VIC IRQ_SPI(39) -#define EXYNOS5_IRQ_TIMER4_VIC IRQ_SPI(40) -#define EXYNOS5_IRQ_RTIC IRQ_SPI(41) -#define EXYNOS5_IRQ_WDT IRQ_SPI(42) -#define EXYNOS5_IRQ_RTC_ALARM IRQ_SPI(43) -#define EXYNOS5_IRQ_RTC_TIC IRQ_SPI(44) -#define EXYNOS5_IRQ_GPIO_XB IRQ_SPI(45) -#define EXYNOS5_IRQ_GPIO_XA IRQ_SPI(46) -#define EXYNOS5_IRQ_GPIO IRQ_SPI(47) -#define EXYNOS5_IRQ_IEM_IEC IRQ_SPI(48) -#define EXYNOS5_IRQ_IEM_APC IRQ_SPI(49) -#define EXYNOS5_IRQ_GPIO_C2C IRQ_SPI(50) -#define EXYNOS5_IRQ_IIC IRQ_SPI(56) -#define EXYNOS5_IRQ_IIC1 IRQ_SPI(57) -#define EXYNOS5_IRQ_IIC2 IRQ_SPI(58) -#define EXYNOS5_IRQ_IIC3 IRQ_SPI(59) -#define EXYNOS5_IRQ_IIC4 IRQ_SPI(60) -#define EXYNOS5_IRQ_IIC5 IRQ_SPI(61) -#define EXYNOS5_IRQ_IIC6 IRQ_SPI(62) -#define EXYNOS5_IRQ_IIC7 IRQ_SPI(63) -#define EXYNOS5_IRQ_IIC_HDMIPHY IRQ_SPI(64) -#define EXYNOS5_IRQ_TMU IRQ_SPI(65) -#define EXYNOS5_IRQ_FIQ_0 IRQ_SPI(66) -#define EXYNOS5_IRQ_FIQ_1 IRQ_SPI(67) -#define EXYNOS5_IRQ_SPI0 IRQ_SPI(68) -#define EXYNOS5_IRQ_SPI1 IRQ_SPI(69) -#define EXYNOS5_IRQ_SPI2 IRQ_SPI(70) -#define EXYNOS5_IRQ_USB_HOST IRQ_SPI(71) -#define EXYNOS5_IRQ_USB3_DRD IRQ_SPI(72) -#define EXYNOS5_IRQ_MIPI_HSI IRQ_SPI(73) -#define EXYNOS5_IRQ_USB_HSOTG IRQ_SPI(74) -#define EXYNOS5_IRQ_HSMMC0 IRQ_SPI(75) -#define EXYNOS5_IRQ_HSMMC1 IRQ_SPI(76) -#define EXYNOS5_IRQ_HSMMC2 IRQ_SPI(77) -#define EXYNOS5_IRQ_HSMMC3 IRQ_SPI(78) -#define EXYNOS5_IRQ_MIPICSI0 IRQ_SPI(79) -#define EXYNOS5_IRQ_MIPICSI1 IRQ_SPI(80) -#define EXYNOS5_IRQ_EFNFCON_DMA_ABORT IRQ_SPI(81) -#define EXYNOS5_IRQ_MIPIDSI0 IRQ_SPI(82) -#define EXYNOS5_IRQ_WDT_IOP IRQ_SPI(83) -#define EXYNOS5_IRQ_ROTATOR IRQ_SPI(84) -#define EXYNOS5_IRQ_GSC0 IRQ_SPI(85) -#define EXYNOS5_IRQ_GSC1 IRQ_SPI(86) -#define EXYNOS5_IRQ_GSC2 IRQ_SPI(87) -#define EXYNOS5_IRQ_GSC3 IRQ_SPI(88) -#define EXYNOS5_IRQ_JPEG IRQ_SPI(89) -#define EXYNOS5_IRQ_EFNFCON_DMA IRQ_SPI(90) -#define EXYNOS5_IRQ_2D IRQ_SPI(91) -#define EXYNOS5_IRQ_EFNFCON_0 IRQ_SPI(92) -#define EXYNOS5_IRQ_EFNFCON_1 IRQ_SPI(93) -#define EXYNOS5_IRQ_MIXER IRQ_SPI(94) -#define EXYNOS5_IRQ_HDMI IRQ_SPI(95) -#define EXYNOS5_IRQ_MFC IRQ_SPI(96) -#define EXYNOS5_IRQ_AUDIO_SS IRQ_SPI(97) -#define EXYNOS5_IRQ_I2S0 IRQ_SPI(98) -#define EXYNOS5_IRQ_I2S1 IRQ_SPI(99) -#define EXYNOS5_IRQ_I2S2 IRQ_SPI(100) -#define EXYNOS5_IRQ_AC97 IRQ_SPI(101) -#define EXYNOS5_IRQ_PCM0 IRQ_SPI(102) -#define EXYNOS5_IRQ_PCM1 IRQ_SPI(103) -#define EXYNOS5_IRQ_PCM2 IRQ_SPI(104) -#define EXYNOS5_IRQ_SPDIF IRQ_SPI(105) -#define EXYNOS5_IRQ_ADC0 IRQ_SPI(106) -#define EXYNOS5_IRQ_ADC1 IRQ_SPI(107) -#define EXYNOS5_IRQ_SATA_PHY IRQ_SPI(108) -#define EXYNOS5_IRQ_SATA_PMEMREQ IRQ_SPI(109) -#define EXYNOS5_IRQ_CAM_C IRQ_SPI(110) -#define EXYNOS5_IRQ_EAGLE_PMU IRQ_SPI(111) -#define EXYNOS5_IRQ_INTFEEDCTRL_SSS IRQ_SPI(112) -#define EXYNOS5_IRQ_DP1_INTP1 IRQ_SPI(113) -#define EXYNOS5_IRQ_CEC IRQ_SPI(114) -#define EXYNOS5_IRQ_SATA IRQ_SPI(115) - -#define EXYNOS5_IRQ_MMC44 IRQ_SPI(123) -#define EXYNOS5_IRQ_MDMA1 IRQ_SPI(124) -#define EXYNOS5_IRQ_FIMC_LITE0 IRQ_SPI(125) -#define EXYNOS5_IRQ_FIMC_LITE1 IRQ_SPI(126) -#define EXYNOS5_IRQ_RP_TIMER IRQ_SPI(127) - -/* EXYNOS5440 */ - -#define EXYNOS5440_IRQ_UART0 IRQ_SPI(2) -#define EXYNOS5440_IRQ_UART1 IRQ_SPI(3) - -#define EXYNOS5_IRQ_PMU COMBINER_IRQ(1, 2) - -#define EXYNOS5_IRQ_SYSMMU_GSC0_0 COMBINER_IRQ(2, 0) -#define EXYNOS5_IRQ_SYSMMU_GSC0_1 COMBINER_IRQ(2, 1) -#define EXYNOS5_IRQ_SYSMMU_GSC1_0 COMBINER_IRQ(2, 2) -#define EXYNOS5_IRQ_SYSMMU_GSC1_1 COMBINER_IRQ(2, 3) -#define EXYNOS5_IRQ_SYSMMU_GSC2_0 COMBINER_IRQ(2, 4) -#define EXYNOS5_IRQ_SYSMMU_GSC2_1 COMBINER_IRQ(2, 5) -#define EXYNOS5_IRQ_SYSMMU_GSC3_0 COMBINER_IRQ(2, 6) -#define EXYNOS5_IRQ_SYSMMU_GSC3_1 COMBINER_IRQ(2, 7) - -#define EXYNOS5_IRQ_SYSMMU_LITE2_0 COMBINER_IRQ(3, 0) -#define EXYNOS5_IRQ_SYSMMU_LITE2_1 COMBINER_IRQ(3, 1) -#define EXYNOS5_IRQ_SYSMMU_FIMD1_0 COMBINER_IRQ(3, 2) -#define EXYNOS5_IRQ_SYSMMU_FIMD1_1 COMBINER_IRQ(3, 3) -#define EXYNOS5_IRQ_SYSMMU_LITE0_0 COMBINER_IRQ(3, 4) -#define EXYNOS5_IRQ_SYSMMU_LITE0_1 COMBINER_IRQ(3, 5) -#define EXYNOS5_IRQ_SYSMMU_SCALERPISP_0 COMBINER_IRQ(3, 6) -#define EXYNOS5_IRQ_SYSMMU_SCALERPISP_1 COMBINER_IRQ(3, 7) - -#define EXYNOS5_IRQ_SYSMMU_ROTATOR_0 COMBINER_IRQ(4, 0) -#define EXYNOS5_IRQ_SYSMMU_ROTATOR_1 COMBINER_IRQ(4, 1) -#define EXYNOS5_IRQ_SYSMMU_JPEG_0 COMBINER_IRQ(4, 2) -#define EXYNOS5_IRQ_SYSMMU_JPEG_1 COMBINER_IRQ(4, 3) - -#define EXYNOS5_IRQ_SYSMMU_FD_0 COMBINER_IRQ(5, 0) -#define EXYNOS5_IRQ_SYSMMU_FD_1 COMBINER_IRQ(5, 1) -#define EXYNOS5_IRQ_SYSMMU_SCALERCISP_0 COMBINER_IRQ(5, 2) -#define EXYNOS5_IRQ_SYSMMU_SCALERCISP_1 COMBINER_IRQ(5, 3) -#define EXYNOS5_IRQ_SYSMMU_MCUISP_0 COMBINER_IRQ(5, 4) -#define EXYNOS5_IRQ_SYSMMU_MCUISP_1 COMBINER_IRQ(5, 5) -#define EXYNOS5_IRQ_SYSMMU_3DNR_0 COMBINER_IRQ(5, 6) -#define EXYNOS5_IRQ_SYSMMU_3DNR_1 COMBINER_IRQ(5, 7) - -#define EXYNOS5_IRQ_SYSMMU_ARM_0 COMBINER_IRQ(6, 0) -#define EXYNOS5_IRQ_SYSMMU_ARM_1 COMBINER_IRQ(6, 1) -#define EXYNOS5_IRQ_SYSMMU_MFC_R_0 COMBINER_IRQ(6, 2) -#define EXYNOS5_IRQ_SYSMMU_MFC_R_1 COMBINER_IRQ(6, 3) -#define EXYNOS5_IRQ_SYSMMU_RTIC_0 COMBINER_IRQ(6, 4) -#define EXYNOS5_IRQ_SYSMMU_RTIC_1 COMBINER_IRQ(6, 5) -#define EXYNOS5_IRQ_SYSMMU_SSS_0 COMBINER_IRQ(6, 6) -#define EXYNOS5_IRQ_SYSMMU_SSS_1 COMBINER_IRQ(6, 7) - -#define EXYNOS5_IRQ_SYSMMU_MDMA0_0 COMBINER_IRQ(7, 0) -#define EXYNOS5_IRQ_SYSMMU_MDMA0_1 COMBINER_IRQ(7, 1) -#define EXYNOS5_IRQ_SYSMMU_MDMA1_0 COMBINER_IRQ(7, 2) -#define EXYNOS5_IRQ_SYSMMU_MDMA1_1 COMBINER_IRQ(7, 3) -#define EXYNOS5_IRQ_SYSMMU_TV_0 COMBINER_IRQ(7, 4) -#define EXYNOS5_IRQ_SYSMMU_TV_1 COMBINER_IRQ(7, 5) - -#define EXYNOS5_IRQ_SYSMMU_MFC_L_0 COMBINER_IRQ(8, 5) -#define EXYNOS5_IRQ_SYSMMU_MFC_L_1 COMBINER_IRQ(8, 6) - -#define EXYNOS5_IRQ_SYSMMU_DIS1_0 COMBINER_IRQ(9, 4) -#define EXYNOS5_IRQ_SYSMMU_DIS1_1 COMBINER_IRQ(9, 5) - -#define EXYNOS5_IRQ_DP COMBINER_IRQ(10, 3) -#define EXYNOS5_IRQ_SYSMMU_DIS0_0 COMBINER_IRQ(10, 4) -#define EXYNOS5_IRQ_SYSMMU_DIS0_1 COMBINER_IRQ(10, 5) -#define EXYNOS5_IRQ_SYSMMU_ISP_0 COMBINER_IRQ(10, 6) -#define EXYNOS5_IRQ_SYSMMU_ISP_1 COMBINER_IRQ(10, 7) - -#define EXYNOS5_IRQ_SYSMMU_ODC_0 COMBINER_IRQ(11, 0) -#define EXYNOS5_IRQ_SYSMMU_ODC_1 COMBINER_IRQ(11, 1) -#define EXYNOS5_IRQ_SYSMMU_DRC_0 COMBINER_IRQ(11, 6) -#define EXYNOS5_IRQ_SYSMMU_DRC_1 COMBINER_IRQ(11, 7) - -#define EXYNOS5_IRQ_MDMA1_ABORT COMBINER_IRQ(13, 1) - -#define EXYNOS5_IRQ_MDMA0_ABORT COMBINER_IRQ(15, 3) - -#define EXYNOS5_IRQ_FIMD1_FIFO COMBINER_IRQ(18, 4) -#define EXYNOS5_IRQ_FIMD1_VSYNC COMBINER_IRQ(18, 5) -#define EXYNOS5_IRQ_FIMD1_SYSTEM COMBINER_IRQ(18, 6) - -#define EXYNOS5_IRQ_ARMIOP_GIC COMBINER_IRQ(19, 0) -#define EXYNOS5_IRQ_ARMISP_GIC COMBINER_IRQ(19, 1) -#define EXYNOS5_IRQ_IOP_GIC COMBINER_IRQ(19, 3) -#define EXYNOS5_IRQ_ISP_GIC COMBINER_IRQ(19, 4) - -#define EXYNOS5_IRQ_PMU_CPU1 COMBINER_IRQ(22, 4) - -#define EXYNOS5_IRQ_EINT0 COMBINER_IRQ(23, 0) - -#define EXYNOS5_IRQ_EINT1 COMBINER_IRQ(24, 0) -#define EXYNOS5_IRQ_SYSMMU_LITE1_0 COMBINER_IRQ(24, 1) -#define EXYNOS5_IRQ_SYSMMU_LITE1_1 COMBINER_IRQ(24, 2) -#define EXYNOS5_IRQ_SYSMMU_2D_0 COMBINER_IRQ(24, 5) -#define EXYNOS5_IRQ_SYSMMU_2D_1 COMBINER_IRQ(24, 6) - -#define EXYNOS5_IRQ_EINT2 COMBINER_IRQ(25, 0) -#define EXYNOS5_IRQ_EINT3 COMBINER_IRQ(25, 1) - -#define EXYNOS5_IRQ_EINT4 COMBINER_IRQ(26, 0) -#define EXYNOS5_IRQ_EINT5 COMBINER_IRQ(26, 1) - -#define EXYNOS5_IRQ_EINT6 COMBINER_IRQ(27, 0) -#define EXYNOS5_IRQ_EINT7 COMBINER_IRQ(27, 1) - -#define EXYNOS5_IRQ_EINT8 COMBINER_IRQ(28, 0) -#define EXYNOS5_IRQ_EINT9 COMBINER_IRQ(28, 1) - -#define EXYNOS5_IRQ_EINT10 COMBINER_IRQ(29, 0) -#define EXYNOS5_IRQ_EINT11 COMBINER_IRQ(29, 1) - -#define EXYNOS5_IRQ_EINT12 COMBINER_IRQ(30, 0) -#define EXYNOS5_IRQ_EINT13 COMBINER_IRQ(30, 1) - -#define EXYNOS5_IRQ_EINT14 COMBINER_IRQ(31, 0) -#define EXYNOS5_IRQ_EINT15 COMBINER_IRQ(31, 1) - -#define EXYNOS5_MAX_COMBINER_NR 32 - -#define EXYNOS5_IRQ_GPIO1_NR_GROUPS 14 -#define EXYNOS5_IRQ_GPIO2_NR_GROUPS 9 -#define EXYNOS5_IRQ_GPIO3_NR_GROUPS 5 -#define EXYNOS5_IRQ_GPIO4_NR_GROUPS 1 - -#define MAX_COMBINER_NR (EXYNOS4_MAX_COMBINER_NR > EXYNOS5_MAX_COMBINER_NR ? \ - EXYNOS4_MAX_COMBINER_NR : EXYNOS5_MAX_COMBINER_NR) - -#define S5P_EINT_BASE1 COMBINER_IRQ(MAX_COMBINER_NR, 0) -#define S5P_EINT_BASE2 (S5P_EINT_BASE1 + 16) -#define S5P_GPIOINT_BASE (S5P_EINT_BASE1 + 32) -#define IRQ_GPIO_END (S5P_GPIOINT_BASE + S5P_GPIOINT_COUNT) -#define IRQ_TIMER_BASE (IRQ_GPIO_END + 64) - -/* Set the default NR_IRQS */ -#define EXYNOS_NR_IRQS (IRQ_TIMER_BASE + IRQ_TIMER_COUNT) - -#ifndef CONFIG_SPARSE_IRQ -#define NR_IRQS EXYNOS_NR_IRQS -#endif - -#endif /* __ASM_ARCH_IRQS_H */ diff --git a/arch/arm/mach-exynos/include/mach/map.h b/arch/arm/mach-exynos/include/mach/map.h index 92b29bb583cb..7b046b59d9ec 100644 --- a/arch/arm/mach-exynos/include/mach/map.h +++ b/arch/arm/mach-exynos/include/mach/map.h @@ -30,31 +30,6 @@ #define EXYNOS4x12_PA_SYSRAM_NS 0x0204F000 #define EXYNOS5250_PA_SYSRAM_NS 0x0204F000 -#define EXYNOS4_PA_FIMC0 0x11800000 -#define EXYNOS4_PA_FIMC1 0x11810000 -#define EXYNOS4_PA_FIMC2 0x11820000 -#define EXYNOS4_PA_FIMC3 0x11830000 - -#define EXYNOS4_PA_JPEG 0x11840000 - -/* x = 0...1 */ -#define EXYNOS4_PA_FIMC_LITE(x) (0x12390000 + ((x) * 0x10000)) - -#define EXYNOS4_PA_G2D 0x12800000 - -#define EXYNOS4_PA_I2S0 0x03830000 -#define EXYNOS4_PA_I2S1 0xE3100000 -#define EXYNOS4_PA_I2S2 0xE2A00000 - -#define EXYNOS4_PA_PCM0 0x03840000 -#define EXYNOS4_PA_PCM1 0x13980000 -#define EXYNOS4_PA_PCM2 0x13990000 - -#define EXYNOS4_PA_SROM_BANK(x) (0x04000000 + ((x) * 0x01000000)) - -#define EXYNOS4_PA_ONENAND 0x0C000000 -#define EXYNOS4_PA_ONENAND_DMA 0x0C600000 - #define EXYNOS_PA_CHIPID 0x10000000 #define EXYNOS4_PA_SYSCON 0x10010000 @@ -71,10 +46,6 @@ #define EXYNOS4_PA_WATCHDOG 0x10060000 #define EXYNOS5_PA_WATCHDOG 0x101D0000 -#define EXYNOS4_PA_RTC 0x10070000 - -#define EXYNOS4_PA_KEYPAD 0x100A0000 - #define EXYNOS4_PA_DMC0 0x10400000 #define EXYNOS4_PA_DMC1 0x10410000 @@ -87,207 +58,22 @@ #define EXYNOS5_PA_GIC_DIST 0x10481000 #define EXYNOS4_PA_COREPERI 0x10500000 -#define EXYNOS4_PA_TWD 0x10500600 #define EXYNOS4_PA_L2CC 0x10502000 -#define EXYNOS4_PA_TMU 0x100C0000 - -#define EXYNOS4_PA_MDMA0 0x10810000 -#define EXYNOS4_PA_MDMA1 0x12850000 -#define EXYNOS4_PA_S_MDMA1 0x12840000 -#define EXYNOS4_PA_PDMA0 0x12680000 -#define EXYNOS4_PA_PDMA1 0x12690000 -#define EXYNOS5_PA_MDMA0 0x10800000 -#define EXYNOS5_PA_MDMA1 0x11C10000 -#define EXYNOS5_PA_PDMA0 0x121A0000 -#define EXYNOS5_PA_PDMA1 0x121B0000 - -#define EXYNOS4_PA_SYSMMU_MDMA 0x10A40000 -#define EXYNOS4_PA_SYSMMU_2D_ACP 0x10A40000 -#define EXYNOS4_PA_SYSMMU_SSS 0x10A50000 -#define EXYNOS4_PA_SYSMMU_FIMC0 0x11A20000 -#define EXYNOS4_PA_SYSMMU_FIMC1 0x11A30000 -#define EXYNOS4_PA_SYSMMU_FIMC2 0x11A40000 -#define EXYNOS4_PA_SYSMMU_FIMC3 0x11A50000 -#define EXYNOS4_PA_SYSMMU_JPEG 0x11A60000 -#define EXYNOS4_PA_SYSMMU_FIMD0 0x11E20000 -#define EXYNOS4_PA_SYSMMU_FIMD1 0x12220000 -#define EXYNOS4_PA_SYSMMU_FIMC_ISP 0x12260000 -#define EXYNOS4_PA_SYSMMU_FIMC_DRC 0x12270000 -#define EXYNOS4_PA_SYSMMU_FIMC_FD 0x122A0000 -#define EXYNOS4_PA_SYSMMU_ISPCPU 0x122B0000 -#define EXYNOS4_PA_SYSMMU_FIMC_LITE0 0x123B0000 -#define EXYNOS4_PA_SYSMMU_FIMC_LITE1 0x123C0000 -#define EXYNOS4_PA_SYSMMU_PCIe 0x12620000 -#define EXYNOS4_PA_SYSMMU_G2D 0x12A20000 -#define EXYNOS4_PA_SYSMMU_ROTATOR 0x12A30000 -#define EXYNOS4_PA_SYSMMU_MDMA2 0x12A40000 -#define EXYNOS4_PA_SYSMMU_TV 0x12E20000 -#define EXYNOS4_PA_SYSMMU_MFC_L 0x13620000 -#define EXYNOS4_PA_SYSMMU_MFC_R 0x13630000 - -#define EXYNOS5_PA_GSC0 0x13E00000 -#define EXYNOS5_PA_GSC1 0x13E10000 -#define EXYNOS5_PA_GSC2 0x13E20000 -#define EXYNOS5_PA_GSC3 0x13E30000 - -#define EXYNOS5_PA_SYSMMU_MDMA1 0x10A40000 -#define EXYNOS5_PA_SYSMMU_SSS 0x10A50000 -#define EXYNOS5_PA_SYSMMU_2D 0x10A60000 -#define EXYNOS5_PA_SYSMMU_MFC_L 0x11200000 -#define EXYNOS5_PA_SYSMMU_MFC_R 0x11210000 -#define EXYNOS5_PA_SYSMMU_ROTATOR 0x11D40000 -#define EXYNOS5_PA_SYSMMU_MDMA2 0x11D50000 -#define EXYNOS5_PA_SYSMMU_JPEG 0x11F20000 -#define EXYNOS5_PA_SYSMMU_IOP 0x12360000 -#define EXYNOS5_PA_SYSMMU_RTIC 0x12370000 -#define EXYNOS5_PA_SYSMMU_ISP 0x13260000 -#define EXYNOS5_PA_SYSMMU_DRC 0x12370000 -#define EXYNOS5_PA_SYSMMU_SCALERC 0x13280000 -#define EXYNOS5_PA_SYSMMU_SCALERP 0x13290000 -#define EXYNOS5_PA_SYSMMU_FD 0x132A0000 -#define EXYNOS5_PA_SYSMMU_ISPCPU 0x132B0000 -#define EXYNOS5_PA_SYSMMU_ODC 0x132C0000 -#define EXYNOS5_PA_SYSMMU_DIS0 0x132D0000 -#define EXYNOS5_PA_SYSMMU_DIS1 0x132E0000 -#define EXYNOS5_PA_SYSMMU_3DNR 0x132F0000 -#define EXYNOS5_PA_SYSMMU_LITE0 0x13C40000 -#define EXYNOS5_PA_SYSMMU_LITE1 0x13C50000 -#define EXYNOS5_PA_SYSMMU_GSC0 0x13E80000 -#define EXYNOS5_PA_SYSMMU_GSC1 0x13E90000 -#define EXYNOS5_PA_SYSMMU_GSC2 0x13EA0000 -#define EXYNOS5_PA_SYSMMU_GSC3 0x13EB0000 -#define EXYNOS5_PA_SYSMMU_FIMD1 0x14640000 -#define EXYNOS5_PA_SYSMMU_TV 0x14650000 - -#define EXYNOS4_PA_SPI0 0x13920000 -#define EXYNOS4_PA_SPI1 0x13930000 -#define EXYNOS4_PA_SPI2 0x13940000 -#define EXYNOS5_PA_SPI0 0x12D20000 -#define EXYNOS5_PA_SPI1 0x12D30000 -#define EXYNOS5_PA_SPI2 0x12D40000 - -#define EXYNOS4_PA_GPIO1 0x11400000 -#define EXYNOS4_PA_GPIO2 0x11000000 -#define EXYNOS4_PA_GPIO3 0x03860000 -#define EXYNOS5_PA_GPIO1 0x11400000 -#define EXYNOS5_PA_GPIO2 0x13400000 -#define EXYNOS5_PA_GPIO3 0x10D10000 -#define EXYNOS5_PA_GPIO4 0x03860000 - -#define EXYNOS4_PA_MIPI_CSIS0 0x11880000 -#define EXYNOS4_PA_MIPI_CSIS1 0x11890000 - -#define EXYNOS4_PA_FIMD0 0x11C00000 - -#define EXYNOS4_PA_HSMMC(x) (0x12510000 + ((x) * 0x10000)) -#define EXYNOS4_PA_DWMCI 0x12550000 -#define EXYNOS5_PA_DWMCI0 0x12200000 -#define EXYNOS5_PA_DWMCI1 0x12210000 -#define EXYNOS5_PA_DWMCI2 0x12220000 -#define EXYNOS5_PA_DWMCI3 0x12230000 - -#define EXYNOS4_PA_HSOTG 0x12480000 -#define EXYNOS4_PA_USB_HSPHY 0x125B0000 - -#define EXYNOS4_PA_SATA 0x12560000 -#define EXYNOS4_PA_SATAPHY 0x125D0000 -#define EXYNOS4_PA_SATAPHY_CTRL 0x126B0000 - #define EXYNOS4_PA_SROMC 0x12570000 #define EXYNOS5_PA_SROMC 0x12250000 -#define EXYNOS4_PA_EHCI 0x12580000 -#define EXYNOS4_PA_OHCI 0x12590000 #define EXYNOS4_PA_HSPHY 0x125B0000 -#define EXYNOS4_PA_MFC 0x13400000 #define EXYNOS4_PA_UART 0x13800000 #define EXYNOS5_PA_UART 0x12C00000 -#define EXYNOS4_PA_VP 0x12C00000 -#define EXYNOS4_PA_MIXER 0x12C10000 -#define EXYNOS4_PA_SDO 0x12C20000 -#define EXYNOS4_PA_HDMI 0x12D00000 -#define EXYNOS4_PA_IIC_HDMIPHY 0x138E0000 - -#define EXYNOS4_PA_IIC(x) (0x13860000 + ((x) * 0x10000)) -#define EXYNOS5_PA_IIC(x) (0x12C60000 + ((x) * 0x10000)) - -#define EXYNOS4_PA_ADC 0x13910000 -#define EXYNOS4_PA_ADC1 0x13911000 - -#define EXYNOS4_PA_AC97 0x139A0000 - -#define EXYNOS4_PA_SPDIF 0x139B0000 - #define EXYNOS4_PA_TIMER 0x139D0000 #define EXYNOS5_PA_TIMER 0x12DD0000 -#define EXYNOS4_PA_SDRAM 0x40000000 -#define EXYNOS5_PA_SDRAM 0x40000000 - -/* Compatibiltiy Defines */ - -#define S3C_PA_HSMMC0 EXYNOS4_PA_HSMMC(0) -#define S3C_PA_HSMMC1 EXYNOS4_PA_HSMMC(1) -#define S3C_PA_HSMMC2 EXYNOS4_PA_HSMMC(2) -#define S3C_PA_HSMMC3 EXYNOS4_PA_HSMMC(3) -#define S3C_PA_IIC EXYNOS4_PA_IIC(0) -#define S3C_PA_IIC1 EXYNOS4_PA_IIC(1) -#define S3C_PA_IIC2 EXYNOS4_PA_IIC(2) -#define S3C_PA_IIC3 EXYNOS4_PA_IIC(3) -#define S3C_PA_IIC4 EXYNOS4_PA_IIC(4) -#define S3C_PA_IIC5 EXYNOS4_PA_IIC(5) -#define S3C_PA_IIC6 EXYNOS4_PA_IIC(6) -#define S3C_PA_IIC7 EXYNOS4_PA_IIC(7) -#define S3C_PA_RTC EXYNOS4_PA_RTC -#define S3C_PA_WDT EXYNOS4_PA_WATCHDOG -#define S3C_PA_SPI0 EXYNOS4_PA_SPI0 -#define S3C_PA_SPI1 EXYNOS4_PA_SPI1 -#define S3C_PA_SPI2 EXYNOS4_PA_SPI2 -#define S3C_PA_USB_HSOTG EXYNOS4_PA_HSOTG - -#define S5P_PA_EHCI EXYNOS4_PA_EHCI -#define S5P_PA_FIMC0 EXYNOS4_PA_FIMC0 -#define S5P_PA_FIMC1 EXYNOS4_PA_FIMC1 -#define S5P_PA_FIMC2 EXYNOS4_PA_FIMC2 -#define S5P_PA_FIMC3 EXYNOS4_PA_FIMC3 -#define S5P_PA_JPEG EXYNOS4_PA_JPEG -#define S5P_PA_G2D EXYNOS4_PA_G2D -#define S5P_PA_FIMD0 EXYNOS4_PA_FIMD0 -#define S5P_PA_HDMI EXYNOS4_PA_HDMI -#define S5P_PA_IIC_HDMIPHY EXYNOS4_PA_IIC_HDMIPHY -#define S5P_PA_MFC EXYNOS4_PA_MFC -#define S5P_PA_MIPI_CSIS0 EXYNOS4_PA_MIPI_CSIS0 -#define S5P_PA_MIPI_CSIS1 EXYNOS4_PA_MIPI_CSIS1 -#define S5P_PA_MIXER EXYNOS4_PA_MIXER -#define S5P_PA_ONENAND EXYNOS4_PA_ONENAND -#define S5P_PA_ONENAND_DMA EXYNOS4_PA_ONENAND_DMA -#define S5P_PA_SDO EXYNOS4_PA_SDO -#define S5P_PA_SDRAM EXYNOS4_PA_SDRAM -#define S5P_PA_VP EXYNOS4_PA_VP - -#define SAMSUNG_PA_ADC EXYNOS4_PA_ADC -#define SAMSUNG_PA_ADC1 EXYNOS4_PA_ADC1 -#define SAMSUNG_PA_KEYPAD EXYNOS4_PA_KEYPAD - /* Compatibility UART */ -#define EXYNOS4_PA_UART0 0x13800000 -#define EXYNOS4_PA_UART1 0x13810000 -#define EXYNOS4_PA_UART2 0x13820000 -#define EXYNOS4_PA_UART3 0x13830000 -#define EXYNOS4_SZ_UART SZ_256 - -#define EXYNOS5_PA_UART0 0x12C00000 -#define EXYNOS5_PA_UART1 0x12C10000 -#define EXYNOS5_PA_UART2 0x12C20000 -#define EXYNOS5_PA_UART3 0x12C30000 - #define EXYNOS5440_PA_UART0 0x000B0000 -#define EXYNOS5440_PA_UART1 0x000C0000 -#define EXYNOS5440_SZ_UART SZ_256 #define S3C_VA_UARTx(x) (S3C_VA_UART + ((x) * S3C_UART_OFFSET)) diff --git a/arch/arm/mach-exynos/include/mach/pm-core.h b/arch/arm/mach-exynos/include/mach/pm-core.h index 296090e7f423..2b00833b6641 100644 --- a/arch/arm/mach-exynos/include/mach/pm-core.h +++ b/arch/arm/mach-exynos/include/mach/pm-core.h @@ -34,12 +34,7 @@ static inline void s3c_pm_debug_init_uart(void) static inline void s3c_pm_arch_prepare_irqs(void) { - u32 eintmask = s3c_irqwake_eintmask; - - if (of_have_populated_dt()) - eintmask = exynos_get_eint_wake_mask(); - - __raw_writel(eintmask, S5P_EINT_WAKEUP_MASK); + __raw_writel(exynos_get_eint_wake_mask(), S5P_EINT_WAKEUP_MASK); __raw_writel(s3c_irqwake_intmask & ~(1 << 31), S5P_WAKEUP_MASK); } @@ -69,4 +64,9 @@ static inline void samsung_pm_saved_gpios(void) /* nothing here yet */ } +/* Compatibility definitions to make plat-samsung/pm.c compile */ +#define IRQ_EINT_BIT(x) 1 +#define s3c_irqwake_intallow 0 +#define s3c_irqwake_eintallow 0 + #endif /* __ASM_ARCH_PM_CORE_H */ diff --git a/arch/arm/mach-exynos/include/mach/regs-gpio.h b/arch/arm/mach-exynos/include/mach/regs-gpio.h deleted file mode 100644 index e4b5b60dcb85..000000000000 --- a/arch/arm/mach-exynos/include/mach/regs-gpio.h +++ /dev/null @@ -1,40 +0,0 @@ -/* linux/arch/arm/mach-exynos4/include/mach/regs-gpio.h - * - * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. - * http://www.samsung.com - * - * EXYNOS4 - GPIO (including EINT) register definitions - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __ASM_ARCH_REGS_GPIO_H -#define __ASM_ARCH_REGS_GPIO_H __FILE__ - -#include <mach/map.h> -#include <mach/irqs.h> - -#define EINT_REG_NR(x) (EINT_OFFSET(x) >> 3) -#define EINT_CON(b, x) (b + 0xE00 + (EINT_REG_NR(x) * 4)) -#define EINT_FLTCON(b, x) (b + 0xE80 + (EINT_REG_NR(x) * 4)) -#define EINT_MASK(b, x) (b + 0xF00 + (EINT_REG_NR(x) * 4)) -#define EINT_PEND(b, x) (b + 0xF40 + (EINT_REG_NR(x) * 4)) - -#define EINT_OFFSET_BIT(x) (1 << (EINT_OFFSET(x) & 0x7)) - -/* compatibility for plat-s5p/irq-pm.c */ -#define EXYNOS4_EINT40CON (S5P_VA_GPIO2 + 0xE00) -#define S5P_EINT_CON(x) (EXYNOS4_EINT40CON + ((x) * 0x4)) - -#define EXYNOS4_EINT40FLTCON0 (S5P_VA_GPIO2 + 0xE80) -#define S5P_EINT_FLTCON(x) (EXYNOS4_EINT40FLTCON0 + ((x) * 0x4)) - -#define EXYNOS4_EINT40MASK (S5P_VA_GPIO2 + 0xF00) -#define S5P_EINT_MASK(x) (EXYNOS4_EINT40MASK + ((x) * 0x4)) - -#define EXYNOS4_EINT40PEND (S5P_VA_GPIO2 + 0xF40) -#define S5P_EINT_PEND(x) (EXYNOS4_EINT40PEND + ((x) * 0x4)) - -#endif /* __ASM_ARCH_REGS_GPIO_H */ diff --git a/arch/arm/mach-exynos/include/mach/regs-usb-phy.h b/arch/arm/mach-exynos/include/mach/regs-usb-phy.h deleted file mode 100644 index 07277735252e..000000000000 --- a/arch/arm/mach-exynos/include/mach/regs-usb-phy.h +++ /dev/null @@ -1,74 +0,0 @@ -/* - * Copyright (C) 2011 Samsung Electronics Co.Ltd - * Author: Joonyoung Shim <jy0922.shim@samsung.com> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -#ifndef __PLAT_S5P_REGS_USB_PHY_H -#define __PLAT_S5P_REGS_USB_PHY_H - -#define EXYNOS4_HSOTG_PHYREG(x) ((x) + S3C_VA_USB_HSPHY) - -#define EXYNOS4_PHYPWR EXYNOS4_HSOTG_PHYREG(0x00) -#define PHY1_HSIC_NORMAL_MASK (0xf << 9) -#define PHY1_HSIC1_SLEEP (1 << 12) -#define PHY1_HSIC1_FORCE_SUSPEND (1 << 11) -#define PHY1_HSIC0_SLEEP (1 << 10) -#define PHY1_HSIC0_FORCE_SUSPEND (1 << 9) - -#define PHY1_STD_NORMAL_MASK (0x7 << 6) -#define PHY1_STD_SLEEP (1 << 8) -#define PHY1_STD_ANALOG_POWERDOWN (1 << 7) -#define PHY1_STD_FORCE_SUSPEND (1 << 6) - -#define PHY0_NORMAL_MASK (0x39 << 0) -#define PHY0_SLEEP (1 << 5) -#define PHY0_OTG_DISABLE (1 << 4) -#define PHY0_ANALOG_POWERDOWN (1 << 3) -#define PHY0_FORCE_SUSPEND (1 << 0) - -#define EXYNOS4_PHYCLK EXYNOS4_HSOTG_PHYREG(0x04) -#define PHY1_COMMON_ON_N (1 << 7) -#define PHY0_COMMON_ON_N (1 << 4) -#define PHY0_ID_PULLUP (1 << 2) - -#define EXYNOS4_CLKSEL_SHIFT (0) - -#define EXYNOS4210_CLKSEL_MASK (0x3 << 0) -#define EXYNOS4210_CLKSEL_48M (0x0 << 0) -#define EXYNOS4210_CLKSEL_12M (0x2 << 0) -#define EXYNOS4210_CLKSEL_24M (0x3 << 0) - -#define EXYNOS4X12_CLKSEL_MASK (0x7 << 0) -#define EXYNOS4X12_CLKSEL_9600K (0x0 << 0) -#define EXYNOS4X12_CLKSEL_10M (0x1 << 0) -#define EXYNOS4X12_CLKSEL_12M (0x2 << 0) -#define EXYNOS4X12_CLKSEL_19200K (0x3 << 0) -#define EXYNOS4X12_CLKSEL_20M (0x4 << 0) -#define EXYNOS4X12_CLKSEL_24M (0x5 << 0) - -#define EXYNOS4_RSTCON EXYNOS4_HSOTG_PHYREG(0x08) -#define HOST_LINK_PORT_SWRST_MASK (0xf << 6) -#define HOST_LINK_PORT2_SWRST (1 << 9) -#define HOST_LINK_PORT1_SWRST (1 << 8) -#define HOST_LINK_PORT0_SWRST (1 << 7) -#define HOST_LINK_ALL_SWRST (1 << 6) - -#define PHY1_SWRST_MASK (0x7 << 3) -#define PHY1_HSIC_SWRST (1 << 5) -#define PHY1_STD_SWRST (1 << 4) -#define PHY1_ALL_SWRST (1 << 3) - -#define PHY0_SWRST_MASK (0x7 << 0) -#define PHY0_PHYLINK_SWRST (1 << 2) -#define PHY0_HLINK_SWRST (1 << 1) -#define PHY0_SWRST (1 << 0) - -#define EXYNOS4_PHY1CON EXYNOS4_HSOTG_PHYREG(0x34) -#define FPENABLEN (1 << 0) - -#endif /* __PLAT_S5P_REGS_USB_PHY_H */ diff --git a/arch/arm/mach-exynos/mach-armlex4210.c b/arch/arm/mach-exynos/mach-armlex4210.c deleted file mode 100644 index 5f0f55701374..000000000000 --- a/arch/arm/mach-exynos/mach-armlex4210.c +++ /dev/null @@ -1,207 +0,0 @@ -/* linux/arch/arm/mach-exynos4/mach-armlex4210.c - * - * Copyright (c) 2011 Samsung Electronics Co., Ltd. - * http://www.samsung.com - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#include <linux/gpio.h> -#include <linux/io.h> -#include <linux/mmc/host.h> -#include <linux/platform_device.h> -#include <linux/serial_core.h> -#include <linux/smsc911x.h> - -#include <asm/mach/arch.h> -#include <asm/mach-types.h> - -#include <plat/cpu.h> -#include <plat/devs.h> -#include <plat/gpio-cfg.h> -#include <plat/regs-serial.h> -#include <plat/regs-srom.h> -#include <plat/sdhci.h> - -#include <mach/irqs.h> -#include <mach/map.h> - -#include "common.h" - -/* Following are default values for UCON, ULCON and UFCON UART registers */ -#define ARMLEX4210_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ - S3C2410_UCON_RXILEVEL | \ - S3C2410_UCON_TXIRQMODE | \ - S3C2410_UCON_RXIRQMODE | \ - S3C2410_UCON_RXFIFO_TOI | \ - S3C2443_UCON_RXERR_IRQEN) - -#define ARMLEX4210_ULCON_DEFAULT S3C2410_LCON_CS8 - -#define ARMLEX4210_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \ - S5PV210_UFCON_TXTRIG4 | \ - S5PV210_UFCON_RXTRIG4) - -static struct s3c2410_uartcfg armlex4210_uartcfgs[] __initdata = { - [0] = { - .hwport = 0, - .flags = 0, - .ucon = ARMLEX4210_UCON_DEFAULT, - .ulcon = ARMLEX4210_ULCON_DEFAULT, - .ufcon = ARMLEX4210_UFCON_DEFAULT, - }, - [1] = { - .hwport = 1, - .flags = 0, - .ucon = ARMLEX4210_UCON_DEFAULT, - .ulcon = ARMLEX4210_ULCON_DEFAULT, - .ufcon = ARMLEX4210_UFCON_DEFAULT, - }, - [2] = { - .hwport = 2, - .flags = 0, - .ucon = ARMLEX4210_UCON_DEFAULT, - .ulcon = ARMLEX4210_ULCON_DEFAULT, - .ufcon = ARMLEX4210_UFCON_DEFAULT, - }, - [3] = { - .hwport = 3, - .flags = 0, - .ucon = ARMLEX4210_UCON_DEFAULT, - .ulcon = ARMLEX4210_ULCON_DEFAULT, - .ufcon = ARMLEX4210_UFCON_DEFAULT, - }, -}; - -static struct s3c_sdhci_platdata armlex4210_hsmmc0_pdata __initdata = { - .cd_type = S3C_SDHCI_CD_PERMANENT, -#ifdef CONFIG_EXYNOS4_SDHCI_CH0_8BIT - .max_width = 8, - .host_caps = MMC_CAP_8_BIT_DATA, -#endif -}; - -static struct s3c_sdhci_platdata armlex4210_hsmmc2_pdata __initdata = { - .cd_type = S3C_SDHCI_CD_GPIO, - .ext_cd_gpio = EXYNOS4_GPX2(5), - .ext_cd_gpio_invert = 1, - .max_width = 4, -}; - -static struct s3c_sdhci_platdata armlex4210_hsmmc3_pdata __initdata = { - .cd_type = S3C_SDHCI_CD_PERMANENT, - .max_width = 4, -}; - -static void __init armlex4210_sdhci_init(void) -{ - s3c_sdhci0_set_platdata(&armlex4210_hsmmc0_pdata); - s3c_sdhci2_set_platdata(&armlex4210_hsmmc2_pdata); - s3c_sdhci3_set_platdata(&armlex4210_hsmmc3_pdata); -} - -static void __init armlex4210_wlan_init(void) -{ - /* enable */ - s3c_gpio_cfgpin(EXYNOS4_GPX2(0), S3C_GPIO_SFN(0xf)); - s3c_gpio_setpull(EXYNOS4_GPX2(0), S3C_GPIO_PULL_UP); - - /* reset */ - s3c_gpio_cfgpin(EXYNOS4_GPX1(6), S3C_GPIO_SFN(0xf)); - s3c_gpio_setpull(EXYNOS4_GPX1(6), S3C_GPIO_PULL_UP); - - /* wakeup */ - s3c_gpio_cfgpin(EXYNOS4_GPX1(5), S3C_GPIO_SFN(0xf)); - s3c_gpio_setpull(EXYNOS4_GPX1(5), S3C_GPIO_PULL_UP); -} - -static struct resource armlex4210_smsc911x_resources[] = { - [0] = DEFINE_RES_MEM(EXYNOS4_PA_SROM_BANK(3), SZ_64K), - [1] = DEFINE_RES_NAMED(IRQ_EINT(27), 1, NULL, IORESOURCE_IRQ \ - | IRQF_TRIGGER_HIGH), -}; - -static struct smsc911x_platform_config smsc9215_config = { - .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_HIGH, - .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL, - .flags = SMSC911X_USE_16BIT | SMSC911X_FORCE_INTERNAL_PHY, - .phy_interface = PHY_INTERFACE_MODE_MII, - .mac = {0x00, 0x80, 0x00, 0x23, 0x45, 0x67}, -}; - -static struct platform_device armlex4210_smsc911x = { - .name = "smsc911x", - .id = -1, - .num_resources = ARRAY_SIZE(armlex4210_smsc911x_resources), - .resource = armlex4210_smsc911x_resources, - .dev = { - .platform_data = &smsc9215_config, - }, -}; - -static struct platform_device *armlex4210_devices[] __initdata = { - &s3c_device_hsmmc0, - &s3c_device_hsmmc2, - &s3c_device_hsmmc3, - &s3c_device_rtc, - &s3c_device_wdt, - &armlex4210_smsc911x, - &exynos4_device_ahci, -}; - -static void __init armlex4210_smsc911x_init(void) -{ - u32 cs1; - - /* configure nCS1 width to 16 bits */ - cs1 = __raw_readl(S5P_SROM_BW) & - ~(S5P_SROM_BW__CS_MASK << S5P_SROM_BW__NCS1__SHIFT); - cs1 |= ((1 << S5P_SROM_BW__DATAWIDTH__SHIFT) | - (0 << S5P_SROM_BW__WAITENABLE__SHIFT) | - (1 << S5P_SROM_BW__ADDRMODE__SHIFT) | - (1 << S5P_SROM_BW__BYTEENABLE__SHIFT)) << - S5P_SROM_BW__NCS1__SHIFT; - __raw_writel(cs1, S5P_SROM_BW); - - /* set timing for nCS1 suitable for ethernet chip */ - __raw_writel((0x1 << S5P_SROM_BCX__PMC__SHIFT) | - (0x9 << S5P_SROM_BCX__TACP__SHIFT) | - (0xc << S5P_SROM_BCX__TCAH__SHIFT) | - (0x1 << S5P_SROM_BCX__TCOH__SHIFT) | - (0x6 << S5P_SROM_BCX__TACC__SHIFT) | - (0x1 << S5P_SROM_BCX__TCOS__SHIFT) | - (0x1 << S5P_SROM_BCX__TACS__SHIFT), S5P_SROM_BC1); -} - -static void __init armlex4210_map_io(void) -{ - exynos_init_io(NULL, 0); - s3c24xx_init_uarts(armlex4210_uartcfgs, - ARRAY_SIZE(armlex4210_uartcfgs)); -} - -static void __init armlex4210_machine_init(void) -{ - armlex4210_smsc911x_init(); - - armlex4210_sdhci_init(); - - armlex4210_wlan_init(); - - platform_add_devices(armlex4210_devices, - ARRAY_SIZE(armlex4210_devices)); -} - -MACHINE_START(ARMLEX4210, "ARMLEX4210") - /* Maintainer: Alim Akhtar <alim.akhtar@samsung.com> */ - .atag_offset = 0x100, - .smp = smp_ops(exynos_smp_ops), - .init_irq = exynos4_init_irq, - .map_io = armlex4210_map_io, - .init_machine = armlex4210_machine_init, - .init_late = exynos_init_late, - .init_time = exynos_init_time, - .restart = exynos4_restart, -MACHINE_END diff --git a/arch/arm/mach-exynos/mach-exynos4-dt.c b/arch/arm/mach-exynos/mach-exynos4-dt.c index b9ed834a7eee..0099c6c13bba 100644 --- a/arch/arm/mach-exynos/mach-exynos4-dt.c +++ b/arch/arm/mach-exynos/mach-exynos4-dt.c @@ -23,11 +23,6 @@ #include "common.h" -static void __init exynos4_dt_map_io(void) -{ - exynos_init_io(NULL, 0); -} - static void __init exynos4_dt_machine_init(void) { of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); @@ -55,8 +50,7 @@ static void __init exynos4_reserve(void) DT_MACHINE_START(EXYNOS4210_DT, "Samsung Exynos4 (Flattened Device Tree)") /* Maintainer: Thomas Abraham <thomas.abraham@linaro.org> */ .smp = smp_ops(exynos_smp_ops), - .init_irq = exynos4_init_irq, - .map_io = exynos4_dt_map_io, + .map_io = exynos_init_io, .init_early = exynos_firmware_init, .init_machine = exynos4_dt_machine_init, .init_late = exynos_init_late, diff --git a/arch/arm/mach-exynos/mach-exynos5-dt.c b/arch/arm/mach-exynos/mach-exynos5-dt.c index 753b94f3fca7..d5c8afdeaa39 100644 --- a/arch/arm/mach-exynos/mach-exynos5-dt.c +++ b/arch/arm/mach-exynos/mach-exynos5-dt.c @@ -23,11 +23,6 @@ #include "common.h" -static void __init exynos5_dt_map_io(void) -{ - exynos_init_io(NULL, 0); -} - static void __init exynos5_dt_machine_init(void) { struct device_node *i2c_np; @@ -76,9 +71,8 @@ static void __init exynos5_reserve(void) DT_MACHINE_START(EXYNOS5_DT, "SAMSUNG EXYNOS5 (Flattened Device Tree)") /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */ - .init_irq = exynos5_init_irq, .smp = smp_ops(exynos_smp_ops), - .map_io = exynos5_dt_map_io, + .map_io = exynos_init_io, .init_machine = exynos5_dt_machine_init, .init_late = exynos_init_late, .init_time = exynos_init_time, diff --git a/arch/arm/mach-exynos/mach-nuri.c b/arch/arm/mach-exynos/mach-nuri.c deleted file mode 100644 index 5c8b2878dbbd..000000000000 --- a/arch/arm/mach-exynos/mach-nuri.c +++ /dev/null @@ -1,1388 +0,0 @@ -/* - * linux/arch/arm/mach-exynos4/mach-nuri.c - * - * Copyright (c) 2011 Samsung Electronics Co., Ltd. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include <linux/platform_device.h> -#include <linux/serial_core.h> -#include <linux/input.h> -#include <linux/i2c.h> -#include <linux/i2c/atmel_mxt_ts.h> -#include <linux/i2c-gpio.h> -#include <linux/gpio_keys.h> -#include <linux/gpio.h> -#include <linux/power/max8903_charger.h> -#include <linux/power/max17042_battery.h> -#include <linux/regulator/machine.h> -#include <linux/regulator/fixed.h> -#include <linux/mfd/max8997.h> -#include <linux/mfd/max8997-private.h> -#include <linux/mmc/host.h> -#include <linux/fb.h> -#include <linux/pwm_backlight.h> -#include <linux/platform_data/i2c-s3c2410.h> -#include <linux/platform_data/mipi-csis.h> -#include <linux/platform_data/s3c-hsotg.h> -#include <linux/platform_data/usb-ehci-s5p.h> -#include <drm/exynos_drm.h> - -#include <video/platform_lcd.h> -#include <video/samsung_fimd.h> -#include <media/m5mols.h> -#include <media/s5k6aa.h> -#include <media/s5p_fimc.h> -#include <media/v4l2-mediabus.h> - -#include <asm/mach/arch.h> -#include <asm/mach-types.h> - -#include <plat/adc.h> -#include <plat/regs-serial.h> -#include <plat/cpu.h> -#include <plat/devs.h> -#include <plat/fb.h> -#include <plat/sdhci.h> -#include <plat/clock.h> -#include <plat/gpio-cfg.h> -#include <plat/mfc.h> -#include <plat/fimc-core.h> -#include <plat/camport.h> - -#include <mach/irqs.h> -#include <mach/map.h> - -#include "common.h" - -/* Following are default values for UCON, ULCON and UFCON UART registers */ -#define NURI_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ - S3C2410_UCON_RXILEVEL | \ - S3C2410_UCON_TXIRQMODE | \ - S3C2410_UCON_RXIRQMODE | \ - S3C2410_UCON_RXFIFO_TOI | \ - S3C2443_UCON_RXERR_IRQEN) - -#define NURI_ULCON_DEFAULT S3C2410_LCON_CS8 - -#define NURI_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \ - S5PV210_UFCON_TXTRIG256 | \ - S5PV210_UFCON_RXTRIG256) - -enum fixed_regulator_id { - FIXED_REG_ID_MMC = 0, - FIXED_REG_ID_MAX8903, - FIXED_REG_ID_CAM_A28V, - FIXED_REG_ID_CAM_12V, - FIXED_REG_ID_CAM_VT_15V, -}; - -static struct s3c2410_uartcfg nuri_uartcfgs[] __initdata = { - { - .hwport = 0, - .ucon = NURI_UCON_DEFAULT, - .ulcon = NURI_ULCON_DEFAULT, - .ufcon = NURI_UFCON_DEFAULT, - }, - { - .hwport = 1, - .ucon = NURI_UCON_DEFAULT, - .ulcon = NURI_ULCON_DEFAULT, - .ufcon = NURI_UFCON_DEFAULT, - }, - { - .hwport = 2, - .ucon = NURI_UCON_DEFAULT, - .ulcon = NURI_ULCON_DEFAULT, - .ufcon = NURI_UFCON_DEFAULT, - }, - { - .hwport = 3, - .ucon = NURI_UCON_DEFAULT, - .ulcon = NURI_ULCON_DEFAULT, - .ufcon = NURI_UFCON_DEFAULT, - }, -}; - -/* eMMC */ -static struct s3c_sdhci_platdata nuri_hsmmc0_data __initdata = { - .max_width = 8, - .host_caps = (MMC_CAP_8_BIT_DATA | MMC_CAP_4_BIT_DATA | - MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED | - MMC_CAP_ERASE), - .cd_type = S3C_SDHCI_CD_PERMANENT, -}; - -static struct regulator_consumer_supply emmc_supplies[] = { - REGULATOR_SUPPLY("vmmc", "exynos4-sdhci.0"), - REGULATOR_SUPPLY("vmmc", "dw_mmc"), -}; - -static struct regulator_init_data emmc_fixed_voltage_init_data = { - .constraints = { - .name = "VMEM_VDD_2.8V", - .valid_ops_mask = REGULATOR_CHANGE_STATUS, - }, - .num_consumer_supplies = ARRAY_SIZE(emmc_supplies), - .consumer_supplies = emmc_supplies, -}; - -static struct fixed_voltage_config emmc_fixed_voltage_config = { - .supply_name = "MASSMEMORY_EN (inverted)", - .microvolts = 2800000, - .gpio = EXYNOS4_GPL1(1), - .enable_high = false, - .init_data = &emmc_fixed_voltage_init_data, -}; - -static struct platform_device emmc_fixed_voltage = { - .name = "reg-fixed-voltage", - .id = FIXED_REG_ID_MMC, - .dev = { - .platform_data = &emmc_fixed_voltage_config, - }, -}; - -/* SD */ -static struct s3c_sdhci_platdata nuri_hsmmc2_data __initdata = { - .max_width = 4, - .host_caps = MMC_CAP_4_BIT_DATA | - MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED, - .ext_cd_gpio = EXYNOS4_GPX3(3), /* XEINT_27 */ - .ext_cd_gpio_invert = 1, - .cd_type = S3C_SDHCI_CD_GPIO, -}; - -/* WLAN */ -static struct s3c_sdhci_platdata nuri_hsmmc3_data __initdata = { - .max_width = 4, - .host_caps = MMC_CAP_4_BIT_DATA | - MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED, - .cd_type = S3C_SDHCI_CD_EXTERNAL, -}; - -static void __init nuri_sdhci_init(void) -{ - s3c_sdhci0_set_platdata(&nuri_hsmmc0_data); - s3c_sdhci2_set_platdata(&nuri_hsmmc2_data); - s3c_sdhci3_set_platdata(&nuri_hsmmc3_data); -} - -/* GPIO KEYS */ -static struct gpio_keys_button nuri_gpio_keys_tables[] = { - { - .code = KEY_VOLUMEUP, - .gpio = EXYNOS4_GPX2(0), /* XEINT16 */ - .desc = "gpio-keys: KEY_VOLUMEUP", - .type = EV_KEY, - .active_low = 1, - .debounce_interval = 1, - }, { - .code = KEY_VOLUMEDOWN, - .gpio = EXYNOS4_GPX2(1), /* XEINT17 */ - .desc = "gpio-keys: KEY_VOLUMEDOWN", - .type = EV_KEY, - .active_low = 1, - .debounce_interval = 1, - }, { - .code = KEY_POWER, - .gpio = EXYNOS4_GPX2(7), /* XEINT23 */ - .desc = "gpio-keys: KEY_POWER", - .type = EV_KEY, - .active_low = 1, - .wakeup = 1, - .debounce_interval = 1, - }, -}; - -static struct gpio_keys_platform_data nuri_gpio_keys_data = { - .buttons = nuri_gpio_keys_tables, - .nbuttons = ARRAY_SIZE(nuri_gpio_keys_tables), -}; - -static struct platform_device nuri_gpio_keys = { - .name = "gpio-keys", - .dev = { - .platform_data = &nuri_gpio_keys_data, - }, -}; - -#ifdef CONFIG_DRM_EXYNOS -static struct exynos_drm_fimd_pdata drm_fimd_pdata = { - .panel = { - .timing = { - .xres = 1024, - .yres = 600, - .hsync_len = 40, - .left_margin = 79, - .right_margin = 200, - .vsync_len = 10, - .upper_margin = 10, - .lower_margin = 11, - .refresh = 60, - }, - }, - .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB | - VIDCON0_CLKSEL_LCD, - .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC, - .default_win = 3, - .bpp = 32, -}; - -#else -/* Frame Buffer */ -static struct s3c_fb_pd_win nuri_fb_win0 = { - .max_bpp = 24, - .default_bpp = 16, - .xres = 1024, - .yres = 600, - .virtual_x = 1024, - .virtual_y = 2 * 600, -}; - -static struct fb_videomode nuri_lcd_timing = { - .left_margin = 64, - .right_margin = 16, - .upper_margin = 64, - .lower_margin = 1, - .hsync_len = 48, - .vsync_len = 3, - .xres = 1024, - .yres = 600, - .refresh = 60, -}; - -static struct s3c_fb_platdata nuri_fb_pdata __initdata = { - .win[0] = &nuri_fb_win0, - .vtiming = &nuri_lcd_timing, - .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB | - VIDCON0_CLKSEL_LCD, - .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC, - .setup_gpio = exynos4_fimd0_gpio_setup_24bpp, -}; -#endif - -static void nuri_lcd_power_on(struct plat_lcd_data *pd, unsigned int power) -{ - int gpio = EXYNOS4_GPE1(5); - - gpio_request(gpio, "LVDS_nSHDN"); - gpio_direction_output(gpio, power); - gpio_free(gpio); -} - -static int nuri_bl_init(struct device *dev) -{ - return gpio_request_one(EXYNOS4_GPE2(3), GPIOF_OUT_INIT_LOW, - "LCD_LD0_EN"); -} - -static int nuri_bl_notify(struct device *dev, int brightness) -{ - if (brightness < 1) - brightness = 0; - - gpio_set_value(EXYNOS4_GPE2(3), 1); - - return brightness; -} - -static void nuri_bl_exit(struct device *dev) -{ - gpio_free(EXYNOS4_GPE2(3)); -} - -/* nuri pwm backlight */ -static struct platform_pwm_backlight_data nuri_backlight_data = { - .pwm_id = 0, - .pwm_period_ns = 30000, - .max_brightness = 100, - .dft_brightness = 50, - .init = nuri_bl_init, - .notify = nuri_bl_notify, - .exit = nuri_bl_exit, -}; - -static struct platform_device nuri_backlight_device = { - .name = "pwm-backlight", - .id = -1, - .dev = { - .parent = &s3c_device_timer[0].dev, - .platform_data = &nuri_backlight_data, - }, -}; - -static struct plat_lcd_data nuri_lcd_platform_data = { - .set_power = nuri_lcd_power_on, -}; - -static struct platform_device nuri_lcd_device = { - .name = "platform-lcd", - .id = -1, - .dev = { - .platform_data = &nuri_lcd_platform_data, - }, -}; - -/* I2C1 */ -static struct i2c_board_info i2c1_devs[] __initdata = { - /* Gyro, To be updated */ -}; - -/* TSP */ -static struct mxt_platform_data mxt_platform_data = { - .x_line = 18, - .y_line = 11, - .x_size = 1024, - .y_size = 600, - .blen = 0x1, - .threshold = 0x28, - .voltage = 2800000, /* 2.8V */ - .orient = MXT_DIAGONAL_COUNTER, - .irqflags = IRQF_TRIGGER_FALLING, -}; - -static struct s3c2410_platform_i2c i2c3_data __initdata = { - .flags = 0, - .bus_num = 3, - .slave_addr = 0x10, - .frequency = 400 * 1000, - .sda_delay = 100, -}; - -static struct i2c_board_info i2c3_devs[] __initdata = { - { - I2C_BOARD_INFO("atmel_mxt_ts", 0x4a), - .platform_data = &mxt_platform_data, - .irq = IRQ_EINT(4), - }, -}; - -static void __init nuri_tsp_init(void) -{ - int gpio; - - /* TOUCH_INT: XEINT_4 */ - gpio = EXYNOS4_GPX0(4); - gpio_request(gpio, "TOUCH_INT"); - s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(0xf)); - s3c_gpio_setpull(gpio, S3C_GPIO_PULL_UP); -} - -static struct regulator_consumer_supply __initdata max8997_ldo1_[] = { - REGULATOR_SUPPLY("vdd", "s5p-adc"), /* Used by CPU's ADC drv */ -}; -static struct regulator_consumer_supply __initdata max8997_ldo3_[] = { - REGULATOR_SUPPLY("vusb_d", "s3c-hsotg"), /* USB */ - REGULATOR_SUPPLY("vddcore", "s5p-mipi-csis.0"), /* MIPI */ -}; -static struct regulator_consumer_supply __initdata max8997_ldo4_[] = { - REGULATOR_SUPPLY("vddio", "s5p-mipi-csis.0"), /* MIPI */ -}; -static struct regulator_consumer_supply __initdata max8997_ldo5_[] = { - REGULATOR_SUPPLY("vhsic", "modemctl"), /* MODEM */ -}; -static struct regulator_consumer_supply nuri_max8997_ldo6_consumer[] = { - REGULATOR_SUPPLY("vdd_reg", "6-003c"), /* S5K6AA camera */ -}; -static struct regulator_consumer_supply __initdata max8997_ldo7_[] = { - REGULATOR_SUPPLY("dig_18", "0-001f"), /* HCD803 */ -}; -static struct regulator_consumer_supply __initdata max8997_ldo8_[] = { - REGULATOR_SUPPLY("vusb_a", "s3c-hsotg"), /* USB */ - REGULATOR_SUPPLY("vdac", NULL), /* Used by CPU */ -}; -static struct regulator_consumer_supply __initdata max8997_ldo11_[] = { - REGULATOR_SUPPLY("vcc", "platform-lcd"), /* U804 LVDS */ -}; -static struct regulator_consumer_supply __initdata max8997_ldo12_[] = { - REGULATOR_SUPPLY("vddio", "6-003c"), /* HDC802 */ -}; -static struct regulator_consumer_supply __initdata max8997_ldo13_[] = { - REGULATOR_SUPPLY("vmmc", "exynos4-sdhci.2"), /* TFLASH */ -}; -static struct regulator_consumer_supply __initdata max8997_ldo14_[] = { - REGULATOR_SUPPLY("inmotor", "max8997-haptic"), -}; -static struct regulator_consumer_supply __initdata max8997_ldo15_[] = { - REGULATOR_SUPPLY("avdd", "3-004a"), /* Touch Screen */ -}; -static struct regulator_consumer_supply __initdata max8997_ldo16_[] = { - REGULATOR_SUPPLY("d_sensor", "0-001f"), /* HDC803 */ -}; -static struct regulator_consumer_supply __initdata max8997_ldo18_[] = { - REGULATOR_SUPPLY("vdd", "3-004a"), /* Touch Screen */ -}; -static struct regulator_consumer_supply __initdata max8997_buck1_[] = { - REGULATOR_SUPPLY("vdd_arm", NULL), /* CPUFREQ */ -}; -static struct regulator_consumer_supply __initdata max8997_buck2_[] = { - REGULATOR_SUPPLY("vdd_int", "exynos4210-busfreq.0"), /* CPUFREQ */ -}; -static struct regulator_consumer_supply __initdata max8997_buck3_[] = { - REGULATOR_SUPPLY("vdd", "mali_dev.0"), /* G3D of Exynos 4 */ -}; -static struct regulator_consumer_supply __initdata max8997_buck4_[] = { - REGULATOR_SUPPLY("core", "0-001f"), /* HDC803 */ -}; -static struct regulator_consumer_supply __initdata max8997_buck6_[] = { - REGULATOR_SUPPLY("dig_28", "0-001f"), /* pin "7" of HDC803 */ -}; -static struct regulator_consumer_supply __initdata max8997_esafeout1_[] = { - REGULATOR_SUPPLY("usb_vbus", NULL), /* CPU's USB OTG */ -}; -static struct regulator_consumer_supply __initdata max8997_esafeout2_[] = { - REGULATOR_SUPPLY("usb_vbus", "modemctl"), /* VBUS of Modem */ -}; - -static struct regulator_consumer_supply __initdata max8997_charger_[] = { - REGULATOR_SUPPLY("vinchg1", "charger-manager.0"), -}; -static struct regulator_consumer_supply __initdata max8997_chg_toff_[] = { - REGULATOR_SUPPLY("vinchg_stop", NULL), /* for jack interrupt handlers */ -}; - -static struct regulator_consumer_supply __initdata max8997_32khz_ap_[] = { - REGULATOR_SUPPLY("gps_clk", "bcm4751"), - REGULATOR_SUPPLY("bt_clk", "bcm4330-b1"), - REGULATOR_SUPPLY("wifi_clk", "bcm433-b1"), -}; - -static struct regulator_init_data __initdata max8997_ldo1_data = { - .constraints = { - .name = "VADC_3.3V_C210", - .min_uV = 3300000, - .max_uV = 3300000, - .valid_ops_mask = REGULATOR_CHANGE_STATUS, - .apply_uV = 1, - .state_mem = { - .disabled = 1, - }, - }, - .num_consumer_supplies = ARRAY_SIZE(max8997_ldo1_), - .consumer_supplies = max8997_ldo1_, -}; - -static struct regulator_init_data __initdata max8997_ldo2_data = { - .constraints = { - .name = "VALIVE_1.1V_C210", - .min_uV = 1100000, - .max_uV = 1100000, - .apply_uV = 1, - .always_on = 1, - .state_mem = { - .enabled = 1, - }, - }, -}; - -static struct regulator_init_data __initdata max8997_ldo3_data = { - .constraints = { - .name = "VUSB_1.1V_C210", - .min_uV = 1100000, - .max_uV = 1100000, - .valid_ops_mask = REGULATOR_CHANGE_STATUS, - .apply_uV = 1, - .state_mem = { - .disabled = 1, - }, - }, - .num_consumer_supplies = ARRAY_SIZE(max8997_ldo3_), - .consumer_supplies = max8997_ldo3_, -}; - -static struct regulator_init_data __initdata max8997_ldo4_data = { - .constraints = { - .name = "VMIPI_1.8V", - .min_uV = 1800000, - .max_uV = 1800000, - .valid_ops_mask = REGULATOR_CHANGE_STATUS, - .apply_uV = 1, - .state_mem = { - .disabled = 1, - }, - }, - .num_consumer_supplies = ARRAY_SIZE(max8997_ldo4_), - .consumer_supplies = max8997_ldo4_, -}; - -static struct regulator_init_data __initdata max8997_ldo5_data = { - .constraints = { - .name = "VHSIC_1.2V_C210", - .min_uV = 1200000, - .max_uV = 1200000, - .valid_ops_mask = REGULATOR_CHANGE_STATUS, - .apply_uV = 1, - .state_mem = { - .disabled = 1, - }, - }, - .num_consumer_supplies = ARRAY_SIZE(max8997_ldo5_), - .consumer_supplies = max8997_ldo5_, -}; - -static struct regulator_init_data __initdata max8997_ldo6_data = { - .constraints = { - .name = "VCC_1.8V_PDA", - .min_uV = 1800000, - .max_uV = 1800000, - .apply_uV = 1, - .always_on = 1, - .state_mem = { - .enabled = 1, - }, - }, - .num_consumer_supplies = ARRAY_SIZE(nuri_max8997_ldo6_consumer), - .consumer_supplies = nuri_max8997_ldo6_consumer, -}; - -static struct regulator_init_data __initdata max8997_ldo7_data = { - .constraints = { - .name = "CAM_ISP_1.8V", - .min_uV = 1800000, - .max_uV = 1800000, - .valid_ops_mask = REGULATOR_CHANGE_STATUS, - .apply_uV = 1, - .state_mem = { - .disabled = 1, - }, - }, - .num_consumer_supplies = ARRAY_SIZE(max8997_ldo7_), - .consumer_supplies = max8997_ldo7_, -}; - -static struct regulator_init_data __initdata max8997_ldo8_data = { - .constraints = { - .name = "VUSB+VDAC_3.3V_C210", - .min_uV = 3300000, - .max_uV = 3300000, - .valid_ops_mask = REGULATOR_CHANGE_STATUS, - .apply_uV = 1, - .state_mem = { - .disabled = 1, - }, - }, - .num_consumer_supplies = ARRAY_SIZE(max8997_ldo8_), - .consumer_supplies = max8997_ldo8_, -}; - -static struct regulator_init_data __initdata max8997_ldo9_data = { - .constraints = { - .name = "VCC_2.8V_PDA", - .min_uV = 2800000, - .max_uV = 2800000, - .apply_uV = 1, - .always_on = 1, - .state_mem = { - .enabled = 1, - }, - }, -}; - -static struct regulator_init_data __initdata max8997_ldo10_data = { - .constraints = { - .name = "VPLL_1.1V_C210", - .min_uV = 1100000, - .max_uV = 1100000, - .apply_uV = 1, - .always_on = 1, - .state_mem = { - .disabled = 1, - }, - }, -}; - -static struct regulator_init_data __initdata max8997_ldo11_data = { - .constraints = { - .name = "LVDS_VDD3.3V", - .min_uV = 3300000, - .max_uV = 3300000, - .valid_ops_mask = REGULATOR_CHANGE_STATUS, - .apply_uV = 1, - .boot_on = 1, - .state_mem = { - .disabled = 1, - }, - }, - .num_consumer_supplies = ARRAY_SIZE(max8997_ldo11_), - .consumer_supplies = max8997_ldo11_, -}; - -static struct regulator_init_data __initdata max8997_ldo12_data = { - .constraints = { - .name = "VT_CAM_1.8V", - .min_uV = 1800000, - .max_uV = 1800000, - .valid_ops_mask = REGULATOR_CHANGE_STATUS, - .apply_uV = 1, - .state_mem = { - .disabled = 1, - }, - }, - .num_consumer_supplies = ARRAY_SIZE(max8997_ldo12_), - .consumer_supplies = max8997_ldo12_, -}; - -static struct regulator_init_data __initdata max8997_ldo13_data = { - .constraints = { - .name = "VTF_2.8V", - .min_uV = 2800000, - .max_uV = 2800000, - .valid_ops_mask = REGULATOR_CHANGE_STATUS, - .apply_uV = 1, - .state_mem = { - .disabled = 1, - }, - }, - .num_consumer_supplies = ARRAY_SIZE(max8997_ldo13_), - .consumer_supplies = max8997_ldo13_, -}; - -static struct regulator_init_data __initdata max8997_ldo14_data = { - .constraints = { - .name = "VCC_3.0V_MOTOR", - .min_uV = 3000000, - .max_uV = 3000000, - .valid_ops_mask = REGULATOR_CHANGE_STATUS, - .apply_uV = 1, - .state_mem = { - .disabled = 1, - }, - }, - .num_consumer_supplies = ARRAY_SIZE(max8997_ldo14_), - .consumer_supplies = max8997_ldo14_, -}; - -static struct regulator_init_data __initdata max8997_ldo15_data = { - .constraints = { - .name = "VTOUCH_ADVV2.8V", - .min_uV = 2800000, - .max_uV = 2800000, - .apply_uV = 1, - .valid_ops_mask = REGULATOR_CHANGE_STATUS, - .state_mem = { - .disabled = 1, - }, - }, - .num_consumer_supplies = ARRAY_SIZE(max8997_ldo15_), - .consumer_supplies = max8997_ldo15_, -}; - -static struct regulator_init_data __initdata max8997_ldo16_data = { - .constraints = { - .name = "CAM_SENSOR_IO_1.8V", - .min_uV = 1800000, - .max_uV = 1800000, - .valid_ops_mask = REGULATOR_CHANGE_STATUS, - .apply_uV = 1, - .state_mem = { - .disabled = 1, - }, - }, - .num_consumer_supplies = ARRAY_SIZE(max8997_ldo16_), - .consumer_supplies = max8997_ldo16_, -}; - -static struct regulator_init_data __initdata max8997_ldo18_data = { - .constraints = { - .name = "VTOUCH_VDD2.8V", - .min_uV = 2800000, - .max_uV = 2800000, - .valid_ops_mask = REGULATOR_CHANGE_STATUS, - .apply_uV = 1, - .state_mem = { - .disabled = 1, - }, - }, - .num_consumer_supplies = ARRAY_SIZE(max8997_ldo18_), - .consumer_supplies = max8997_ldo18_, -}; - -static struct regulator_init_data __initdata max8997_ldo21_data = { - .constraints = { - .name = "VDDQ_M1M2_1.2V", - .min_uV = 1200000, - .max_uV = 1200000, - .apply_uV = 1, - .always_on = 1, - .state_mem = { - .disabled = 1, - }, - }, -}; - -static struct regulator_init_data __initdata max8997_buck1_data = { - .constraints = { - .name = "VARM_1.2V_C210", - .min_uV = 900000, - .max_uV = 1350000, - .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, - .always_on = 1, - .state_mem = { - .disabled = 1, - }, - }, - .num_consumer_supplies = ARRAY_SIZE(max8997_buck1_), - .consumer_supplies = max8997_buck1_, -}; - -static struct regulator_init_data __initdata max8997_buck2_data = { - .constraints = { - .name = "VINT_1.1V_C210", - .min_uV = 900000, - .max_uV = 1200000, - .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, - .always_on = 1, - .state_mem = { - .disabled = 1, - }, - }, - .num_consumer_supplies = ARRAY_SIZE(max8997_buck2_), - .consumer_supplies = max8997_buck2_, -}; - -static struct regulator_init_data __initdata max8997_buck3_data = { - .constraints = { - .name = "VG3D_1.1V_C210", - .min_uV = 900000, - .max_uV = 1100000, - .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | - REGULATOR_CHANGE_STATUS, - .state_mem = { - .disabled = 1, - }, - }, - .num_consumer_supplies = ARRAY_SIZE(max8997_buck3_), - .consumer_supplies = max8997_buck3_, -}; - -static struct regulator_init_data __initdata max8997_buck4_data = { - .constraints = { - .name = "CAM_ISP_CORE_1.2V", - .min_uV = 1200000, - .max_uV = 1200000, - .apply_uV = 1, - .valid_ops_mask = REGULATOR_CHANGE_STATUS, - .state_mem = { - .disabled = 1, - }, - }, - .num_consumer_supplies = ARRAY_SIZE(max8997_buck4_), - .consumer_supplies = max8997_buck4_, -}; - -static struct regulator_init_data __initdata max8997_buck5_data = { - .constraints = { - .name = "VMEM_1.2V_C210", - .min_uV = 1200000, - .max_uV = 1200000, - .apply_uV = 1, - .always_on = 1, - .state_mem = { - .enabled = 1, - }, - }, -}; - -static struct regulator_init_data __initdata max8997_buck6_data = { - .constraints = { - .name = "CAM_AF_2.8V", - .min_uV = 2800000, - .max_uV = 2800000, - .valid_ops_mask = REGULATOR_CHANGE_STATUS, - .state_mem = { - .disabled = 1, - }, - }, - .num_consumer_supplies = ARRAY_SIZE(max8997_buck6_), - .consumer_supplies = max8997_buck6_, -}; - -static struct regulator_init_data __initdata max8997_buck7_data = { - .constraints = { - .name = "VCC_SUB_2.0V", - .min_uV = 2000000, - .max_uV = 2000000, - .apply_uV = 1, - .always_on = 1, - .state_mem = { - .enabled = 1, - }, - }, -}; - -static struct regulator_init_data __initdata max8997_32khz_ap_data = { - .constraints = { - .name = "32KHz AP", - .always_on = 1, - .state_mem = { - .enabled = 1, - }, - }, - .num_consumer_supplies = ARRAY_SIZE(max8997_32khz_ap_), - .consumer_supplies = max8997_32khz_ap_, -}; - -static struct regulator_init_data __initdata max8997_32khz_cp_data = { - .constraints = { - .name = "32KHz CP", - .state_mem = { - .disabled = 1, - }, - }, -}; - -static struct regulator_init_data __initdata max8997_vichg_data = { - .constraints = { - .name = "VICHG", - .state_mem = { - .disabled = 1, - }, - }, -}; - -static struct regulator_init_data __initdata max8997_esafeout1_data = { - .constraints = { - .name = "SAFEOUT1", - .valid_ops_mask = REGULATOR_CHANGE_STATUS, - .always_on = 1, - .state_mem = { - .disabled = 1, - }, - }, - .num_consumer_supplies = ARRAY_SIZE(max8997_esafeout1_), - .consumer_supplies = max8997_esafeout1_, -}; - -static struct regulator_init_data __initdata max8997_esafeout2_data = { - .constraints = { - .name = "SAFEOUT2", - .valid_ops_mask = REGULATOR_CHANGE_STATUS, - .state_mem = { - .disabled = 1, - }, - }, - .num_consumer_supplies = ARRAY_SIZE(max8997_esafeout2_), - .consumer_supplies = max8997_esafeout2_, -}; - -static struct regulator_init_data __initdata max8997_charger_cv_data = { - .constraints = { - .name = "CHARGER_CV", - .min_uV = 4200000, - .max_uV = 4200000, - .apply_uV = 1, - }, -}; - -static struct regulator_init_data __initdata max8997_charger_data = { - .constraints = { - .name = "CHARGER", - .min_uA = 200000, - .max_uA = 950000, - .boot_on = 1, - .valid_ops_mask = REGULATOR_CHANGE_STATUS | - REGULATOR_CHANGE_CURRENT, - }, - .num_consumer_supplies = ARRAY_SIZE(max8997_charger_), - .consumer_supplies = max8997_charger_, -}; - -static struct regulator_init_data __initdata max8997_charger_topoff_data = { - .constraints = { - .name = "CHARGER TOPOFF", - .min_uA = 50000, - .max_uA = 200000, - .valid_ops_mask = REGULATOR_CHANGE_CURRENT, - }, - .num_consumer_supplies = ARRAY_SIZE(max8997_chg_toff_), - .consumer_supplies = max8997_chg_toff_, -}; - -static struct max8997_regulator_data __initdata nuri_max8997_regulators[] = { - { MAX8997_LDO1, &max8997_ldo1_data }, - { MAX8997_LDO2, &max8997_ldo2_data }, - { MAX8997_LDO3, &max8997_ldo3_data }, - { MAX8997_LDO4, &max8997_ldo4_data }, - { MAX8997_LDO5, &max8997_ldo5_data }, - { MAX8997_LDO6, &max8997_ldo6_data }, - { MAX8997_LDO7, &max8997_ldo7_data }, - { MAX8997_LDO8, &max8997_ldo8_data }, - { MAX8997_LDO9, &max8997_ldo9_data }, - { MAX8997_LDO10, &max8997_ldo10_data }, - { MAX8997_LDO11, &max8997_ldo11_data }, - { MAX8997_LDO12, &max8997_ldo12_data }, - { MAX8997_LDO13, &max8997_ldo13_data }, - { MAX8997_LDO14, &max8997_ldo14_data }, - { MAX8997_LDO15, &max8997_ldo15_data }, - { MAX8997_LDO16, &max8997_ldo16_data }, - - { MAX8997_LDO18, &max8997_ldo18_data }, - { MAX8997_LDO21, &max8997_ldo21_data }, - - { MAX8997_BUCK1, &max8997_buck1_data }, - { MAX8997_BUCK2, &max8997_buck2_data }, - { MAX8997_BUCK3, &max8997_buck3_data }, - { MAX8997_BUCK4, &max8997_buck4_data }, - { MAX8997_BUCK5, &max8997_buck5_data }, - { MAX8997_BUCK6, &max8997_buck6_data }, - { MAX8997_BUCK7, &max8997_buck7_data }, - - { MAX8997_EN32KHZ_AP, &max8997_32khz_ap_data }, - { MAX8997_EN32KHZ_CP, &max8997_32khz_cp_data }, - - { MAX8997_ENVICHG, &max8997_vichg_data }, - { MAX8997_ESAFEOUT1, &max8997_esafeout1_data }, - { MAX8997_ESAFEOUT2, &max8997_esafeout2_data }, - { MAX8997_CHARGER_CV, &max8997_charger_cv_data }, - { MAX8997_CHARGER, &max8997_charger_data }, - { MAX8997_CHARGER_TOPOFF, &max8997_charger_topoff_data }, -}; - -static struct max8997_platform_data __initdata nuri_max8997_pdata = { - .wakeup = 1, - - .num_regulators = ARRAY_SIZE(nuri_max8997_regulators), - .regulators = nuri_max8997_regulators, - - .buck125_gpios = { EXYNOS4_GPX0(5), EXYNOS4_GPX0(6), EXYNOS4_GPL0(0) }, - - .buck1_voltage[0] = 1350000, /* 1.35V */ - .buck1_voltage[1] = 1300000, /* 1.3V */ - .buck1_voltage[2] = 1250000, /* 1.25V */ - .buck1_voltage[3] = 1200000, /* 1.2V */ - .buck1_voltage[4] = 1150000, /* 1.15V */ - .buck1_voltage[5] = 1100000, /* 1.1V */ - .buck1_voltage[6] = 1000000, /* 1.0V */ - .buck1_voltage[7] = 950000, /* 0.95V */ - - .buck2_voltage[0] = 1100000, /* 1.1V */ - .buck2_voltage[1] = 1000000, /* 1.0V */ - .buck2_voltage[2] = 950000, /* 0.95V */ - .buck2_voltage[3] = 900000, /* 0.9V */ - .buck2_voltage[4] = 1100000, /* 1.1V */ - .buck2_voltage[5] = 1000000, /* 1.0V */ - .buck2_voltage[6] = 950000, /* 0.95V */ - .buck2_voltage[7] = 900000, /* 0.9V */ - - .buck5_voltage[0] = 1200000, /* 1.2V */ - .buck5_voltage[1] = 1200000, /* 1.2V */ - .buck5_voltage[2] = 1200000, /* 1.2V */ - .buck5_voltage[3] = 1200000, /* 1.2V */ - .buck5_voltage[4] = 1200000, /* 1.2V */ - .buck5_voltage[5] = 1200000, /* 1.2V */ - .buck5_voltage[6] = 1200000, /* 1.2V */ - .buck5_voltage[7] = 1200000, /* 1.2V */ -}; - -/* GPIO I2C 5 (PMIC) */ -enum { I2C5_MAX8997 }; -static struct i2c_board_info i2c5_devs[] __initdata = { - [I2C5_MAX8997] = { - I2C_BOARD_INFO("max8997", 0xCC >> 1), - .platform_data = &nuri_max8997_pdata, - }, -}; - -static struct max17042_platform_data nuri_battery_platform_data = { -}; - -/* GPIO I2C 9 (Fuel Gauge) */ -static struct i2c_gpio_platform_data i2c9_gpio_data = { - .sda_pin = EXYNOS4_GPY4(0), /* XM0ADDR_8 */ - .scl_pin = EXYNOS4_GPY4(1), /* XM0ADDR_9 */ -}; -static struct platform_device i2c9_gpio = { - .name = "i2c-gpio", - .id = 9, - .dev = { - .platform_data = &i2c9_gpio_data, - }, -}; -enum { I2C9_MAX17042}; -static struct i2c_board_info i2c9_devs[] __initdata = { - [I2C9_MAX17042] = { - I2C_BOARD_INFO("max17042", 0x36), - .platform_data = &nuri_battery_platform_data, - }, -}; - -/* MAX8903 Secondary Charger */ -static struct regulator_consumer_supply supplies_max8903[] = { - REGULATOR_SUPPLY("vinchg2", "charger-manager.0"), -}; - -static struct regulator_init_data max8903_charger_en_data = { - .constraints = { - .name = "VOUT_CHARGER", - .valid_ops_mask = REGULATOR_CHANGE_STATUS, - .boot_on = 1, - }, - .num_consumer_supplies = ARRAY_SIZE(supplies_max8903), - .consumer_supplies = supplies_max8903, -}; - -static struct fixed_voltage_config max8903_charger_en = { - .supply_name = "VOUT_CHARGER", - .microvolts = 5000000, /* Assume 5VDC */ - .gpio = EXYNOS4_GPY4(5), /* TA_EN negaged */ - .enable_high = 0, /* Enable = Low */ - .enabled_at_boot = 1, - .init_data = &max8903_charger_en_data, -}; - -static struct platform_device max8903_fixed_reg_dev = { - .name = "reg-fixed-voltage", - .id = FIXED_REG_ID_MAX8903, - .dev = { .platform_data = &max8903_charger_en }, -}; - -static struct max8903_pdata nuri_max8903 = { - /* - * cen: don't control with the driver, let it be - * controlled by regulator above - */ - .dok = EXYNOS4_GPX1(4), /* TA_nCONNECTED */ - /* uok, usus: not connected */ - .chg = EXYNOS4_GPE2(0), /* TA_nCHG */ - /* flt: vcc_1.8V_pda */ - .dcm = EXYNOS4_GPL0(1), /* CURR_ADJ */ - - .dc_valid = true, - .usb_valid = false, /* USB is not wired to MAX8903 */ -}; - -static struct platform_device nuri_max8903_device = { - .name = "max8903-charger", - .dev = { - .platform_data = &nuri_max8903, - }, -}; - -static void __init nuri_power_init(void) -{ - int gpio; - int ta_en = 0; - - gpio = EXYNOS4_GPX0(7); - gpio_request(gpio, "AP_PMIC_IRQ"); - s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(0xf)); - s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); - - gpio = EXYNOS4_GPX2(3); - gpio_request(gpio, "FUEL_ALERT"); - s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(0xf)); - s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); - - gpio = nuri_max8903.dok; - gpio_request(gpio, "TA_nCONNECTED"); - s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(0xf)); - s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); - ta_en = gpio_get_value(gpio) ? 0 : 1; - - gpio = nuri_max8903.chg; - gpio_request(gpio, "TA_nCHG"); - gpio_direction_input(gpio); - - gpio = nuri_max8903.dcm; - gpio_request(gpio, "CURR_ADJ"); - gpio_direction_output(gpio, ta_en); -} - -/* USB EHCI */ -static struct s5p_ehci_platdata nuri_ehci_pdata; - -static void __init nuri_ehci_init(void) -{ - struct s5p_ehci_platdata *pdata = &nuri_ehci_pdata; - - s5p_ehci_set_platdata(pdata); -} - -/* USB OTG */ -static struct s3c_hsotg_plat nuri_hsotg_pdata; - -/* CAMERA */ -static struct regulator_consumer_supply cam_vt_cam15_supply = - REGULATOR_SUPPLY("vdd_core", "6-003c"); - -static struct regulator_init_data cam_vt_cam15_reg_init_data = { - .constraints = { .valid_ops_mask = REGULATOR_CHANGE_STATUS }, - .num_consumer_supplies = 1, - .consumer_supplies = &cam_vt_cam15_supply, -}; - -static struct fixed_voltage_config cam_vt_cam15_fixed_voltage_cfg = { - .supply_name = "VT_CAM_1.5V", - .microvolts = 1500000, - .gpio = EXYNOS4_GPE2(2), /* VT_CAM_1.5V_EN */ - .enable_high = 1, - .init_data = &cam_vt_cam15_reg_init_data, -}; - -static struct platform_device cam_vt_cam15_fixed_rdev = { - .name = "reg-fixed-voltage", .id = FIXED_REG_ID_CAM_VT_15V, - .dev = { .platform_data = &cam_vt_cam15_fixed_voltage_cfg }, -}; - -static struct regulator_consumer_supply cam_vdda_supply[] = { - REGULATOR_SUPPLY("vdda", "6-003c"), - REGULATOR_SUPPLY("a_sensor", "0-001f"), -}; - -static struct regulator_init_data cam_vdda_reg_init_data = { - .constraints = { .valid_ops_mask = REGULATOR_CHANGE_STATUS }, - .num_consumer_supplies = ARRAY_SIZE(cam_vdda_supply), - .consumer_supplies = cam_vdda_supply, -}; - -static struct fixed_voltage_config cam_vdda_fixed_voltage_cfg = { - .supply_name = "CAM_IO_EN", - .microvolts = 2800000, - .gpio = EXYNOS4_GPE2(1), /* CAM_IO_EN */ - .enable_high = 1, - .init_data = &cam_vdda_reg_init_data, -}; - -static struct platform_device cam_vdda_fixed_rdev = { - .name = "reg-fixed-voltage", .id = FIXED_REG_ID_CAM_A28V, - .dev = { .platform_data = &cam_vdda_fixed_voltage_cfg }, -}; - -static struct regulator_consumer_supply camera_8m_12v_supply = - REGULATOR_SUPPLY("dig_12", "0-001f"); - -static struct regulator_init_data cam_8m_12v_reg_init_data = { - .num_consumer_supplies = 1, - .consumer_supplies = &camera_8m_12v_supply, - .constraints = { - .valid_ops_mask = REGULATOR_CHANGE_STATUS - }, -}; - -static struct fixed_voltage_config cam_8m_12v_fixed_voltage_cfg = { - .supply_name = "8M_1.2V", - .microvolts = 1200000, - .gpio = EXYNOS4_GPE2(5), /* 8M_1.2V_EN */ - .enable_high = 1, - .init_data = &cam_8m_12v_reg_init_data, -}; - -static struct platform_device cam_8m_12v_fixed_rdev = { - .name = "reg-fixed-voltage", .id = FIXED_REG_ID_CAM_12V, - .dev = { .platform_data = &cam_8m_12v_fixed_voltage_cfg }, -}; - -static struct s5p_platform_mipi_csis mipi_csis_platdata = { - .clk_rate = 166000000UL, - .lanes = 2, - .hs_settle = 12, -}; - -#define GPIO_CAM_MEGA_RST EXYNOS4_GPY3(7) /* ISP_RESET */ -#define GPIO_CAM_8M_ISP_INT EXYNOS4_GPL2(5) -#define GPIO_CAM_VT_NSTBY EXYNOS4_GPL2(0) -#define GPIO_CAM_VT_NRST EXYNOS4_GPL2(1) - -static struct s5k6aa_platform_data s5k6aa_pldata = { - .mclk_frequency = 24000000UL, - .gpio_reset = { GPIO_CAM_VT_NRST, 0 }, - .gpio_stby = { GPIO_CAM_VT_NSTBY, 0 }, - .bus_type = V4L2_MBUS_PARALLEL, - .horiz_flip = 1, -}; - -static struct i2c_board_info s5k6aa_board_info = { - I2C_BOARD_INFO("S5K6AA", 0x3c), - .platform_data = &s5k6aa_pldata, -}; - -static struct m5mols_platform_data m5mols_platdata = { - .gpio_reset = GPIO_CAM_MEGA_RST, -}; - -static struct i2c_board_info m5mols_board_info = { - I2C_BOARD_INFO("M5MOLS", 0x1F), - .platform_data = &m5mols_platdata, -}; - -static struct fimc_source_info nuri_camera_sensors[] = { - { - .flags = V4L2_MBUS_PCLK_SAMPLE_RISING | - V4L2_MBUS_VSYNC_ACTIVE_LOW, - .fimc_bus_type = FIMC_BUS_TYPE_ITU_601, - .board_info = &s5k6aa_board_info, - .clk_frequency = 24000000UL, - .i2c_bus_num = 6, - }, { - .flags = V4L2_MBUS_PCLK_SAMPLE_FALLING | - V4L2_MBUS_VSYNC_ACTIVE_LOW, - .fimc_bus_type = FIMC_BUS_TYPE_MIPI_CSI2, - .board_info = &m5mols_board_info, - .clk_frequency = 24000000UL, - }, -}; - -static struct s5p_platform_fimc fimc_md_platdata = { - .source_info = nuri_camera_sensors, - .num_clients = ARRAY_SIZE(nuri_camera_sensors), -}; - -static struct gpio nuri_camera_gpios[] = { - { GPIO_CAM_VT_NSTBY, GPIOF_OUT_INIT_LOW, "CAM_VGA_NSTBY" }, - { GPIO_CAM_VT_NRST, GPIOF_OUT_INIT_LOW, "CAM_VGA_NRST" }, - { GPIO_CAM_8M_ISP_INT, GPIOF_IN, "8M_ISP_INT" }, - { GPIO_CAM_MEGA_RST, GPIOF_OUT_INIT_LOW, "CAM_8M_NRST" }, -}; - -static void __init nuri_camera_init(void) -{ - s3c_set_platdata(&mipi_csis_platdata, sizeof(mipi_csis_platdata), - &s5p_device_mipi_csis0); - s3c_set_platdata(&fimc_md_platdata, sizeof(fimc_md_platdata), - &s5p_device_fimc_md); - - if (gpio_request_array(nuri_camera_gpios, - ARRAY_SIZE(nuri_camera_gpios))) { - pr_err("%s: GPIO request failed\n", __func__); - return; - } - - m5mols_board_info.irq = s5p_register_gpio_interrupt(GPIO_CAM_8M_ISP_INT); - if (m5mols_board_info.irq >= 0) - s3c_gpio_cfgpin(GPIO_CAM_8M_ISP_INT, S3C_GPIO_SFN(0xF)); - else - pr_err("%s: Failed to configure 8M_ISP_INT GPIO\n", __func__); - - /* Free GPIOs controlled directly by the sensor drivers. */ - gpio_free(GPIO_CAM_VT_NRST); - gpio_free(GPIO_CAM_VT_NSTBY); - gpio_free(GPIO_CAM_MEGA_RST); - - if (exynos4_fimc_setup_gpio(S5P_CAMPORT_A)) { - pr_err("%s: Camera port A setup failed\n", __func__); - return; - } - /* Increase drive strength of the sensor clock output */ - s5p_gpio_set_drvstr(EXYNOS4_GPJ1(3), S5P_GPIO_DRVSTR_LV4); -} - -static struct s3c2410_platform_i2c nuri_i2c6_platdata __initdata = { - .frequency = 400000U, - .sda_delay = 200, - .bus_num = 6, -}; - -static struct s3c2410_platform_i2c nuri_i2c0_platdata __initdata = { - .frequency = 400000U, - .sda_delay = 200, -}; - -/* DEVFREQ controlling memory/bus */ -static struct platform_device exynos4_bus_devfreq = { - .name = "exynos4210-busfreq", -}; - -static struct platform_device *nuri_devices[] __initdata = { - /* Samsung Platform Devices */ - &s3c_device_i2c5, /* PMIC should initialize first */ - &s3c_device_i2c0, - &s3c_device_i2c6, - &emmc_fixed_voltage, - &s5p_device_mipi_csis0, - &s5p_device_fimc0, - &s5p_device_fimc1, - &s5p_device_fimc2, - &s5p_device_fimc3, - &s5p_device_fimd0, - &s3c_device_hsmmc0, - &s3c_device_hsmmc2, - &s3c_device_hsmmc3, - &s3c_device_wdt, - &s3c_device_timer[0], - &s5p_device_ehci, - &s3c_device_i2c3, - &i2c9_gpio, - &s3c_device_adc, - &s5p_device_g2d, - &s5p_device_jpeg, - &s3c_device_rtc, - &s5p_device_mfc, - &s5p_device_mfc_l, - &s5p_device_mfc_r, - &s5p_device_fimc_md, - &s3c_device_usb_hsotg, - - /* NURI Devices */ - &nuri_gpio_keys, - &nuri_lcd_device, - &nuri_backlight_device, - &max8903_fixed_reg_dev, - &nuri_max8903_device, - &cam_vt_cam15_fixed_rdev, - &cam_vdda_fixed_rdev, - &cam_8m_12v_fixed_rdev, - &exynos4_bus_devfreq, -}; - -static void __init nuri_map_io(void) -{ - exynos_init_io(NULL, 0); - s3c24xx_init_uarts(nuri_uartcfgs, ARRAY_SIZE(nuri_uartcfgs)); - xxti_f = 0; - xusbxti_f = 24000000; -} - -static void __init nuri_reserve(void) -{ - s5p_mfc_reserve_mem(0x43000000, 8 << 20, 0x51000000, 8 << 20); -} - -static void __init nuri_machine_init(void) -{ - nuri_sdhci_init(); - nuri_tsp_init(); - nuri_power_init(); - - s3c_i2c0_set_platdata(&nuri_i2c0_platdata); - i2c_register_board_info(1, i2c1_devs, ARRAY_SIZE(i2c1_devs)); - s3c_i2c3_set_platdata(&i2c3_data); - i2c_register_board_info(3, i2c3_devs, ARRAY_SIZE(i2c3_devs)); - s3c_i2c5_set_platdata(NULL); - i2c5_devs[I2C5_MAX8997].irq = gpio_to_irq(EXYNOS4_GPX0(7)); - i2c_register_board_info(5, i2c5_devs, ARRAY_SIZE(i2c5_devs)); - i2c9_devs[I2C9_MAX17042].irq = gpio_to_irq(EXYNOS4_GPX2(3)); - i2c_register_board_info(9, i2c9_devs, ARRAY_SIZE(i2c9_devs)); - s3c_i2c6_set_platdata(&nuri_i2c6_platdata); - -#ifdef CONFIG_DRM_EXYNOS - s5p_device_fimd0.dev.platform_data = &drm_fimd_pdata; - exynos4_fimd0_gpio_setup_24bpp(); -#else - s5p_fimd0_set_platdata(&nuri_fb_pdata); -#endif - - nuri_camera_init(); - - nuri_ehci_init(); - s3c_hsotg_set_platdata(&nuri_hsotg_pdata); - - /* Last */ - platform_add_devices(nuri_devices, ARRAY_SIZE(nuri_devices)); -} - -MACHINE_START(NURI, "NURI") - /* Maintainer: Kyungmin Park <kyungmin.park@samsung.com> */ - .atag_offset = 0x100, - .smp = smp_ops(exynos_smp_ops), - .init_irq = exynos4_init_irq, - .map_io = nuri_map_io, - .init_machine = nuri_machine_init, - .init_late = exynos_init_late, - .init_time = exynos_init_time, - .reserve = &nuri_reserve, - .restart = exynos4_restart, -MACHINE_END diff --git a/arch/arm/mach-exynos/mach-origen.c b/arch/arm/mach-exynos/mach-origen.c deleted file mode 100644 index 27f03ed5d067..000000000000 --- a/arch/arm/mach-exynos/mach-origen.c +++ /dev/null @@ -1,823 +0,0 @@ -/* linux/arch/arm/mach-exynos4/mach-origen.c - * - * Copyright (c) 2011 Insignal Co., Ltd. - * http://www.insignal.co.kr/ - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#include <linux/serial_core.h> -#include <linux/leds.h> -#include <linux/gpio.h> -#include <linux/mmc/host.h> -#include <linux/platform_device.h> -#include <linux/io.h> -#include <linux/input.h> -#include <linux/pwm.h> -#include <linux/pwm_backlight.h> -#include <linux/gpio_keys.h> -#include <linux/i2c.h> -#include <linux/regulator/machine.h> -#include <linux/mfd/max8997.h> -#include <linux/lcd.h> -#include <linux/rfkill-gpio.h> -#include <linux/platform_data/i2c-s3c2410.h> -#include <linux/platform_data/s3c-hsotg.h> -#include <linux/platform_data/usb-ehci-s5p.h> -#include <linux/platform_data/usb-ohci-exynos.h> - -#include <asm/mach/arch.h> -#include <asm/mach-types.h> - -#include <video/platform_lcd.h> -#include <video/samsung_fimd.h> - -#include <plat/regs-serial.h> -#include <plat/cpu.h> -#include <plat/devs.h> -#include <plat/sdhci.h> -#include <plat/clock.h> -#include <plat/gpio-cfg.h> -#include <plat/backlight.h> -#include <plat/fb.h> -#include <plat/mfc.h> -#include <plat/hdmi.h> - -#include <mach/map.h> -#include <mach/irqs.h> - -#include <drm/exynos_drm.h> -#include "common.h" - -/* Following are default values for UCON, ULCON and UFCON UART registers */ -#define ORIGEN_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ - S3C2410_UCON_RXILEVEL | \ - S3C2410_UCON_TXIRQMODE | \ - S3C2410_UCON_RXIRQMODE | \ - S3C2410_UCON_RXFIFO_TOI | \ - S3C2443_UCON_RXERR_IRQEN) - -#define ORIGEN_ULCON_DEFAULT S3C2410_LCON_CS8 - -#define ORIGEN_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \ - S5PV210_UFCON_TXTRIG4 | \ - S5PV210_UFCON_RXTRIG4) - -static struct s3c2410_uartcfg origen_uartcfgs[] __initdata = { - [0] = { - .hwport = 0, - .flags = 0, - .ucon = ORIGEN_UCON_DEFAULT, - .ulcon = ORIGEN_ULCON_DEFAULT, - .ufcon = ORIGEN_UFCON_DEFAULT, - }, - [1] = { - .hwport = 1, - .flags = 0, - .ucon = ORIGEN_UCON_DEFAULT, - .ulcon = ORIGEN_ULCON_DEFAULT, - .ufcon = ORIGEN_UFCON_DEFAULT, - }, - [2] = { - .hwport = 2, - .flags = 0, - .ucon = ORIGEN_UCON_DEFAULT, - .ulcon = ORIGEN_ULCON_DEFAULT, - .ufcon = ORIGEN_UFCON_DEFAULT, - }, - [3] = { - .hwport = 3, - .flags = 0, - .ucon = ORIGEN_UCON_DEFAULT, - .ulcon = ORIGEN_ULCON_DEFAULT, - .ufcon = ORIGEN_UFCON_DEFAULT, - }, -}; - -static struct regulator_consumer_supply __initdata ldo3_consumer[] = { - REGULATOR_SUPPLY("vddcore", "s5p-mipi-csis.0"), /* MIPI */ - REGULATOR_SUPPLY("vdd", "exynos4-hdmi"), /* HDMI */ - REGULATOR_SUPPLY("vdd_pll", "exynos4-hdmi"), /* HDMI */ - REGULATOR_SUPPLY("vusb_a", "s3c-hsotg"), /* OTG */ -}; -static struct regulator_consumer_supply __initdata ldo6_consumer[] = { - REGULATOR_SUPPLY("vddio", "s5p-mipi-csis.0"), /* MIPI */ -}; -static struct regulator_consumer_supply __initdata ldo7_consumer[] = { - REGULATOR_SUPPLY("avdd", "alc5625"), /* Realtek ALC5625 */ -}; -static struct regulator_consumer_supply __initdata ldo8_consumer[] = { - REGULATOR_SUPPLY("vdd", "s5p-adc"), /* ADC */ - REGULATOR_SUPPLY("vdd_osc", "exynos4-hdmi"), /* HDMI */ - REGULATOR_SUPPLY("vusb_d", "s3c-hsotg"), /* OTG */ -}; -static struct regulator_consumer_supply __initdata ldo9_consumer[] = { - REGULATOR_SUPPLY("dvdd", "swb-a31"), /* AR6003 WLAN & CSR 8810 BT */ -}; -static struct regulator_consumer_supply __initdata ldo11_consumer[] = { - REGULATOR_SUPPLY("dvdd", "alc5625"), /* Realtek ALC5625 */ -}; -static struct regulator_consumer_supply __initdata ldo14_consumer[] = { - REGULATOR_SUPPLY("avdd18", "swb-a31"), /* AR6003 WLAN & CSR 8810 BT */ -}; -static struct regulator_consumer_supply __initdata ldo17_consumer[] = { - REGULATOR_SUPPLY("vdd33", "swb-a31"), /* AR6003 WLAN & CSR 8810 BT */ -}; -static struct regulator_consumer_supply __initdata buck1_consumer[] = { - REGULATOR_SUPPLY("vdd_arm", NULL), /* CPUFREQ */ -}; -static struct regulator_consumer_supply __initdata buck2_consumer[] = { - REGULATOR_SUPPLY("vdd_int", NULL), /* CPUFREQ */ -}; -static struct regulator_consumer_supply __initdata buck3_consumer[] = { - REGULATOR_SUPPLY("vdd_g3d", "mali_drm"), /* G3D */ -}; -static struct regulator_consumer_supply __initdata buck7_consumer[] = { - REGULATOR_SUPPLY("vcc", "platform-lcd"), /* LCD */ -}; - -static struct regulator_init_data __initdata max8997_ldo1_data = { - .constraints = { - .name = "VDD_ABB_3.3V", - .min_uV = 3300000, - .max_uV = 3300000, - .apply_uV = 1, - .state_mem = { - .disabled = 1, - }, - }, -}; - -static struct regulator_init_data __initdata max8997_ldo2_data = { - .constraints = { - .name = "VDD_ALIVE_1.1V", - .min_uV = 1100000, - .max_uV = 1100000, - .apply_uV = 1, - .always_on = 1, - .state_mem = { - .enabled = 1, - }, - }, -}; - -static struct regulator_init_data __initdata max8997_ldo3_data = { - .constraints = { - .name = "VMIPI_1.1V", - .min_uV = 1100000, - .max_uV = 1100000, - .apply_uV = 1, - .valid_ops_mask = REGULATOR_CHANGE_STATUS, - .state_mem = { - .disabled = 1, - }, - }, - .num_consumer_supplies = ARRAY_SIZE(ldo3_consumer), - .consumer_supplies = ldo3_consumer, -}; - -static struct regulator_init_data __initdata max8997_ldo4_data = { - .constraints = { - .name = "VDD_RTC_1.8V", - .min_uV = 1800000, - .max_uV = 1800000, - .apply_uV = 1, - .always_on = 1, - .state_mem = { - .disabled = 1, - }, - }, -}; - -static struct regulator_init_data __initdata max8997_ldo6_data = { - .constraints = { - .name = "VMIPI_1.8V", - .min_uV = 1800000, - .max_uV = 1800000, - .apply_uV = 1, - .valid_ops_mask = REGULATOR_CHANGE_STATUS, - .state_mem = { - .disabled = 1, - }, - }, - .num_consumer_supplies = ARRAY_SIZE(ldo6_consumer), - .consumer_supplies = ldo6_consumer, -}; - -static struct regulator_init_data __initdata max8997_ldo7_data = { - .constraints = { - .name = "VDD_AUD_1.8V", - .min_uV = 1800000, - .max_uV = 1800000, - .apply_uV = 1, - .valid_ops_mask = REGULATOR_CHANGE_STATUS, - .state_mem = { - .disabled = 1, - }, - }, - .num_consumer_supplies = ARRAY_SIZE(ldo7_consumer), - .consumer_supplies = ldo7_consumer, -}; - -static struct regulator_init_data __initdata max8997_ldo8_data = { - .constraints = { - .name = "VADC_3.3V", - .min_uV = 3300000, - .max_uV = 3300000, - .apply_uV = 1, - .valid_ops_mask = REGULATOR_CHANGE_STATUS, - .state_mem = { - .disabled = 1, - }, - }, - .num_consumer_supplies = ARRAY_SIZE(ldo8_consumer), - .consumer_supplies = ldo8_consumer, -}; - -static struct regulator_init_data __initdata max8997_ldo9_data = { - .constraints = { - .name = "DVDD_SWB_2.8V", - .min_uV = 2800000, - .max_uV = 2800000, - .apply_uV = 1, - .always_on = 1, - .valid_ops_mask = REGULATOR_CHANGE_STATUS, - .state_mem = { - .disabled = 1, - }, - }, - .num_consumer_supplies = ARRAY_SIZE(ldo9_consumer), - .consumer_supplies = ldo9_consumer, -}; - -static struct regulator_init_data __initdata max8997_ldo10_data = { - .constraints = { - .name = "VDD_PLL_1.1V", - .min_uV = 1100000, - .max_uV = 1100000, - .apply_uV = 1, - .always_on = 1, - .state_mem = { - .disabled = 1, - }, - }, -}; - -static struct regulator_init_data __initdata max8997_ldo11_data = { - .constraints = { - .name = "VDD_AUD_3V", - .min_uV = 3000000, - .max_uV = 3000000, - .apply_uV = 1, - .valid_ops_mask = REGULATOR_CHANGE_STATUS, - .state_mem = { - .disabled = 1, - }, - }, - .num_consumer_supplies = ARRAY_SIZE(ldo11_consumer), - .consumer_supplies = ldo11_consumer, -}; - -static struct regulator_init_data __initdata max8997_ldo14_data = { - .constraints = { - .name = "AVDD18_SWB_1.8V", - .min_uV = 1800000, - .max_uV = 1800000, - .apply_uV = 1, - .always_on = 1, - .valid_ops_mask = REGULATOR_CHANGE_STATUS, - .state_mem = { - .disabled = 1, - }, - }, - .num_consumer_supplies = ARRAY_SIZE(ldo14_consumer), - .consumer_supplies = ldo14_consumer, -}; - -static struct regulator_init_data __initdata max8997_ldo17_data = { - .constraints = { - .name = "VDD_SWB_3.3V", - .min_uV = 3300000, - .max_uV = 3300000, - .apply_uV = 1, - .always_on = 1, - .valid_ops_mask = REGULATOR_CHANGE_STATUS, - .state_mem = { - .disabled = 1, - }, - }, - .num_consumer_supplies = ARRAY_SIZE(ldo17_consumer), - .consumer_supplies = ldo17_consumer, -}; - -static struct regulator_init_data __initdata max8997_ldo21_data = { - .constraints = { - .name = "VDD_MIF_1.2V", - .min_uV = 1200000, - .max_uV = 1200000, - .apply_uV = 1, - .always_on = 1, - .state_mem = { - .disabled = 1, - }, - }, -}; - -static struct regulator_init_data __initdata max8997_buck1_data = { - .constraints = { - .name = "VDD_ARM_1.2V", - .min_uV = 950000, - .max_uV = 1350000, - .always_on = 1, - .boot_on = 1, - .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, - .state_mem = { - .disabled = 1, - }, - }, - .num_consumer_supplies = ARRAY_SIZE(buck1_consumer), - .consumer_supplies = buck1_consumer, -}; - -static struct regulator_init_data __initdata max8997_buck2_data = { - .constraints = { - .name = "VDD_INT_1.1V", - .min_uV = 900000, - .max_uV = 1100000, - .always_on = 1, - .boot_on = 1, - .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, - .state_mem = { - .disabled = 1, - }, - }, - .num_consumer_supplies = ARRAY_SIZE(buck2_consumer), - .consumer_supplies = buck2_consumer, -}; - -static struct regulator_init_data __initdata max8997_buck3_data = { - .constraints = { - .name = "VDD_G3D_1.1V", - .min_uV = 900000, - .max_uV = 1100000, - .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | - REGULATOR_CHANGE_STATUS, - .state_mem = { - .disabled = 1, - }, - }, - .num_consumer_supplies = ARRAY_SIZE(buck3_consumer), - .consumer_supplies = buck3_consumer, -}; - -static struct regulator_init_data __initdata max8997_buck5_data = { - .constraints = { - .name = "VDDQ_M1M2_1.2V", - .min_uV = 1200000, - .max_uV = 1200000, - .apply_uV = 1, - .always_on = 1, - .state_mem = { - .disabled = 1, - }, - }, -}; - -static struct regulator_init_data __initdata max8997_buck7_data = { - .constraints = { - .name = "VDD_LCD_3.3V", - .min_uV = 3300000, - .max_uV = 3300000, - .boot_on = 1, - .apply_uV = 1, - .valid_ops_mask = REGULATOR_CHANGE_STATUS, - .state_mem = { - .disabled = 1 - }, - }, - .num_consumer_supplies = ARRAY_SIZE(buck7_consumer), - .consumer_supplies = buck7_consumer, -}; - -static struct max8997_regulator_data __initdata origen_max8997_regulators[] = { - { MAX8997_LDO1, &max8997_ldo1_data }, - { MAX8997_LDO2, &max8997_ldo2_data }, - { MAX8997_LDO3, &max8997_ldo3_data }, - { MAX8997_LDO4, &max8997_ldo4_data }, - { MAX8997_LDO6, &max8997_ldo6_data }, - { MAX8997_LDO7, &max8997_ldo7_data }, - { MAX8997_LDO8, &max8997_ldo8_data }, - { MAX8997_LDO9, &max8997_ldo9_data }, - { MAX8997_LDO10, &max8997_ldo10_data }, - { MAX8997_LDO11, &max8997_ldo11_data }, - { MAX8997_LDO14, &max8997_ldo14_data }, - { MAX8997_LDO17, &max8997_ldo17_data }, - { MAX8997_LDO21, &max8997_ldo21_data }, - { MAX8997_BUCK1, &max8997_buck1_data }, - { MAX8997_BUCK2, &max8997_buck2_data }, - { MAX8997_BUCK3, &max8997_buck3_data }, - { MAX8997_BUCK5, &max8997_buck5_data }, - { MAX8997_BUCK7, &max8997_buck7_data }, -}; - -static struct max8997_platform_data __initdata origen_max8997_pdata = { - .num_regulators = ARRAY_SIZE(origen_max8997_regulators), - .regulators = origen_max8997_regulators, - - .wakeup = true, - .buck1_gpiodvs = false, - .buck2_gpiodvs = false, - .buck5_gpiodvs = false, - - .ignore_gpiodvs_side_effect = true, - .buck125_default_idx = 0x0, - - .buck125_gpios[0] = EXYNOS4_GPX0(0), - .buck125_gpios[1] = EXYNOS4_GPX0(1), - .buck125_gpios[2] = EXYNOS4_GPX0(2), - - .buck1_voltage[0] = 1350000, - .buck1_voltage[1] = 1300000, - .buck1_voltage[2] = 1250000, - .buck1_voltage[3] = 1200000, - .buck1_voltage[4] = 1150000, - .buck1_voltage[5] = 1100000, - .buck1_voltage[6] = 1000000, - .buck1_voltage[7] = 950000, - - .buck2_voltage[0] = 1100000, - .buck2_voltage[1] = 1100000, - .buck2_voltage[2] = 1100000, - .buck2_voltage[3] = 1100000, - .buck2_voltage[4] = 1000000, - .buck2_voltage[5] = 1000000, - .buck2_voltage[6] = 1000000, - .buck2_voltage[7] = 1000000, - - .buck5_voltage[0] = 1200000, - .buck5_voltage[1] = 1200000, - .buck5_voltage[2] = 1200000, - .buck5_voltage[3] = 1200000, - .buck5_voltage[4] = 1200000, - .buck5_voltage[5] = 1200000, - .buck5_voltage[6] = 1200000, - .buck5_voltage[7] = 1200000, -}; - -/* I2C0 */ -static struct i2c_board_info i2c0_devs[] __initdata = { - { - I2C_BOARD_INFO("max8997", (0xCC >> 1)), - .platform_data = &origen_max8997_pdata, - .irq = IRQ_EINT(4), - }, -}; - -static struct s3c_sdhci_platdata origen_hsmmc0_pdata __initdata = { - .cd_type = S3C_SDHCI_CD_INTERNAL, -}; - -static struct s3c_sdhci_platdata origen_hsmmc2_pdata __initdata = { - .cd_type = S3C_SDHCI_CD_INTERNAL, -}; - -/* USB EHCI */ -static struct s5p_ehci_platdata origen_ehci_pdata; - -static void __init origen_ehci_init(void) -{ - struct s5p_ehci_platdata *pdata = &origen_ehci_pdata; - - s5p_ehci_set_platdata(pdata); -} - -/* USB OHCI */ -static struct exynos4_ohci_platdata origen_ohci_pdata; - -static void __init origen_ohci_init(void) -{ - struct exynos4_ohci_platdata *pdata = &origen_ohci_pdata; - - exynos4_ohci_set_platdata(pdata); -} - -/* USB OTG */ -static struct s3c_hsotg_plat origen_hsotg_pdata; - -static struct gpio_led origen_gpio_leds[] = { - { - .name = "origen::status1", - .default_trigger = "heartbeat", - .gpio = EXYNOS4_GPX1(3), - .active_low = 1, - }, - { - .name = "origen::status2", - .default_trigger = "mmc0", - .gpio = EXYNOS4_GPX1(4), - .active_low = 1, - }, -}; - -static struct gpio_led_platform_data origen_gpio_led_info = { - .leds = origen_gpio_leds, - .num_leds = ARRAY_SIZE(origen_gpio_leds), -}; - -static struct platform_device origen_leds_gpio = { - .name = "leds-gpio", - .id = -1, - .dev = { - .platform_data = &origen_gpio_led_info, - }, -}; - -static struct gpio_keys_button origen_gpio_keys_table[] = { - { - .code = KEY_MENU, - .gpio = EXYNOS4_GPX1(5), - .desc = "gpio-keys: KEY_MENU", - .type = EV_KEY, - .active_low = 1, - .wakeup = 1, - .debounce_interval = 1, - }, { - .code = KEY_HOME, - .gpio = EXYNOS4_GPX1(6), - .desc = "gpio-keys: KEY_HOME", - .type = EV_KEY, - .active_low = 1, - .wakeup = 1, - .debounce_interval = 1, - }, { - .code = KEY_BACK, - .gpio = EXYNOS4_GPX1(7), - .desc = "gpio-keys: KEY_BACK", - .type = EV_KEY, - .active_low = 1, - .wakeup = 1, - .debounce_interval = 1, - }, { - .code = KEY_UP, - .gpio = EXYNOS4_GPX2(0), - .desc = "gpio-keys: KEY_UP", - .type = EV_KEY, - .active_low = 1, - .wakeup = 1, - .debounce_interval = 1, - }, { - .code = KEY_DOWN, - .gpio = EXYNOS4_GPX2(1), - .desc = "gpio-keys: KEY_DOWN", - .type = EV_KEY, - .active_low = 1, - .wakeup = 1, - .debounce_interval = 1, - }, -}; - -static struct gpio_keys_platform_data origen_gpio_keys_data = { - .buttons = origen_gpio_keys_table, - .nbuttons = ARRAY_SIZE(origen_gpio_keys_table), -}; - -static struct platform_device origen_device_gpiokeys = { - .name = "gpio-keys", - .dev = { - .platform_data = &origen_gpio_keys_data, - }, -}; - -static void lcd_hv070wsa_set_power(struct plat_lcd_data *pd, unsigned int power) -{ - int ret; - - if (power) - ret = gpio_request_one(EXYNOS4_GPE3(4), - GPIOF_OUT_INIT_HIGH, "GPE3_4"); - else - ret = gpio_request_one(EXYNOS4_GPE3(4), - GPIOF_OUT_INIT_LOW, "GPE3_4"); - - gpio_free(EXYNOS4_GPE3(4)); - - if (ret) - pr_err("failed to request gpio for LCD power: %d\n", ret); -} - -static struct plat_lcd_data origen_lcd_hv070wsa_data = { - .set_power = lcd_hv070wsa_set_power, -}; - -static struct platform_device origen_lcd_hv070wsa = { - .name = "platform-lcd", - .dev.parent = &s5p_device_fimd0.dev, - .dev.platform_data = &origen_lcd_hv070wsa_data, -}; - -static struct pwm_lookup origen_pwm_lookup[] = { - PWM_LOOKUP("s3c24xx-pwm.0", 0, "pwm-backlight.0", NULL), -}; - -#ifdef CONFIG_DRM_EXYNOS_FIMD -static struct exynos_drm_fimd_pdata drm_fimd_pdata = { - .panel = { - .timing = { - .left_margin = 64, - .right_margin = 16, - .upper_margin = 64, - .lower_margin = 16, - .hsync_len = 48, - .vsync_len = 3, - .xres = 1024, - .yres = 600, - }, - }, - .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB, - .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC | - VIDCON1_INV_VCLK, - .default_win = 0, - .bpp = 32, -}; -#else -static struct s3c_fb_pd_win origen_fb_win0 = { - .xres = 1024, - .yres = 600, - .max_bpp = 32, - .default_bpp = 24, - .virtual_x = 1024, - .virtual_y = 2 * 600, -}; - -static struct fb_videomode origen_lcd_timing = { - .left_margin = 64, - .right_margin = 16, - .upper_margin = 64, - .lower_margin = 16, - .hsync_len = 48, - .vsync_len = 3, - .xres = 1024, - .yres = 600, -}; - -static struct s3c_fb_platdata origen_lcd_pdata __initdata = { - .win[0] = &origen_fb_win0, - .vtiming = &origen_lcd_timing, - .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB, - .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC | - VIDCON1_INV_VCLK, - .setup_gpio = exynos4_fimd0_gpio_setup_24bpp, -}; -#endif - -/* Bluetooth rfkill gpio platform data */ -static struct rfkill_gpio_platform_data origen_bt_pdata = { - .reset_gpio = EXYNOS4_GPX2(2), - .shutdown_gpio = -1, - .type = RFKILL_TYPE_BLUETOOTH, - .name = "origen-bt", -}; - -/* Bluetooth Platform device */ -static struct platform_device origen_device_bluetooth = { - .name = "rfkill_gpio", - .id = -1, - .dev = { - .platform_data = &origen_bt_pdata, - }, -}; - -static struct platform_device *origen_devices[] __initdata = { - &s3c_device_hsmmc2, - &s3c_device_hsmmc0, - &s3c_device_i2c0, - &s3c_device_rtc, - &s3c_device_usb_hsotg, - &s3c_device_wdt, - &s5p_device_ehci, - &s5p_device_fimc0, - &s5p_device_fimc1, - &s5p_device_fimc2, - &s5p_device_fimc3, - &s5p_device_fimc_md, - &s5p_device_fimd0, - &s5p_device_g2d, - &s5p_device_hdmi, - &s5p_device_i2c_hdmiphy, - &s5p_device_jpeg, - &s5p_device_mfc, - &s5p_device_mfc_l, - &s5p_device_mfc_r, - &s5p_device_mixer, - &exynos4_device_ohci, - &origen_device_gpiokeys, - &origen_lcd_hv070wsa, - &origen_leds_gpio, - &origen_device_bluetooth, -}; - -/* LCD Backlight data */ -static struct samsung_bl_gpio_info origen_bl_gpio_info = { - .no = EXYNOS4_GPD0(0), - .func = S3C_GPIO_SFN(2), -}; - -static struct platform_pwm_backlight_data origen_bl_data = { - .pwm_id = 0, - .pwm_period_ns = 1000, -}; - -static void __init origen_bt_setup(void) -{ - gpio_request(EXYNOS4_GPA0(0), "GPIO BT_UART"); - /* 4 UART Pins configuration */ - s3c_gpio_cfgrange_nopull(EXYNOS4_GPA0(0), 4, S3C_GPIO_SFN(2)); - /* Setup BT Reset, this gpio will be requesed by rfkill-gpio */ - s3c_gpio_cfgpin(EXYNOS4_GPX2(2), S3C_GPIO_OUTPUT); - s3c_gpio_setpull(EXYNOS4_GPX2(2), S3C_GPIO_PULL_NONE); -} - -/* I2C module and id for HDMIPHY */ -static struct i2c_board_info hdmiphy_info = { - I2C_BOARD_INFO("hdmiphy-exynos4210", 0x38), -}; - -static void s5p_tv_setup(void) -{ - /* Direct HPD to HDMI chip */ - gpio_request_one(EXYNOS4_GPX3(7), GPIOF_IN, "hpd-plug"); - s3c_gpio_cfgpin(EXYNOS4_GPX3(7), S3C_GPIO_SFN(0x3)); - s3c_gpio_setpull(EXYNOS4_GPX3(7), S3C_GPIO_PULL_NONE); -} - -static void __init origen_map_io(void) -{ - exynos_init_io(NULL, 0); - s3c24xx_init_uarts(origen_uartcfgs, ARRAY_SIZE(origen_uartcfgs)); - xxti_f = 0; - xusbxti_f = 24000000; -} - -static void __init origen_power_init(void) -{ - gpio_request(EXYNOS4_GPX0(4), "PMIC_IRQ"); - s3c_gpio_cfgpin(EXYNOS4_GPX0(4), S3C_GPIO_SFN(0xf)); - s3c_gpio_setpull(EXYNOS4_GPX0(4), S3C_GPIO_PULL_NONE); -} - -static void __init origen_reserve(void) -{ - s5p_mfc_reserve_mem(0x43000000, 8 << 20, 0x51000000, 8 << 20); -} - -static void __init origen_machine_init(void) -{ - origen_power_init(); - - s3c_i2c0_set_platdata(NULL); - i2c_register_board_info(0, i2c0_devs, ARRAY_SIZE(i2c0_devs)); - - /* - * Since sdhci instance 2 can contain a bootable media, - * sdhci instance 0 is registered after instance 2. - */ - s3c_sdhci2_set_platdata(&origen_hsmmc2_pdata); - s3c_sdhci0_set_platdata(&origen_hsmmc0_pdata); - - origen_ehci_init(); - origen_ohci_init(); - s3c_hsotg_set_platdata(&origen_hsotg_pdata); - - s5p_tv_setup(); - s5p_i2c_hdmiphy_set_platdata(NULL); - s5p_hdmi_set_platdata(&hdmiphy_info, NULL, 0); - -#ifdef CONFIG_DRM_EXYNOS_FIMD - s5p_device_fimd0.dev.platform_data = &drm_fimd_pdata; - exynos4_fimd0_gpio_setup_24bpp(); -#else - s5p_fimd0_set_platdata(&origen_lcd_pdata); -#endif - - platform_add_devices(origen_devices, ARRAY_SIZE(origen_devices)); - - pwm_add_table(origen_pwm_lookup, ARRAY_SIZE(origen_pwm_lookup)); - samsung_bl_set(&origen_bl_gpio_info, &origen_bl_data); - - origen_bt_setup(); -} - -MACHINE_START(ORIGEN, "ORIGEN") - /* Maintainer: JeongHyeon Kim <jhkim@insignal.co.kr> */ - .atag_offset = 0x100, - .smp = smp_ops(exynos_smp_ops), - .init_irq = exynos4_init_irq, - .map_io = origen_map_io, - .init_machine = origen_machine_init, - .init_late = exynos_init_late, - .init_time = exynos_init_time, - .reserve = &origen_reserve, - .restart = exynos4_restart, -MACHINE_END diff --git a/arch/arm/mach-exynos/mach-smdk4x12.c b/arch/arm/mach-exynos/mach-smdk4x12.c deleted file mode 100644 index 2c8af9617920..000000000000 --- a/arch/arm/mach-exynos/mach-smdk4x12.c +++ /dev/null @@ -1,396 +0,0 @@ -/* - * linux/arch/arm/mach-exynos4/mach-smdk4x12.c - * - * Copyright (c) 2011 Samsung Electronics Co., Ltd. - * http://www.samsung.com - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#include <linux/gpio.h> -#include <linux/i2c.h> -#include <linux/input.h> -#include <linux/io.h> -#include <linux/lcd.h> -#include <linux/mfd/max8997.h> -#include <linux/mmc/host.h> -#include <linux/platform_device.h> -#include <linux/pwm.h> -#include <linux/pwm_backlight.h> -#include <linux/regulator/machine.h> -#include <linux/serial_core.h> -#include <linux/platform_data/i2c-s3c2410.h> -#include <linux/platform_data/s3c-hsotg.h> - -#include <asm/mach/arch.h> -#include <asm/mach-types.h> - -#include <video/samsung_fimd.h> -#include <plat/backlight.h> -#include <plat/clock.h> -#include <plat/cpu.h> -#include <plat/devs.h> -#include <plat/fb.h> -#include <plat/gpio-cfg.h> -#include <plat/keypad.h> -#include <plat/mfc.h> -#include <plat/regs-serial.h> -#include <plat/sdhci.h> - -#include <mach/irqs.h> -#include <mach/map.h> - -#include <drm/exynos_drm.h> -#include "common.h" - -/* Following are default values for UCON, ULCON and UFCON UART registers */ -#define SMDK4X12_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ - S3C2410_UCON_RXILEVEL | \ - S3C2410_UCON_TXIRQMODE | \ - S3C2410_UCON_RXIRQMODE | \ - S3C2410_UCON_RXFIFO_TOI | \ - S3C2443_UCON_RXERR_IRQEN) - -#define SMDK4X12_ULCON_DEFAULT S3C2410_LCON_CS8 - -#define SMDK4X12_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \ - S5PV210_UFCON_TXTRIG4 | \ - S5PV210_UFCON_RXTRIG4) - -static struct s3c2410_uartcfg smdk4x12_uartcfgs[] __initdata = { - [0] = { - .hwport = 0, - .flags = 0, - .ucon = SMDK4X12_UCON_DEFAULT, - .ulcon = SMDK4X12_ULCON_DEFAULT, - .ufcon = SMDK4X12_UFCON_DEFAULT, - }, - [1] = { - .hwport = 1, - .flags = 0, - .ucon = SMDK4X12_UCON_DEFAULT, - .ulcon = SMDK4X12_ULCON_DEFAULT, - .ufcon = SMDK4X12_UFCON_DEFAULT, - }, - [2] = { - .hwport = 2, - .flags = 0, - .ucon = SMDK4X12_UCON_DEFAULT, - .ulcon = SMDK4X12_ULCON_DEFAULT, - .ufcon = SMDK4X12_UFCON_DEFAULT, - }, - [3] = { - .hwport = 3, - .flags = 0, - .ucon = SMDK4X12_UCON_DEFAULT, - .ulcon = SMDK4X12_ULCON_DEFAULT, - .ufcon = SMDK4X12_UFCON_DEFAULT, - }, -}; - -static struct s3c_sdhci_platdata smdk4x12_hsmmc2_pdata __initdata = { - .cd_type = S3C_SDHCI_CD_INTERNAL, -#ifdef CONFIG_EXYNOS4_SDHCI_CH2_8BIT - .max_width = 8, - .host_caps = MMC_CAP_8_BIT_DATA, -#endif -}; - -static struct s3c_sdhci_platdata smdk4x12_hsmmc3_pdata __initdata = { - .cd_type = S3C_SDHCI_CD_INTERNAL, -}; - -static struct regulator_consumer_supply max8997_buck1 = - REGULATOR_SUPPLY("vdd_arm", NULL); - -static struct regulator_consumer_supply max8997_buck2 = - REGULATOR_SUPPLY("vdd_int", NULL); - -static struct regulator_consumer_supply max8997_buck3 = - REGULATOR_SUPPLY("vdd_g3d", NULL); - -static struct regulator_init_data max8997_buck1_data = { - .constraints = { - .name = "VDD_ARM_SMDK4X12", - .min_uV = 925000, - .max_uV = 1350000, - .always_on = 1, - .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, - .state_mem = { - .disabled = 1, - }, - }, - .num_consumer_supplies = 1, - .consumer_supplies = &max8997_buck1, -}; - -static struct regulator_init_data max8997_buck2_data = { - .constraints = { - .name = "VDD_INT_SMDK4X12", - .min_uV = 950000, - .max_uV = 1150000, - .always_on = 1, - .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, - .state_mem = { - .disabled = 1, - }, - }, - .num_consumer_supplies = 1, - .consumer_supplies = &max8997_buck2, -}; - -static struct regulator_init_data max8997_buck3_data = { - .constraints = { - .name = "VDD_G3D_SMDK4X12", - .min_uV = 950000, - .max_uV = 1150000, - .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | - REGULATOR_CHANGE_STATUS, - .state_mem = { - .disabled = 1, - }, - }, - .num_consumer_supplies = 1, - .consumer_supplies = &max8997_buck3, -}; - -static struct max8997_regulator_data smdk4x12_max8997_regulators[] = { - { MAX8997_BUCK1, &max8997_buck1_data }, - { MAX8997_BUCK2, &max8997_buck2_data }, - { MAX8997_BUCK3, &max8997_buck3_data }, -}; - -static struct max8997_platform_data smdk4x12_max8997_pdata = { - .num_regulators = ARRAY_SIZE(smdk4x12_max8997_regulators), - .regulators = smdk4x12_max8997_regulators, - - .buck1_voltage[0] = 1100000, /* 1.1V */ - .buck1_voltage[1] = 1100000, /* 1.1V */ - .buck1_voltage[2] = 1100000, /* 1.1V */ - .buck1_voltage[3] = 1100000, /* 1.1V */ - .buck1_voltage[4] = 1100000, /* 1.1V */ - .buck1_voltage[5] = 1100000, /* 1.1V */ - .buck1_voltage[6] = 1000000, /* 1.0V */ - .buck1_voltage[7] = 950000, /* 0.95V */ - - .buck2_voltage[0] = 1100000, /* 1.1V */ - .buck2_voltage[1] = 1000000, /* 1.0V */ - .buck2_voltage[2] = 950000, /* 0.95V */ - .buck2_voltage[3] = 900000, /* 0.9V */ - .buck2_voltage[4] = 1100000, /* 1.1V */ - .buck2_voltage[5] = 1000000, /* 1.0V */ - .buck2_voltage[6] = 950000, /* 0.95V */ - .buck2_voltage[7] = 900000, /* 0.9V */ - - .buck5_voltage[0] = 1100000, /* 1.1V */ - .buck5_voltage[1] = 1100000, /* 1.1V */ - .buck5_voltage[2] = 1100000, /* 1.1V */ - .buck5_voltage[3] = 1100000, /* 1.1V */ - .buck5_voltage[4] = 1100000, /* 1.1V */ - .buck5_voltage[5] = 1100000, /* 1.1V */ - .buck5_voltage[6] = 1100000, /* 1.1V */ - .buck5_voltage[7] = 1100000, /* 1.1V */ -}; - -static struct i2c_board_info smdk4x12_i2c_devs0[] __initdata = { - { - I2C_BOARD_INFO("max8997", 0x66), - .platform_data = &smdk4x12_max8997_pdata, - } -}; - -static struct i2c_board_info smdk4x12_i2c_devs1[] __initdata = { - { I2C_BOARD_INFO("wm8994", 0x1a), } -}; - -static struct i2c_board_info smdk4x12_i2c_devs3[] __initdata = { - /* nothing here yet */ -}; - -static struct i2c_board_info smdk4x12_i2c_devs7[] __initdata = { - /* nothing here yet */ -}; - -static struct samsung_bl_gpio_info smdk4x12_bl_gpio_info = { - .no = EXYNOS4_GPD0(1), - .func = S3C_GPIO_SFN(2), -}; - -static struct platform_pwm_backlight_data smdk4x12_bl_data = { - .pwm_id = 1, - .pwm_period_ns = 1000, -}; - -static struct pwm_lookup smdk4x12_pwm_lookup[] = { - PWM_LOOKUP("s3c24xx-pwm.1", 0, "pwm-backlight.0", NULL), -}; - -static uint32_t smdk4x12_keymap[] __initdata = { - /* KEY(row, col, keycode) */ - KEY(1, 3, KEY_1), KEY(1, 4, KEY_2), KEY(1, 5, KEY_3), - KEY(1, 6, KEY_4), KEY(1, 7, KEY_5), - KEY(2, 5, KEY_D), KEY(2, 6, KEY_A), KEY(2, 7, KEY_B), - KEY(0, 7, KEY_E), KEY(0, 5, KEY_C) -}; - -static struct matrix_keymap_data smdk4x12_keymap_data __initdata = { - .keymap = smdk4x12_keymap, - .keymap_size = ARRAY_SIZE(smdk4x12_keymap), -}; - -static struct samsung_keypad_platdata smdk4x12_keypad_data __initdata = { - .keymap_data = &smdk4x12_keymap_data, - .rows = 3, - .cols = 8, -}; - -#ifdef CONFIG_DRM_EXYNOS_FIMD -static struct exynos_drm_fimd_pdata drm_fimd_pdata = { - .panel = { - .timing = { - .left_margin = 8, - .right_margin = 8, - .upper_margin = 6, - .lower_margin = 6, - .hsync_len = 6, - .vsync_len = 4, - .xres = 480, - .yres = 800, - }, - }, - .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB, - .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC, - .default_win = 0, - .bpp = 32, -}; -#else -static struct s3c_fb_pd_win smdk4x12_fb_win0 = { - .xres = 480, - .yres = 800, - .virtual_x = 480, - .virtual_y = 800 * 2, - .max_bpp = 32, - .default_bpp = 24, -}; - -static struct fb_videomode smdk4x12_lcd_timing = { - .left_margin = 8, - .right_margin = 8, - .upper_margin = 6, - .lower_margin = 6, - .hsync_len = 6, - .vsync_len = 4, - .xres = 480, - .yres = 800, -}; - -static struct s3c_fb_platdata smdk4x12_lcd_pdata __initdata = { - .win[0] = &smdk4x12_fb_win0, - .vtiming = &smdk4x12_lcd_timing, - .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB, - .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC, - .setup_gpio = exynos4_fimd0_gpio_setup_24bpp, -}; -#endif - -/* USB OTG */ -static struct s3c_hsotg_plat smdk4x12_hsotg_pdata; - -static struct platform_device *smdk4x12_devices[] __initdata = { - &s3c_device_hsmmc2, - &s3c_device_hsmmc3, - &s3c_device_i2c0, - &s3c_device_i2c1, - &s3c_device_i2c3, - &s3c_device_i2c7, - &s3c_device_rtc, - &s3c_device_usb_hsotg, - &s3c_device_wdt, - &s5p_device_fimc0, - &s5p_device_fimc1, - &s5p_device_fimc2, - &s5p_device_fimc3, - &s5p_device_fimc_md, - &s5p_device_fimd0, - &s5p_device_mfc, - &s5p_device_mfc_l, - &s5p_device_mfc_r, - &samsung_device_keypad, -}; - -static void __init smdk4x12_map_io(void) -{ - exynos_init_io(NULL, 0); - s3c24xx_init_uarts(smdk4x12_uartcfgs, ARRAY_SIZE(smdk4x12_uartcfgs)); -} - -static void __init smdk4x12_reserve(void) -{ - s5p_mfc_reserve_mem(0x43000000, 8 << 20, 0x51000000, 8 << 20); -} - -static void __init smdk4x12_machine_init(void) -{ - s3c_i2c0_set_platdata(NULL); - i2c_register_board_info(0, smdk4x12_i2c_devs0, - ARRAY_SIZE(smdk4x12_i2c_devs0)); - - s3c_i2c1_set_platdata(NULL); - i2c_register_board_info(1, smdk4x12_i2c_devs1, - ARRAY_SIZE(smdk4x12_i2c_devs1)); - - s3c_i2c3_set_platdata(NULL); - i2c_register_board_info(3, smdk4x12_i2c_devs3, - ARRAY_SIZE(smdk4x12_i2c_devs3)); - - s3c_i2c7_set_platdata(NULL); - i2c_register_board_info(7, smdk4x12_i2c_devs7, - ARRAY_SIZE(smdk4x12_i2c_devs7)); - - samsung_bl_set(&smdk4x12_bl_gpio_info, &smdk4x12_bl_data); - pwm_add_table(smdk4x12_pwm_lookup, ARRAY_SIZE(smdk4x12_pwm_lookup)); - - samsung_keypad_set_platdata(&smdk4x12_keypad_data); - - s3c_sdhci2_set_platdata(&smdk4x12_hsmmc2_pdata); - s3c_sdhci3_set_platdata(&smdk4x12_hsmmc3_pdata); - - s3c_hsotg_set_platdata(&smdk4x12_hsotg_pdata); - -#ifdef CONFIG_DRM_EXYNOS_FIMD - s5p_device_fimd0.dev.platform_data = &drm_fimd_pdata; - exynos4_fimd0_gpio_setup_24bpp(); -#else - s5p_fimd0_set_platdata(&smdk4x12_lcd_pdata); -#endif - - platform_add_devices(smdk4x12_devices, ARRAY_SIZE(smdk4x12_devices)); -} - -MACHINE_START(SMDK4212, "SMDK4212") - /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */ - .atag_offset = 0x100, - .smp = smp_ops(exynos_smp_ops), - .init_irq = exynos4_init_irq, - .map_io = smdk4x12_map_io, - .init_machine = smdk4x12_machine_init, - .init_time = exynos_init_time, - .restart = exynos4_restart, - .reserve = &smdk4x12_reserve, -MACHINE_END - -MACHINE_START(SMDK4412, "SMDK4412") - /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */ - /* Maintainer: Changhwan Youn <chaos.youn@samsung.com> */ - .atag_offset = 0x100, - .smp = smp_ops(exynos_smp_ops), - .init_irq = exynos4_init_irq, - .map_io = smdk4x12_map_io, - .init_machine = smdk4x12_machine_init, - .init_late = exynos_init_late, - .init_time = exynos_init_time, - .restart = exynos4_restart, - .reserve = &smdk4x12_reserve, -MACHINE_END diff --git a/arch/arm/mach-exynos/mach-smdkv310.c b/arch/arm/mach-exynos/mach-smdkv310.c deleted file mode 100644 index d95b8cf85253..000000000000 --- a/arch/arm/mach-exynos/mach-smdkv310.c +++ /dev/null @@ -1,444 +0,0 @@ -/* linux/arch/arm/mach-exynos4/mach-smdkv310.c - * - * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. - * http://www.samsung.com - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#include <linux/serial_core.h> -#include <linux/delay.h> -#include <linux/gpio.h> -#include <linux/lcd.h> -#include <linux/mmc/host.h> -#include <linux/platform_device.h> -#include <linux/smsc911x.h> -#include <linux/io.h> -#include <linux/i2c.h> -#include <linux/input.h> -#include <linux/pwm.h> -#include <linux/pwm_backlight.h> -#include <linux/platform_data/i2c-s3c2410.h> -#include <linux/platform_data/s3c-hsotg.h> -#include <linux/platform_data/usb-ehci-s5p.h> -#include <linux/platform_data/usb-ohci-exynos.h> - -#include <asm/mach/arch.h> -#include <asm/mach-types.h> - -#include <video/platform_lcd.h> -#include <video/samsung_fimd.h> -#include <plat/regs-serial.h> -#include <plat/regs-srom.h> -#include <plat/cpu.h> -#include <plat/devs.h> -#include <plat/fb.h> -#include <plat/keypad.h> -#include <plat/sdhci.h> -#include <plat/gpio-cfg.h> -#include <plat/backlight.h> -#include <plat/mfc.h> -#include <plat/clock.h> -#include <plat/hdmi.h> - -#include <mach/irqs.h> -#include <mach/map.h> - -#include <drm/exynos_drm.h> -#include "common.h" - -/* Following are default values for UCON, ULCON and UFCON UART registers */ -#define SMDKV310_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ - S3C2410_UCON_RXILEVEL | \ - S3C2410_UCON_TXIRQMODE | \ - S3C2410_UCON_RXIRQMODE | \ - S3C2410_UCON_RXFIFO_TOI | \ - S3C2443_UCON_RXERR_IRQEN) - -#define SMDKV310_ULCON_DEFAULT S3C2410_LCON_CS8 - -#define SMDKV310_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \ - S5PV210_UFCON_TXTRIG4 | \ - S5PV210_UFCON_RXTRIG4) - -static struct s3c2410_uartcfg smdkv310_uartcfgs[] __initdata = { - [0] = { - .hwport = 0, - .flags = 0, - .ucon = SMDKV310_UCON_DEFAULT, - .ulcon = SMDKV310_ULCON_DEFAULT, - .ufcon = SMDKV310_UFCON_DEFAULT, - }, - [1] = { - .hwport = 1, - .flags = 0, - .ucon = SMDKV310_UCON_DEFAULT, - .ulcon = SMDKV310_ULCON_DEFAULT, - .ufcon = SMDKV310_UFCON_DEFAULT, - }, - [2] = { - .hwport = 2, - .flags = 0, - .ucon = SMDKV310_UCON_DEFAULT, - .ulcon = SMDKV310_ULCON_DEFAULT, - .ufcon = SMDKV310_UFCON_DEFAULT, - }, - [3] = { - .hwport = 3, - .flags = 0, - .ucon = SMDKV310_UCON_DEFAULT, - .ulcon = SMDKV310_ULCON_DEFAULT, - .ufcon = SMDKV310_UFCON_DEFAULT, - }, -}; - -static struct s3c_sdhci_platdata smdkv310_hsmmc0_pdata __initdata = { - .cd_type = S3C_SDHCI_CD_INTERNAL, -#ifdef CONFIG_EXYNOS4_SDHCI_CH0_8BIT - .max_width = 8, - .host_caps = MMC_CAP_8_BIT_DATA, -#endif -}; - -static struct s3c_sdhci_platdata smdkv310_hsmmc1_pdata __initdata = { - .cd_type = S3C_SDHCI_CD_GPIO, - .ext_cd_gpio = EXYNOS4_GPK0(2), - .ext_cd_gpio_invert = 1, -}; - -static struct s3c_sdhci_platdata smdkv310_hsmmc2_pdata __initdata = { - .cd_type = S3C_SDHCI_CD_INTERNAL, -#ifdef CONFIG_EXYNOS4_SDHCI_CH2_8BIT - .max_width = 8, - .host_caps = MMC_CAP_8_BIT_DATA, -#endif -}; - -static struct s3c_sdhci_platdata smdkv310_hsmmc3_pdata __initdata = { - .cd_type = S3C_SDHCI_CD_GPIO, - .ext_cd_gpio = EXYNOS4_GPK2(2), - .ext_cd_gpio_invert = 1, -}; - -static void lcd_lte480wv_set_power(struct plat_lcd_data *pd, - unsigned int power) -{ - if (power) { -#if !defined(CONFIG_BACKLIGHT_PWM) - gpio_request_one(EXYNOS4_GPD0(1), GPIOF_OUT_INIT_HIGH, "GPD0"); - gpio_free(EXYNOS4_GPD0(1)); -#endif - /* fire nRESET on power up */ - gpio_request_one(EXYNOS4_GPX0(6), GPIOF_OUT_INIT_HIGH, "GPX0"); - mdelay(100); - - gpio_set_value(EXYNOS4_GPX0(6), 0); - mdelay(10); - - gpio_set_value(EXYNOS4_GPX0(6), 1); - mdelay(10); - - gpio_free(EXYNOS4_GPX0(6)); - } else { -#if !defined(CONFIG_BACKLIGHT_PWM) - gpio_request_one(EXYNOS4_GPD0(1), GPIOF_OUT_INIT_LOW, "GPD0"); - gpio_free(EXYNOS4_GPD0(1)); -#endif - } -} - -static struct plat_lcd_data smdkv310_lcd_lte480wv_data = { - .set_power = lcd_lte480wv_set_power, -}; - -static struct platform_device smdkv310_lcd_lte480wv = { - .name = "platform-lcd", - .dev.parent = &s5p_device_fimd0.dev, - .dev.platform_data = &smdkv310_lcd_lte480wv_data, -}; - -#ifdef CONFIG_DRM_EXYNOS_FIMD -static struct exynos_drm_fimd_pdata drm_fimd_pdata = { - .panel = { - .timing = { - .left_margin = 13, - .right_margin = 8, - .upper_margin = 7, - .lower_margin = 5, - .hsync_len = 3, - .vsync_len = 1, - .xres = 800, - .yres = 480, - }, - }, - .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB, - .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC, - .default_win = 0, - .bpp = 32, -}; -#else -static struct s3c_fb_pd_win smdkv310_fb_win0 = { - .max_bpp = 32, - .default_bpp = 24, - .xres = 800, - .yres = 480, -}; - -static struct fb_videomode smdkv310_lcd_timing = { - .left_margin = 13, - .right_margin = 8, - .upper_margin = 7, - .lower_margin = 5, - .hsync_len = 3, - .vsync_len = 1, - .xres = 800, - .yres = 480, -}; - -static struct s3c_fb_platdata smdkv310_lcd0_pdata __initdata = { - .win[0] = &smdkv310_fb_win0, - .vtiming = &smdkv310_lcd_timing, - .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB, - .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC, - .setup_gpio = exynos4_fimd0_gpio_setup_24bpp, -}; -#endif - -static struct resource smdkv310_smsc911x_resources[] = { - [0] = DEFINE_RES_MEM(EXYNOS4_PA_SROM_BANK(1), SZ_64K), - [1] = DEFINE_RES_NAMED(IRQ_EINT(5), 1, NULL, IORESOURCE_IRQ \ - | IRQF_TRIGGER_LOW), -}; - -static struct smsc911x_platform_config smsc9215_config = { - .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW, - .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL, - .flags = SMSC911X_USE_16BIT | SMSC911X_FORCE_INTERNAL_PHY, - .phy_interface = PHY_INTERFACE_MODE_MII, - .mac = {0x00, 0x80, 0x00, 0x23, 0x45, 0x67}, -}; - -static struct platform_device smdkv310_smsc911x = { - .name = "smsc911x", - .id = -1, - .num_resources = ARRAY_SIZE(smdkv310_smsc911x_resources), - .resource = smdkv310_smsc911x_resources, - .dev = { - .platform_data = &smsc9215_config, - }, -}; - -static uint32_t smdkv310_keymap[] __initdata = { - /* KEY(row, col, keycode) */ - KEY(0, 3, KEY_1), KEY(0, 4, KEY_2), KEY(0, 5, KEY_3), - KEY(0, 6, KEY_4), KEY(0, 7, KEY_5), - KEY(1, 3, KEY_A), KEY(1, 4, KEY_B), KEY(1, 5, KEY_C), - KEY(1, 6, KEY_D), KEY(1, 7, KEY_E) -}; - -static struct matrix_keymap_data smdkv310_keymap_data __initdata = { - .keymap = smdkv310_keymap, - .keymap_size = ARRAY_SIZE(smdkv310_keymap), -}; - -static struct samsung_keypad_platdata smdkv310_keypad_data __initdata = { - .keymap_data = &smdkv310_keymap_data, - .rows = 2, - .cols = 8, -}; - -static struct i2c_board_info i2c_devs1[] __initdata = { - {I2C_BOARD_INFO("wm8994", 0x1a),}, -}; - -/* USB EHCI */ -static struct s5p_ehci_platdata smdkv310_ehci_pdata; - -static void __init smdkv310_ehci_init(void) -{ - struct s5p_ehci_platdata *pdata = &smdkv310_ehci_pdata; - - s5p_ehci_set_platdata(pdata); -} - -/* USB OHCI */ -static struct exynos4_ohci_platdata smdkv310_ohci_pdata; - -static void __init smdkv310_ohci_init(void) -{ - struct exynos4_ohci_platdata *pdata = &smdkv310_ohci_pdata; - - exynos4_ohci_set_platdata(pdata); -} - -/* USB OTG */ -static struct s3c_hsotg_plat smdkv310_hsotg_pdata; - -/* Audio device */ -static struct platform_device smdkv310_device_audio = { - .name = "smdk-audio", - .id = -1, -}; - -static struct platform_device *smdkv310_devices[] __initdata = { - &s3c_device_hsmmc0, - &s3c_device_hsmmc1, - &s3c_device_hsmmc2, - &s3c_device_hsmmc3, - &s3c_device_i2c1, - &s5p_device_i2c_hdmiphy, - &s3c_device_rtc, - &s3c_device_usb_hsotg, - &s3c_device_wdt, - &s5p_device_ehci, - &s5p_device_fimc0, - &s5p_device_fimc1, - &s5p_device_fimc2, - &s5p_device_fimc3, - &s5p_device_fimc_md, - &s5p_device_g2d, - &s5p_device_jpeg, - &exynos4_device_ac97, - &exynos4_device_i2s0, - &exynos4_device_ohci, - &samsung_device_keypad, - &s5p_device_mfc, - &s5p_device_mfc_l, - &s5p_device_mfc_r, - &exynos4_device_spdif, - &samsung_asoc_idma, - &s5p_device_fimd0, - &smdkv310_device_audio, - &smdkv310_lcd_lte480wv, - &smdkv310_smsc911x, - &exynos4_device_ahci, - &s5p_device_hdmi, - &s5p_device_mixer, -}; - -static void __init smdkv310_smsc911x_init(void) -{ - u32 cs1; - - /* configure nCS1 width to 16 bits */ - cs1 = __raw_readl(S5P_SROM_BW) & - ~(S5P_SROM_BW__CS_MASK << S5P_SROM_BW__NCS1__SHIFT); - cs1 |= ((1 << S5P_SROM_BW__DATAWIDTH__SHIFT) | - (1 << S5P_SROM_BW__WAITENABLE__SHIFT) | - (1 << S5P_SROM_BW__BYTEENABLE__SHIFT)) << - S5P_SROM_BW__NCS1__SHIFT; - __raw_writel(cs1, S5P_SROM_BW); - - /* set timing for nCS1 suitable for ethernet chip */ - __raw_writel((0x1 << S5P_SROM_BCX__PMC__SHIFT) | - (0x9 << S5P_SROM_BCX__TACP__SHIFT) | - (0xc << S5P_SROM_BCX__TCAH__SHIFT) | - (0x1 << S5P_SROM_BCX__TCOH__SHIFT) | - (0x6 << S5P_SROM_BCX__TACC__SHIFT) | - (0x1 << S5P_SROM_BCX__TCOS__SHIFT) | - (0x1 << S5P_SROM_BCX__TACS__SHIFT), S5P_SROM_BC1); -} - -/* LCD Backlight data */ -static struct samsung_bl_gpio_info smdkv310_bl_gpio_info = { - .no = EXYNOS4_GPD0(1), - .func = S3C_GPIO_SFN(2), -}; - -static struct platform_pwm_backlight_data smdkv310_bl_data = { - .pwm_id = 1, - .pwm_period_ns = 1000, -}; - -/* I2C module and id for HDMIPHY */ -static struct i2c_board_info hdmiphy_info = { - I2C_BOARD_INFO("hdmiphy-exynos4210", 0x38), -}; - -static struct pwm_lookup smdkv310_pwm_lookup[] = { - PWM_LOOKUP("s3c24xx-pwm.1", 0, "pwm-backlight.0", NULL), -}; - -static void s5p_tv_setup(void) -{ - /* direct HPD to HDMI chip */ - WARN_ON(gpio_request_one(EXYNOS4_GPX3(7), GPIOF_IN, "hpd-plug")); - s3c_gpio_cfgpin(EXYNOS4_GPX3(7), S3C_GPIO_SFN(0x3)); - s3c_gpio_setpull(EXYNOS4_GPX3(7), S3C_GPIO_PULL_NONE); -} - -static void __init smdkv310_map_io(void) -{ - exynos_init_io(NULL, 0); - s3c24xx_init_uarts(smdkv310_uartcfgs, ARRAY_SIZE(smdkv310_uartcfgs)); - xxti_f = 12000000; - xusbxti_f = 24000000; -} - -static void __init smdkv310_reserve(void) -{ - s5p_mfc_reserve_mem(0x43000000, 8 << 20, 0x51000000, 8 << 20); -} - -static void __init smdkv310_machine_init(void) -{ - s3c_i2c1_set_platdata(NULL); - i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1)); - - smdkv310_smsc911x_init(); - - s3c_sdhci0_set_platdata(&smdkv310_hsmmc0_pdata); - s3c_sdhci1_set_platdata(&smdkv310_hsmmc1_pdata); - s3c_sdhci2_set_platdata(&smdkv310_hsmmc2_pdata); - s3c_sdhci3_set_platdata(&smdkv310_hsmmc3_pdata); - - s5p_tv_setup(); - s5p_i2c_hdmiphy_set_platdata(NULL); - s5p_hdmi_set_platdata(&hdmiphy_info, NULL, 0); - - samsung_keypad_set_platdata(&smdkv310_keypad_data); - - samsung_bl_set(&smdkv310_bl_gpio_info, &smdkv310_bl_data); - pwm_add_table(smdkv310_pwm_lookup, ARRAY_SIZE(smdkv310_pwm_lookup)); - -#ifdef CONFIG_DRM_EXYNOS_FIMD - s5p_device_fimd0.dev.platform_data = &drm_fimd_pdata; - exynos4_fimd0_gpio_setup_24bpp(); -#else - s5p_fimd0_set_platdata(&smdkv310_lcd0_pdata); -#endif - - smdkv310_ehci_init(); - smdkv310_ohci_init(); - s3c_hsotg_set_platdata(&smdkv310_hsotg_pdata); - - platform_add_devices(smdkv310_devices, ARRAY_SIZE(smdkv310_devices)); -} - -MACHINE_START(SMDKV310, "SMDKV310") - /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */ - /* Maintainer: Changhwan Youn <chaos.youn@samsung.com> */ - .atag_offset = 0x100, - .smp = smp_ops(exynos_smp_ops), - .init_irq = exynos4_init_irq, - .map_io = smdkv310_map_io, - .init_machine = smdkv310_machine_init, - .init_time = exynos_init_time, - .reserve = &smdkv310_reserve, - .restart = exynos4_restart, -MACHINE_END - -MACHINE_START(SMDKC210, "SMDKC210") - /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */ - .atag_offset = 0x100, - .smp = smp_ops(exynos_smp_ops), - .init_irq = exynos4_init_irq, - .map_io = smdkv310_map_io, - .init_machine = smdkv310_machine_init, - .init_late = exynos_init_late, - .init_time = exynos_init_time, - .reserve = &smdkv310_reserve, - .restart = exynos4_restart, -MACHINE_END diff --git a/arch/arm/mach-exynos/mach-universal_c210.c b/arch/arm/mach-exynos/mach-universal_c210.c deleted file mode 100644 index 74ddb2b55614..000000000000 --- a/arch/arm/mach-exynos/mach-universal_c210.c +++ /dev/null @@ -1,1159 +0,0 @@ -/* linux/arch/arm/mach-exynos4/mach-universal_c210.c - * - * Copyright (c) 2010 Samsung Electronics Co., Ltd. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#include <linux/platform_device.h> -#include <linux/serial_core.h> -#include <linux/input.h> -#include <linux/i2c.h> -#include <linux/gpio_keys.h> -#include <linux/gpio.h> -#include <linux/interrupt.h> -#include <linux/fb.h> -#include <linux/mfd/max8998.h> -#include <linux/regulator/machine.h> -#include <linux/regulator/fixed.h> -#include <linux/regulator/max8952.h> -#include <linux/mmc/host.h> -#include <linux/i2c-gpio.h> -#include <linux/i2c/mcs.h> -#include <linux/i2c/atmel_mxt_ts.h> -#include <linux/platform_data/i2c-s3c2410.h> -#include <linux/platform_data/mipi-csis.h> -#include <linux/platform_data/s3c-hsotg.h> -#include <drm/exynos_drm.h> - -#include <asm/mach/arch.h> -#include <asm/mach-types.h> - -#include <video/samsung_fimd.h> -#include <plat/regs-serial.h> -#include <plat/clock.h> -#include <plat/cpu.h> -#include <plat/devs.h> -#include <plat/gpio-cfg.h> -#include <plat/fb.h> -#include <plat/mfc.h> -#include <plat/sdhci.h> -#include <plat/fimc-core.h> -#include <plat/camport.h> - -#include <mach/map.h> - -#include <media/v4l2-mediabus.h> -#include <media/s5p_fimc.h> -#include <media/m5mols.h> -#include <media/s5k6aa.h> - -#include "common.h" - -/* Following are default values for UCON, ULCON and UFCON UART registers */ -#define UNIVERSAL_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ - S3C2410_UCON_RXILEVEL | \ - S3C2410_UCON_TXIRQMODE | \ - S3C2410_UCON_RXIRQMODE | \ - S3C2410_UCON_RXFIFO_TOI | \ - S3C2443_UCON_RXERR_IRQEN) - -#define UNIVERSAL_ULCON_DEFAULT S3C2410_LCON_CS8 - -#define UNIVERSAL_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \ - S5PV210_UFCON_TXTRIG256 | \ - S5PV210_UFCON_RXTRIG256) - -static struct s3c2410_uartcfg universal_uartcfgs[] __initdata = { - [0] = { - .hwport = 0, - .ucon = UNIVERSAL_UCON_DEFAULT, - .ulcon = UNIVERSAL_ULCON_DEFAULT, - .ufcon = UNIVERSAL_UFCON_DEFAULT, - }, - [1] = { - .hwport = 1, - .ucon = UNIVERSAL_UCON_DEFAULT, - .ulcon = UNIVERSAL_ULCON_DEFAULT, - .ufcon = UNIVERSAL_UFCON_DEFAULT, - }, - [2] = { - .hwport = 2, - .ucon = UNIVERSAL_UCON_DEFAULT, - .ulcon = UNIVERSAL_ULCON_DEFAULT, - .ufcon = UNIVERSAL_UFCON_DEFAULT, - }, - [3] = { - .hwport = 3, - .ucon = UNIVERSAL_UCON_DEFAULT, - .ulcon = UNIVERSAL_ULCON_DEFAULT, - .ufcon = UNIVERSAL_UFCON_DEFAULT, - }, -}; - -static struct regulator_consumer_supply max8952_consumer = - REGULATOR_SUPPLY("vdd_arm", NULL); - -static struct regulator_init_data universal_max8952_reg_data = { - .constraints = { - .name = "VARM_1.2V", - .min_uV = 770000, - .max_uV = 1400000, - .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, - .always_on = 1, - .boot_on = 1, - }, - .num_consumer_supplies = 1, - .consumer_supplies = &max8952_consumer, -}; - -static struct max8952_platform_data universal_max8952_pdata __initdata = { - .gpio_vid0 = EXYNOS4_GPX0(3), - .gpio_vid1 = EXYNOS4_GPX0(4), - .gpio_en = -1, /* Not controllable, set "Always High" */ - .default_mode = 0, /* vid0 = 0, vid1 = 0 */ - .dvs_mode = { 48, 32, 28, 18 }, /* 1.25, 1.20, 1.05, 0.95V */ - .sync_freq = 0, /* default: fastest */ - .ramp_speed = 0, /* default: fastest */ - .reg_data = &universal_max8952_reg_data, -}; - -static struct regulator_consumer_supply lp3974_buck1_consumer = - REGULATOR_SUPPLY("vdd_int", NULL); - -static struct regulator_consumer_supply lp3974_buck2_consumer = - REGULATOR_SUPPLY("vddg3d", NULL); - -static struct regulator_consumer_supply lp3974_buck3_consumer[] = { - REGULATOR_SUPPLY("vdet", "s5p-sdo"), - REGULATOR_SUPPLY("vdd_reg", "0-003c"), -}; - -static struct regulator_init_data lp3974_buck1_data = { - .constraints = { - .name = "VINT_1.1V", - .min_uV = 750000, - .max_uV = 1500000, - .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | - REGULATOR_CHANGE_STATUS, - .boot_on = 1, - .state_mem = { - .disabled = 1, - }, - }, - .num_consumer_supplies = 1, - .consumer_supplies = &lp3974_buck1_consumer, -}; - -static struct regulator_init_data lp3974_buck2_data = { - .constraints = { - .name = "VG3D_1.1V", - .min_uV = 750000, - .max_uV = 1500000, - .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | - REGULATOR_CHANGE_STATUS, - .boot_on = 1, - .state_mem = { - .disabled = 1, - }, - }, - .num_consumer_supplies = 1, - .consumer_supplies = &lp3974_buck2_consumer, -}; - -static struct regulator_init_data lp3974_buck3_data = { - .constraints = { - .name = "VCC_1.8V", - .min_uV = 1800000, - .max_uV = 1800000, - .apply_uV = 1, - .always_on = 1, - .state_mem = { - .enabled = 1, - }, - }, - .num_consumer_supplies = ARRAY_SIZE(lp3974_buck3_consumer), - .consumer_supplies = lp3974_buck3_consumer, -}; - -static struct regulator_init_data lp3974_buck4_data = { - .constraints = { - .name = "VMEM_1.2V", - .min_uV = 1200000, - .max_uV = 1200000, - .valid_ops_mask = REGULATOR_CHANGE_STATUS, - .apply_uV = 1, - .state_mem = { - .disabled = 1, - }, - }, -}; - -static struct regulator_init_data lp3974_ldo2_data = { - .constraints = { - .name = "VALIVE_1.2V", - .min_uV = 1200000, - .max_uV = 1200000, - .apply_uV = 1, - .always_on = 1, - .state_mem = { - .enabled = 1, - }, - }, -}; - -static struct regulator_consumer_supply lp3974_ldo3_consumer[] = { - REGULATOR_SUPPLY("vusb_a", "s3c-hsotg"), - REGULATOR_SUPPLY("vdd", "exynos4-hdmi"), - REGULATOR_SUPPLY("vdd_pll", "exynos4-hdmi"), - REGULATOR_SUPPLY("vddcore", "s5p-mipi-csis.0"), -}; - -static struct regulator_init_data lp3974_ldo3_data = { - .constraints = { - .name = "VUSB+MIPI_1.1V", - .min_uV = 1100000, - .max_uV = 1100000, - .apply_uV = 1, - .valid_ops_mask = REGULATOR_CHANGE_STATUS, - .state_mem = { - .disabled = 1, - }, - }, - .num_consumer_supplies = ARRAY_SIZE(lp3974_ldo3_consumer), - .consumer_supplies = lp3974_ldo3_consumer, -}; - -static struct regulator_consumer_supply lp3974_ldo4_consumer[] = { - REGULATOR_SUPPLY("vdd_osc", "exynos4-hdmi"), -}; - -static struct regulator_init_data lp3974_ldo4_data = { - .constraints = { - .name = "VADC_3.3V", - .min_uV = 3300000, - .max_uV = 3300000, - .apply_uV = 1, - .valid_ops_mask = REGULATOR_CHANGE_STATUS, - .state_mem = { - .disabled = 1, - }, - }, - .num_consumer_supplies = ARRAY_SIZE(lp3974_ldo4_consumer), - .consumer_supplies = lp3974_ldo4_consumer, -}; - -static struct regulator_init_data lp3974_ldo5_data = { - .constraints = { - .name = "VTF_2.8V", - .min_uV = 2800000, - .max_uV = 2800000, - .apply_uV = 1, - .valid_ops_mask = REGULATOR_CHANGE_STATUS, - .state_mem = { - .disabled = 1, - }, - }, -}; - -static struct regulator_init_data lp3974_ldo6_data = { - .constraints = { - .name = "LDO6", - .min_uV = 2000000, - .max_uV = 2000000, - .apply_uV = 1, - .valid_ops_mask = REGULATOR_CHANGE_STATUS, - .state_mem = { - .disabled = 1, - }, - }, -}; - -static struct regulator_consumer_supply lp3974_ldo7_consumer[] = { - REGULATOR_SUPPLY("vddio", "s5p-mipi-csis.0"), -}; - -static struct regulator_init_data lp3974_ldo7_data = { - .constraints = { - .name = "VLCD+VMIPI_1.8V", - .min_uV = 1800000, - .max_uV = 1800000, - .apply_uV = 1, - .valid_ops_mask = REGULATOR_CHANGE_STATUS, - .state_mem = { - .disabled = 1, - }, - }, - .num_consumer_supplies = ARRAY_SIZE(lp3974_ldo7_consumer), - .consumer_supplies = lp3974_ldo7_consumer, -}; - -static struct regulator_consumer_supply lp3974_ldo8_consumer[] = { - REGULATOR_SUPPLY("vusb_d", "s3c-hsotg"), - REGULATOR_SUPPLY("vdd33a_dac", "s5p-sdo"), -}; - -static struct regulator_init_data lp3974_ldo8_data = { - .constraints = { - .name = "VUSB+VDAC_3.3V", - .min_uV = 3300000, - .max_uV = 3300000, - .apply_uV = 1, - .valid_ops_mask = REGULATOR_CHANGE_STATUS, - .state_mem = { - .disabled = 1, - }, - }, - .num_consumer_supplies = ARRAY_SIZE(lp3974_ldo8_consumer), - .consumer_supplies = lp3974_ldo8_consumer, -}; - -static struct regulator_consumer_supply lp3974_ldo9_consumer = - REGULATOR_SUPPLY("vddio", "0-003c"); - -static struct regulator_init_data lp3974_ldo9_data = { - .constraints = { - .name = "VCC_2.8V", - .min_uV = 2800000, - .max_uV = 2800000, - .apply_uV = 1, - .always_on = 1, - .state_mem = { - .enabled = 1, - }, - }, - .num_consumer_supplies = 1, - .consumer_supplies = &lp3974_ldo9_consumer, -}; - -static struct regulator_init_data lp3974_ldo10_data = { - .constraints = { - .name = "VPLL_1.1V", - .min_uV = 1100000, - .max_uV = 1100000, - .boot_on = 1, - .apply_uV = 1, - .valid_ops_mask = REGULATOR_CHANGE_STATUS, - .state_mem = { - .disabled = 1, - }, - }, -}; - -static struct regulator_consumer_supply lp3974_ldo11_consumer = - REGULATOR_SUPPLY("dig_28", "0-001f"); - -static struct regulator_init_data lp3974_ldo11_data = { - .constraints = { - .name = "CAM_AF_3.3V", - .min_uV = 3300000, - .max_uV = 3300000, - .apply_uV = 1, - .valid_ops_mask = REGULATOR_CHANGE_STATUS, - .state_mem = { - .disabled = 1, - }, - }, - .num_consumer_supplies = 1, - .consumer_supplies = &lp3974_ldo11_consumer, -}; - -static struct regulator_init_data lp3974_ldo12_data = { - .constraints = { - .name = "PS_2.8V", - .min_uV = 2800000, - .max_uV = 2800000, - .apply_uV = 1, - .valid_ops_mask = REGULATOR_CHANGE_STATUS, - .state_mem = { - .disabled = 1, - }, - }, -}; - -static struct regulator_init_data lp3974_ldo13_data = { - .constraints = { - .name = "VHIC_1.2V", - .min_uV = 1200000, - .max_uV = 1200000, - .apply_uV = 1, - .valid_ops_mask = REGULATOR_CHANGE_STATUS, - .state_mem = { - .disabled = 1, - }, - }, -}; - -static struct regulator_consumer_supply lp3974_ldo14_consumer = - REGULATOR_SUPPLY("dig_18", "0-001f"); - -static struct regulator_init_data lp3974_ldo14_data = { - .constraints = { - .name = "CAM_I_HOST_1.8V", - .min_uV = 1800000, - .max_uV = 1800000, - .apply_uV = 1, - .valid_ops_mask = REGULATOR_CHANGE_STATUS, - .state_mem = { - .disabled = 1, - }, - }, - .num_consumer_supplies = 1, - .consumer_supplies = &lp3974_ldo14_consumer, -}; - - -static struct regulator_consumer_supply lp3974_ldo15_consumer = - REGULATOR_SUPPLY("dig_12", "0-001f"); - -static struct regulator_init_data lp3974_ldo15_data = { - .constraints = { - .name = "CAM_S_DIG+FM33_CORE_1.2V", - .min_uV = 1200000, - .max_uV = 1200000, - .apply_uV = 1, - .valid_ops_mask = REGULATOR_CHANGE_STATUS, - .state_mem = { - .disabled = 1, - }, - }, - .num_consumer_supplies = 1, - .consumer_supplies = &lp3974_ldo15_consumer, -}; - -static struct regulator_consumer_supply lp3974_ldo16_consumer[] = { - REGULATOR_SUPPLY("vdda", "0-003c"), - REGULATOR_SUPPLY("a_sensor", "0-001f"), -}; - -static struct regulator_init_data lp3974_ldo16_data = { - .constraints = { - .name = "CAM_S_ANA_2.8V", - .min_uV = 2800000, - .max_uV = 2800000, - .apply_uV = 1, - .valid_ops_mask = REGULATOR_CHANGE_STATUS, - .state_mem = { - .disabled = 1, - }, - }, - .num_consumer_supplies = ARRAY_SIZE(lp3974_ldo16_consumer), - .consumer_supplies = lp3974_ldo16_consumer, -}; - -static struct regulator_init_data lp3974_ldo17_data = { - .constraints = { - .name = "VCC_3.0V_LCD", - .min_uV = 3000000, - .max_uV = 3000000, - .apply_uV = 1, - .valid_ops_mask = REGULATOR_CHANGE_STATUS, - .boot_on = 1, - .state_mem = { - .disabled = 1, - }, - }, -}; - -static struct regulator_init_data lp3974_32khz_ap_data = { - .constraints = { - .name = "32KHz AP", - .always_on = 1, - .state_mem = { - .enabled = 1, - }, - }, -}; - -static struct regulator_init_data lp3974_32khz_cp_data = { - .constraints = { - .name = "32KHz CP", - .state_mem = { - .disabled = 1, - }, - }, -}; - -static struct regulator_init_data lp3974_vichg_data = { - .constraints = { - .name = "VICHG", - .state_mem = { - .disabled = 1, - }, - }, -}; - -static struct regulator_init_data lp3974_esafeout1_data = { - .constraints = { - .name = "SAFEOUT1", - .min_uV = 4800000, - .max_uV = 4800000, - .valid_ops_mask = REGULATOR_CHANGE_STATUS, - .always_on = 1, - .state_mem = { - .enabled = 1, - }, - }, -}; - -static struct regulator_init_data lp3974_esafeout2_data = { - .constraints = { - .name = "SAFEOUT2", - .boot_on = 1, - .valid_ops_mask = REGULATOR_CHANGE_STATUS, - .state_mem = { - .enabled = 1, - }, - }, -}; - -static struct max8998_regulator_data lp3974_regulators[] = { - { MAX8998_LDO2, &lp3974_ldo2_data }, - { MAX8998_LDO3, &lp3974_ldo3_data }, - { MAX8998_LDO4, &lp3974_ldo4_data }, - { MAX8998_LDO5, &lp3974_ldo5_data }, - { MAX8998_LDO6, &lp3974_ldo6_data }, - { MAX8998_LDO7, &lp3974_ldo7_data }, - { MAX8998_LDO8, &lp3974_ldo8_data }, - { MAX8998_LDO9, &lp3974_ldo9_data }, - { MAX8998_LDO10, &lp3974_ldo10_data }, - { MAX8998_LDO11, &lp3974_ldo11_data }, - { MAX8998_LDO12, &lp3974_ldo12_data }, - { MAX8998_LDO13, &lp3974_ldo13_data }, - { MAX8998_LDO14, &lp3974_ldo14_data }, - { MAX8998_LDO15, &lp3974_ldo15_data }, - { MAX8998_LDO16, &lp3974_ldo16_data }, - { MAX8998_LDO17, &lp3974_ldo17_data }, - { MAX8998_BUCK1, &lp3974_buck1_data }, - { MAX8998_BUCK2, &lp3974_buck2_data }, - { MAX8998_BUCK3, &lp3974_buck3_data }, - { MAX8998_BUCK4, &lp3974_buck4_data }, - { MAX8998_EN32KHZ_AP, &lp3974_32khz_ap_data }, - { MAX8998_EN32KHZ_CP, &lp3974_32khz_cp_data }, - { MAX8998_ENVICHG, &lp3974_vichg_data }, - { MAX8998_ESAFEOUT1, &lp3974_esafeout1_data }, - { MAX8998_ESAFEOUT2, &lp3974_esafeout2_data }, -}; - -static struct max8998_platform_data universal_lp3974_pdata = { - .num_regulators = ARRAY_SIZE(lp3974_regulators), - .regulators = lp3974_regulators, - .buck1_voltage1 = 1100000, /* INT */ - .buck1_voltage2 = 1000000, - .buck1_voltage3 = 1100000, - .buck1_voltage4 = 1000000, - .buck1_set1 = EXYNOS4_GPX0(5), - .buck1_set2 = EXYNOS4_GPX0(6), - .buck2_voltage1 = 1200000, /* G3D */ - .buck2_voltage2 = 1100000, - .buck1_default_idx = 0, - .buck2_set3 = EXYNOS4_GPE2(0), - .buck2_default_idx = 0, - .wakeup = true, -}; - - -enum fixed_regulator_id { - FIXED_REG_ID_MMC0, - FIXED_REG_ID_HDMI_5V, - FIXED_REG_ID_CAM_S_IF, - FIXED_REG_ID_CAM_I_CORE, - FIXED_REG_ID_CAM_VT_DIO, -}; - -static struct regulator_consumer_supply hdmi_fixed_consumer = - REGULATOR_SUPPLY("hdmi-en", "exynos4-hdmi"); - -static struct regulator_init_data hdmi_fixed_voltage_init_data = { - .constraints = { - .name = "HDMI_5V", - .valid_ops_mask = REGULATOR_CHANGE_STATUS, - }, - .num_consumer_supplies = 1, - .consumer_supplies = &hdmi_fixed_consumer, -}; - -static struct fixed_voltage_config hdmi_fixed_voltage_config = { - .supply_name = "HDMI_EN1", - .microvolts = 5000000, - .gpio = EXYNOS4_GPE0(1), - .enable_high = true, - .init_data = &hdmi_fixed_voltage_init_data, -}; - -static struct platform_device hdmi_fixed_voltage = { - .name = "reg-fixed-voltage", - .id = FIXED_REG_ID_HDMI_5V, - .dev = { - .platform_data = &hdmi_fixed_voltage_config, - }, -}; - -/* GPIO I2C 5 (PMIC) */ -static struct i2c_board_info i2c5_devs[] __initdata = { - { - I2C_BOARD_INFO("max8952", 0xC0 >> 1), - .platform_data = &universal_max8952_pdata, - }, { - I2C_BOARD_INFO("lp3974", 0xCC >> 1), - .platform_data = &universal_lp3974_pdata, - }, -}; - -/* I2C3 (TSP) */ -static struct mxt_platform_data qt602240_platform_data = { - .x_line = 19, - .y_line = 11, - .x_size = 800, - .y_size = 480, - .blen = 0x11, - .threshold = 0x28, - .voltage = 2800000, /* 2.8V */ - .orient = MXT_DIAGONAL, - .irqflags = IRQF_TRIGGER_FALLING, -}; - -static struct i2c_board_info i2c3_devs[] __initdata = { - { - I2C_BOARD_INFO("qt602240_ts", 0x4a), - .platform_data = &qt602240_platform_data, - }, -}; - -static void __init universal_tsp_init(void) -{ - int gpio; - - /* TSP_LDO_ON: XMDMADDR_11 */ - gpio = EXYNOS4_GPE2(3); - gpio_request_one(gpio, GPIOF_OUT_INIT_HIGH, "TSP_LDO_ON"); - gpio_export(gpio, 0); - - /* TSP_INT: XMDMADDR_7 */ - gpio = EXYNOS4_GPE1(7); - gpio_request(gpio, "TSP_INT"); - - s5p_register_gpio_interrupt(gpio); - s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(0xf)); - s3c_gpio_setpull(gpio, S3C_GPIO_PULL_UP); - i2c3_devs[0].irq = gpio_to_irq(gpio); -} - - -/* GPIO I2C 12 (3 Touchkey) */ -static uint32_t touchkey_keymap[] = { - /* MCS_KEY_MAP(value, keycode) */ - MCS_KEY_MAP(0, KEY_MENU), /* KEY_SEND */ - MCS_KEY_MAP(1, KEY_BACK), /* KEY_END */ -}; - -static struct mcs_platform_data touchkey_data = { - .keymap = touchkey_keymap, - .keymap_size = ARRAY_SIZE(touchkey_keymap), - .key_maxval = 2, -}; - -/* GPIO I2C 3_TOUCH 2.8V */ -#define I2C_GPIO_BUS_12 12 -static struct i2c_gpio_platform_data i2c_gpio12_data = { - .sda_pin = EXYNOS4_GPE4(0), /* XMDMDATA_8 */ - .scl_pin = EXYNOS4_GPE4(1), /* XMDMDATA_9 */ -}; - -static struct platform_device i2c_gpio12 = { - .name = "i2c-gpio", - .id = I2C_GPIO_BUS_12, - .dev = { - .platform_data = &i2c_gpio12_data, - }, -}; - -static struct i2c_board_info i2c_gpio12_devs[] __initdata = { - { - I2C_BOARD_INFO("mcs5080_touchkey", 0x20), - .platform_data = &touchkey_data, - }, -}; - -static void __init universal_touchkey_init(void) -{ - int gpio; - - gpio = EXYNOS4_GPE3(7); /* XMDMDATA_7 */ - gpio_request(gpio, "3_TOUCH_INT"); - s5p_register_gpio_interrupt(gpio); - s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(0xf)); - i2c_gpio12_devs[0].irq = gpio_to_irq(gpio); - - gpio = EXYNOS4_GPE3(3); /* XMDMDATA_3 */ - gpio_request_one(gpio, GPIOF_OUT_INIT_HIGH, "3_TOUCH_EN"); -} - -static struct s3c2410_platform_i2c universal_i2c0_platdata __initdata = { - .frequency = 300 * 1000, - .sda_delay = 200, -}; - -/* GPIO KEYS */ -static struct gpio_keys_button universal_gpio_keys_tables[] = { - { - .code = KEY_VOLUMEUP, - .gpio = EXYNOS4_GPX2(0), /* XEINT16 */ - .desc = "gpio-keys: KEY_VOLUMEUP", - .type = EV_KEY, - .active_low = 1, - .debounce_interval = 1, - }, { - .code = KEY_VOLUMEDOWN, - .gpio = EXYNOS4_GPX2(1), /* XEINT17 */ - .desc = "gpio-keys: KEY_VOLUMEDOWN", - .type = EV_KEY, - .active_low = 1, - .debounce_interval = 1, - }, { - .code = KEY_CONFIG, - .gpio = EXYNOS4_GPX2(2), /* XEINT18 */ - .desc = "gpio-keys: KEY_CONFIG", - .type = EV_KEY, - .active_low = 1, - .debounce_interval = 1, - }, { - .code = KEY_CAMERA, - .gpio = EXYNOS4_GPX2(3), /* XEINT19 */ - .desc = "gpio-keys: KEY_CAMERA", - .type = EV_KEY, - .active_low = 1, - .debounce_interval = 1, - }, { - .code = KEY_OK, - .gpio = EXYNOS4_GPX3(5), /* XEINT29 */ - .desc = "gpio-keys: KEY_OK", - .type = EV_KEY, - .active_low = 1, - .debounce_interval = 1, - }, -}; - -static struct gpio_keys_platform_data universal_gpio_keys_data = { - .buttons = universal_gpio_keys_tables, - .nbuttons = ARRAY_SIZE(universal_gpio_keys_tables), -}; - -static struct platform_device universal_gpio_keys = { - .name = "gpio-keys", - .dev = { - .platform_data = &universal_gpio_keys_data, - }, -}; - -/* eMMC */ -static struct s3c_sdhci_platdata universal_hsmmc0_data __initdata = { - .max_width = 8, - .host_caps = (MMC_CAP_8_BIT_DATA | MMC_CAP_4_BIT_DATA | - MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED), - .cd_type = S3C_SDHCI_CD_PERMANENT, -}; - -static struct regulator_consumer_supply mmc0_supplies[] = { - REGULATOR_SUPPLY("vmmc", "exynos4-sdhci.0"), -}; - -static struct regulator_init_data mmc0_fixed_voltage_init_data = { - .constraints = { - .name = "VMEM_VDD_2.8V", - .valid_ops_mask = REGULATOR_CHANGE_STATUS, - }, - .num_consumer_supplies = ARRAY_SIZE(mmc0_supplies), - .consumer_supplies = mmc0_supplies, -}; - -static struct fixed_voltage_config mmc0_fixed_voltage_config = { - .supply_name = "MASSMEMORY_EN", - .microvolts = 2800000, - .gpio = EXYNOS4_GPE1(3), - .enable_high = true, - .init_data = &mmc0_fixed_voltage_init_data, -}; - -static struct platform_device mmc0_fixed_voltage = { - .name = "reg-fixed-voltage", - .id = FIXED_REG_ID_MMC0, - .dev = { - .platform_data = &mmc0_fixed_voltage_config, - }, -}; - -/* SD */ -static struct s3c_sdhci_platdata universal_hsmmc2_data __initdata = { - .max_width = 4, - .host_caps = MMC_CAP_4_BIT_DATA | - MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED, - .ext_cd_gpio = EXYNOS4_GPX3(4), /* XEINT_28 */ - .ext_cd_gpio_invert = 1, - .cd_type = S3C_SDHCI_CD_GPIO, -}; - -/* WiFi */ -static struct s3c_sdhci_platdata universal_hsmmc3_data __initdata = { - .max_width = 4, - .host_caps = MMC_CAP_4_BIT_DATA | - MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED, - .cd_type = S3C_SDHCI_CD_EXTERNAL, -}; - -static void __init universal_sdhci_init(void) -{ - s3c_sdhci0_set_platdata(&universal_hsmmc0_data); - s3c_sdhci2_set_platdata(&universal_hsmmc2_data); - s3c_sdhci3_set_platdata(&universal_hsmmc3_data); -} - -/* I2C1 */ -static struct i2c_board_info i2c1_devs[] __initdata = { - /* Gyro, To be updated */ -}; - -#ifdef CONFIG_DRM_EXYNOS -static struct exynos_drm_fimd_pdata drm_fimd_pdata = { - .panel = { - .timing = { - .left_margin = 16, - .right_margin = 16, - .upper_margin = 2, - .lower_margin = 28, - .hsync_len = 2, - .vsync_len = 1, - .xres = 480, - .yres = 800, - .refresh = 55, - }, - }, - .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB | - VIDCON0_CLKSEL_LCD, - .vidcon1 = VIDCON1_INV_VCLK | VIDCON1_INV_VDEN - | VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC, - .default_win = 3, - .bpp = 32, -}; -#else -/* Frame Buffer */ -static struct s3c_fb_pd_win universal_fb_win0 = { - .max_bpp = 32, - .default_bpp = 16, - .xres = 480, - .yres = 800, - .virtual_x = 480, - .virtual_y = 2 * 800, -}; - -static struct fb_videomode universal_lcd_timing = { - .left_margin = 16, - .right_margin = 16, - .upper_margin = 2, - .lower_margin = 28, - .hsync_len = 2, - .vsync_len = 1, - .xres = 480, - .yres = 800, - .refresh = 55, -}; - -static struct s3c_fb_platdata universal_lcd_pdata __initdata = { - .win[0] = &universal_fb_win0, - .vtiming = &universal_lcd_timing, - .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB | - VIDCON0_CLKSEL_LCD, - .vidcon1 = VIDCON1_INV_VCLK | VIDCON1_INV_VDEN - | VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC, - .setup_gpio = exynos4_fimd0_gpio_setup_24bpp, -}; -#endif - -static struct regulator_consumer_supply cam_vt_dio_supply = - REGULATOR_SUPPLY("vdd_core", "0-003c"); - -static struct regulator_init_data cam_vt_dio_reg_init_data = { - .constraints = { .valid_ops_mask = REGULATOR_CHANGE_STATUS }, - .num_consumer_supplies = 1, - .consumer_supplies = &cam_vt_dio_supply, -}; - -static struct fixed_voltage_config cam_vt_dio_fixed_voltage_cfg = { - .supply_name = "CAM_VT_D_IO", - .microvolts = 2800000, - .gpio = EXYNOS4_GPE2(1), /* CAM_PWR_EN2 */ - .enable_high = 1, - .init_data = &cam_vt_dio_reg_init_data, -}; - -static struct platform_device cam_vt_dio_fixed_reg_dev = { - .name = "reg-fixed-voltage", .id = FIXED_REG_ID_CAM_VT_DIO, - .dev = { .platform_data = &cam_vt_dio_fixed_voltage_cfg }, -}; - -static struct regulator_consumer_supply cam_i_core_supply = - REGULATOR_SUPPLY("core", "0-001f"); - -static struct regulator_init_data cam_i_core_reg_init_data = { - .constraints = { .valid_ops_mask = REGULATOR_CHANGE_STATUS }, - .num_consumer_supplies = 1, - .consumer_supplies = &cam_i_core_supply, -}; - -static struct fixed_voltage_config cam_i_core_fixed_voltage_cfg = { - .supply_name = "CAM_I_CORE_1.2V", - .microvolts = 1200000, - .gpio = EXYNOS4_GPE2(2), /* CAM_8M_CORE_EN */ - .enable_high = 1, - .init_data = &cam_i_core_reg_init_data, -}; - -static struct platform_device cam_i_core_fixed_reg_dev = { - .name = "reg-fixed-voltage", .id = FIXED_REG_ID_CAM_I_CORE, - .dev = { .platform_data = &cam_i_core_fixed_voltage_cfg }, -}; - -static struct regulator_consumer_supply cam_s_if_supply = - REGULATOR_SUPPLY("d_sensor", "0-001f"); - -static struct regulator_init_data cam_s_if_reg_init_data = { - .constraints = { .valid_ops_mask = REGULATOR_CHANGE_STATUS }, - .num_consumer_supplies = 1, - .consumer_supplies = &cam_s_if_supply, -}; - -static struct fixed_voltage_config cam_s_if_fixed_voltage_cfg = { - .supply_name = "CAM_S_IF_1.8V", - .microvolts = 1800000, - .gpio = EXYNOS4_GPE3(0), /* CAM_PWR_EN1 */ - .enable_high = 1, - .init_data = &cam_s_if_reg_init_data, -}; - -static struct platform_device cam_s_if_fixed_reg_dev = { - .name = "reg-fixed-voltage", .id = FIXED_REG_ID_CAM_S_IF, - .dev = { .platform_data = &cam_s_if_fixed_voltage_cfg }, -}; - -static struct s5p_platform_mipi_csis mipi_csis_platdata = { - .clk_rate = 166000000UL, - .lanes = 2, - .hs_settle = 12, -}; - -#define GPIO_CAM_LEVEL_EN(n) EXYNOS4_GPE4(n + 3) -#define GPIO_CAM_8M_ISP_INT EXYNOS4_GPX1(5) /* XEINT_13 */ -#define GPIO_CAM_MEGA_nRST EXYNOS4_GPE2(5) -#define GPIO_CAM_VGA_NRST EXYNOS4_GPE4(7) -#define GPIO_CAM_VGA_NSTBY EXYNOS4_GPE4(6) - -static int s5k6aa_set_power(int on) -{ - gpio_set_value(GPIO_CAM_LEVEL_EN(2), !!on); - return 0; -} - -static struct s5k6aa_platform_data s5k6aa_platdata = { - .mclk_frequency = 21600000UL, - .gpio_reset = { GPIO_CAM_VGA_NRST, 0 }, - .gpio_stby = { GPIO_CAM_VGA_NSTBY, 0 }, - .bus_type = V4L2_MBUS_PARALLEL, - .horiz_flip = 1, - .set_power = s5k6aa_set_power, -}; - -static struct i2c_board_info s5k6aa_board_info = { - I2C_BOARD_INFO("S5K6AA", 0x3C), - .platform_data = &s5k6aa_platdata, -}; - -static int m5mols_set_power(struct device *dev, int on) -{ - gpio_set_value(GPIO_CAM_LEVEL_EN(1), !on); - gpio_set_value(GPIO_CAM_LEVEL_EN(2), !!on); - return 0; -} - -static struct m5mols_platform_data m5mols_platdata = { - .gpio_reset = GPIO_CAM_MEGA_nRST, - .reset_polarity = 0, - .set_power = m5mols_set_power, -}; - -static struct i2c_board_info m5mols_board_info = { - I2C_BOARD_INFO("M5MOLS", 0x1F), - .platform_data = &m5mols_platdata, -}; - -static struct fimc_source_info universal_camera_sensors[] = { - { - .mux_id = 0, - .flags = V4L2_MBUS_PCLK_SAMPLE_FALLING | - V4L2_MBUS_VSYNC_ACTIVE_LOW, - .fimc_bus_type = FIMC_BUS_TYPE_ITU_601, - .board_info = &s5k6aa_board_info, - .i2c_bus_num = 0, - .clk_frequency = 24000000UL, - }, { - .mux_id = 0, - .flags = V4L2_MBUS_PCLK_SAMPLE_FALLING | - V4L2_MBUS_VSYNC_ACTIVE_LOW, - .fimc_bus_type = FIMC_BUS_TYPE_MIPI_CSI2, - .board_info = &m5mols_board_info, - .i2c_bus_num = 0, - .clk_frequency = 24000000UL, - }, -}; - -static struct s5p_platform_fimc fimc_md_platdata = { - .source_info = universal_camera_sensors, - .num_clients = ARRAY_SIZE(universal_camera_sensors), -}; - -static struct gpio universal_camera_gpios[] = { - { GPIO_CAM_LEVEL_EN(1), GPIOF_OUT_INIT_HIGH, "CAM_LVL_EN1" }, - { GPIO_CAM_LEVEL_EN(2), GPIOF_OUT_INIT_LOW, "CAM_LVL_EN2" }, - { GPIO_CAM_8M_ISP_INT, GPIOF_IN, "8M_ISP_INT" }, - { GPIO_CAM_MEGA_nRST, GPIOF_OUT_INIT_LOW, "CAM_8M_NRST" }, - { GPIO_CAM_VGA_NRST, GPIOF_OUT_INIT_LOW, "CAM_VGA_NRST" }, - { GPIO_CAM_VGA_NSTBY, GPIOF_OUT_INIT_LOW, "CAM_VGA_NSTBY" }, -}; - -/* USB OTG */ -static struct s3c_hsotg_plat universal_hsotg_pdata; - -static void __init universal_camera_init(void) -{ - s3c_set_platdata(&mipi_csis_platdata, sizeof(mipi_csis_platdata), - &s5p_device_mipi_csis0); - s3c_set_platdata(&fimc_md_platdata, sizeof(fimc_md_platdata), - &s5p_device_fimc_md); - - if (gpio_request_array(universal_camera_gpios, - ARRAY_SIZE(universal_camera_gpios))) { - pr_err("%s: GPIO request failed\n", __func__); - return; - } - - if (!s3c_gpio_cfgpin(GPIO_CAM_8M_ISP_INT, S3C_GPIO_SFN(0xf))) - m5mols_board_info.irq = gpio_to_irq(GPIO_CAM_8M_ISP_INT); - else - pr_err("Failed to configure 8M_ISP_INT GPIO\n"); - - /* Free GPIOs controlled directly by the sensor drivers. */ - gpio_free(GPIO_CAM_MEGA_nRST); - gpio_free(GPIO_CAM_8M_ISP_INT); - gpio_free(GPIO_CAM_VGA_NRST); - gpio_free(GPIO_CAM_VGA_NSTBY); - - if (exynos4_fimc_setup_gpio(S5P_CAMPORT_A)) - pr_err("Camera port A setup failed\n"); -} - -static struct platform_device *universal_devices[] __initdata = { - /* Samsung Platform Devices */ - &s5p_device_mipi_csis0, - &s5p_device_fimc0, - &s5p_device_fimc1, - &s5p_device_fimc2, - &s5p_device_fimc3, - &s5p_device_g2d, - &mmc0_fixed_voltage, - &s3c_device_hsmmc0, - &s3c_device_hsmmc2, - &s3c_device_hsmmc3, - &s3c_device_i2c0, - &s3c_device_i2c3, - &s3c_device_i2c5, - &s5p_device_i2c_hdmiphy, - &hdmi_fixed_voltage, - &s5p_device_hdmi, - &s5p_device_sdo, - &s5p_device_mixer, - - /* Universal Devices */ - &i2c_gpio12, - &universal_gpio_keys, - &s5p_device_onenand, - &s5p_device_fimd0, - &s5p_device_jpeg, - &s3c_device_usb_hsotg, - &s5p_device_mfc, - &s5p_device_mfc_l, - &s5p_device_mfc_r, - &cam_vt_dio_fixed_reg_dev, - &cam_i_core_fixed_reg_dev, - &cam_s_if_fixed_reg_dev, - &s5p_device_fimc_md, -}; - -static void __init universal_map_io(void) -{ - exynos_init_io(NULL, 0); - s3c24xx_init_uarts(universal_uartcfgs, ARRAY_SIZE(universal_uartcfgs)); - exynos_set_timer_source(BIT(2) | BIT(4)); - xxti_f = 0; - xusbxti_f = 24000000; -} - -static void s5p_tv_setup(void) -{ - /* direct HPD to HDMI chip */ - gpio_request_one(EXYNOS4_GPX3(7), GPIOF_IN, "hpd-plug"); - s3c_gpio_cfgpin(EXYNOS4_GPX3(7), S3C_GPIO_SFN(0x3)); - s3c_gpio_setpull(EXYNOS4_GPX3(7), S3C_GPIO_PULL_NONE); -} - -static void __init universal_reserve(void) -{ - s5p_mfc_reserve_mem(0x43000000, 8 << 20, 0x51000000, 8 << 20); -} - -static void __init universal_machine_init(void) -{ - universal_sdhci_init(); - s5p_tv_setup(); - - s3c_i2c0_set_platdata(&universal_i2c0_platdata); - i2c_register_board_info(1, i2c1_devs, ARRAY_SIZE(i2c1_devs)); - - universal_tsp_init(); - s3c_i2c3_set_platdata(NULL); - i2c_register_board_info(3, i2c3_devs, ARRAY_SIZE(i2c3_devs)); - - s3c_i2c5_set_platdata(NULL); - s5p_i2c_hdmiphy_set_platdata(NULL); - i2c_register_board_info(5, i2c5_devs, ARRAY_SIZE(i2c5_devs)); - -#ifdef CONFIG_DRM_EXYNOS - s5p_device_fimd0.dev.platform_data = &drm_fimd_pdata; - exynos4_fimd0_gpio_setup_24bpp(); -#else - s5p_fimd0_set_platdata(&universal_lcd_pdata); -#endif - - universal_touchkey_init(); - i2c_register_board_info(I2C_GPIO_BUS_12, i2c_gpio12_devs, - ARRAY_SIZE(i2c_gpio12_devs)); - - s3c_hsotg_set_platdata(&universal_hsotg_pdata); - universal_camera_init(); - - /* Last */ - platform_add_devices(universal_devices, ARRAY_SIZE(universal_devices)); -} - -MACHINE_START(UNIVERSAL_C210, "UNIVERSAL_C210") - /* Maintainer: Kyungmin Park <kyungmin.park@samsung.com> */ - .atag_offset = 0x100, - .smp = smp_ops(exynos_smp_ops), - .init_irq = exynos4_init_irq, - .map_io = universal_map_io, - .init_machine = universal_machine_init, - .init_late = exynos_init_late, - .init_time = exynos_init_time, - .reserve = &universal_reserve, - .restart = exynos4_restart, -MACHINE_END diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c index a0e8ff7758a4..d9c6d0ab6a0c 100644 --- a/arch/arm/mach-exynos/platsmp.c +++ b/arch/arm/mach-exynos/platsmp.c @@ -200,7 +200,7 @@ static void __init exynos_smp_prepare_cpus(unsigned int max_cpus) { int i; - if (!(soc_is_exynos5250() || soc_is_exynos5440())) + if (read_cpuid_part_number() == ARM_CPU_PART_CORTEX_A9) scu_enable(scu_base_addr()); /* diff --git a/arch/arm/mach-exynos/pm.c b/arch/arm/mach-exynos/pm.c index e3faaa812016..41c20692a13f 100644 --- a/arch/arm/mach-exynos/pm.c +++ b/arch/arm/mach-exynos/pm.c @@ -30,7 +30,6 @@ #include <plat/regs-srom.h> #include <mach/regs-irq.h> -#include <mach/regs-gpio.h> #include <mach/regs-clock.h> #include <mach/regs-pmu.h> #include <mach/pm-core.h> diff --git a/arch/arm/mach-exynos/pm_domains.c b/arch/arm/mach-exynos/pm_domains.c index 9f1351de52f7..1703593e366c 100644 --- a/arch/arm/mach-exynos/pm_domains.c +++ b/arch/arm/mach-exynos/pm_domains.c @@ -74,17 +74,6 @@ static int exynos_pd_power_off(struct generic_pm_domain *domain) return exynos_pd_power(domain, false); } -#define EXYNOS_GPD(PD, BASE, NAME) \ -static struct exynos_pm_domain PD = { \ - .base = (void __iomem *)BASE, \ - .name = NAME, \ - .pd = { \ - .power_off = exynos_pd_power_off, \ - .power_on = exynos_pd_power_on, \ - }, \ -} - -#ifdef CONFIG_OF static void exynos_add_device_to_domain(struct exynos_pm_domain *pd, struct device *dev) { @@ -157,7 +146,7 @@ static struct notifier_block platform_nb = { .notifier_call = exynos_pm_notifier_call, }; -static __init int exynos_pm_dt_parse_domains(void) +static __init int exynos4_pm_init_power_domain(void) { struct platform_device *pdev; struct device_node *np; @@ -193,94 +182,6 @@ static __init int exynos_pm_dt_parse_domains(void) return 0; } -#else -static __init int exynos_pm_dt_parse_domains(void) -{ - return 0; -} -#endif /* CONFIG_OF */ - -static __init __maybe_unused void exynos_pm_add_dev_to_genpd(struct platform_device *pdev, - struct exynos_pm_domain *pd) -{ - if (pdev->dev.bus) { - if (!pm_genpd_add_device(&pd->pd, &pdev->dev)) - pm_genpd_dev_need_restore(&pdev->dev, true); - else - pr_info("%s: error in adding %s device to %s power" - "domain\n", __func__, dev_name(&pdev->dev), - pd->name); - } -} - -EXYNOS_GPD(exynos4_pd_mfc, S5P_PMU_MFC_CONF, "pd-mfc"); -EXYNOS_GPD(exynos4_pd_g3d, S5P_PMU_G3D_CONF, "pd-g3d"); -EXYNOS_GPD(exynos4_pd_lcd0, S5P_PMU_LCD0_CONF, "pd-lcd0"); -EXYNOS_GPD(exynos4_pd_lcd1, S5P_PMU_LCD1_CONF, "pd-lcd1"); -EXYNOS_GPD(exynos4_pd_tv, S5P_PMU_TV_CONF, "pd-tv"); -EXYNOS_GPD(exynos4_pd_cam, S5P_PMU_CAM_CONF, "pd-cam"); -EXYNOS_GPD(exynos4_pd_gps, S5P_PMU_GPS_CONF, "pd-gps"); - -static struct exynos_pm_domain *exynos4_pm_domains[] = { - &exynos4_pd_mfc, - &exynos4_pd_g3d, - &exynos4_pd_lcd0, - &exynos4_pd_lcd1, - &exynos4_pd_tv, - &exynos4_pd_cam, - &exynos4_pd_gps, -}; - -static __init int exynos4_pm_init_power_domain(void) -{ - int idx; - - if (of_have_populated_dt()) - return exynos_pm_dt_parse_domains(); - - for (idx = 0; idx < ARRAY_SIZE(exynos4_pm_domains); idx++) { - struct exynos_pm_domain *pd = exynos4_pm_domains[idx]; - int on = __raw_readl(pd->base + 0x4) & S5P_INT_LOCAL_PWR_EN; - - pm_genpd_init(&pd->pd, NULL, !on); - } - -#ifdef CONFIG_S5P_DEV_FIMD0 - exynos_pm_add_dev_to_genpd(&s5p_device_fimd0, &exynos4_pd_lcd0); -#endif -#ifdef CONFIG_S5P_DEV_TV - exynos_pm_add_dev_to_genpd(&s5p_device_hdmi, &exynos4_pd_tv); - exynos_pm_add_dev_to_genpd(&s5p_device_mixer, &exynos4_pd_tv); -#endif -#ifdef CONFIG_S5P_DEV_MFC - exynos_pm_add_dev_to_genpd(&s5p_device_mfc, &exynos4_pd_mfc); -#endif -#ifdef CONFIG_S5P_DEV_FIMC0 - exynos_pm_add_dev_to_genpd(&s5p_device_fimc0, &exynos4_pd_cam); -#endif -#ifdef CONFIG_S5P_DEV_FIMC1 - exynos_pm_add_dev_to_genpd(&s5p_device_fimc1, &exynos4_pd_cam); -#endif -#ifdef CONFIG_S5P_DEV_FIMC2 - exynos_pm_add_dev_to_genpd(&s5p_device_fimc2, &exynos4_pd_cam); -#endif -#ifdef CONFIG_S5P_DEV_FIMC3 - exynos_pm_add_dev_to_genpd(&s5p_device_fimc3, &exynos4_pd_cam); -#endif -#ifdef CONFIG_S5P_DEV_CSIS0 - exynos_pm_add_dev_to_genpd(&s5p_device_mipi_csis0, &exynos4_pd_cam); -#endif -#ifdef CONFIG_S5P_DEV_CSIS1 - exynos_pm_add_dev_to_genpd(&s5p_device_mipi_csis1, &exynos4_pd_cam); -#endif -#ifdef CONFIG_S5P_DEV_G2D - exynos_pm_add_dev_to_genpd(&s5p_device_g2d, &exynos4_pd_lcd0); -#endif -#ifdef CONFIG_S5P_DEV_JPEG - exynos_pm_add_dev_to_genpd(&s5p_device_jpeg, &exynos4_pd_cam); -#endif - return 0; -} arch_initcall(exynos4_pm_init_power_domain); int __init exynos_pm_late_initcall(void) diff --git a/arch/arm/mach-exynos/setup-fimc.c b/arch/arm/mach-exynos/setup-fimc.c deleted file mode 100644 index 6a45078d9d12..000000000000 --- a/arch/arm/mach-exynos/setup-fimc.c +++ /dev/null @@ -1,44 +0,0 @@ -/* - * Copyright (C) 2011 Samsung Electronics Co., Ltd. - * - * Exynos4 camera interface GPIO configuration. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include <linux/gpio.h> -#include <plat/gpio-cfg.h> -#include <plat/camport.h> - -int exynos4_fimc_setup_gpio(enum s5p_camport_id id) -{ - u32 gpio8, gpio5; - u32 sfn; - int ret; - - switch (id) { - case S5P_CAMPORT_A: - gpio8 = EXYNOS4_GPJ0(0); /* PCLK, VSYNC, HREF, DATA[0:4] */ - gpio5 = EXYNOS4_GPJ1(0); /* DATA[5:7], CLKOUT, FIELD */ - sfn = S3C_GPIO_SFN(2); - break; - - case S5P_CAMPORT_B: - gpio8 = EXYNOS4_GPE0(0); /* DATA[0:7] */ - gpio5 = EXYNOS4_GPE1(0); /* PCLK, VSYNC, HREF, CLKOUT, FIELD */ - sfn = S3C_GPIO_SFN(3); - break; - - default: - WARN(1, "Wrong camport id: %d\n", id); - return -EINVAL; - } - - ret = s3c_gpio_cfgall_range(gpio8, 8, sfn, S3C_GPIO_PULL_UP); - if (ret) - return ret; - - return s3c_gpio_cfgall_range(gpio5, 5, sfn, S3C_GPIO_PULL_UP); -} diff --git a/arch/arm/mach-exynos/setup-fimd0.c b/arch/arm/mach-exynos/setup-fimd0.c deleted file mode 100644 index 5665bb4e980b..000000000000 --- a/arch/arm/mach-exynos/setup-fimd0.c +++ /dev/null @@ -1,43 +0,0 @@ -/* linux/arch/arm/mach-exynos4/setup-fimd0.c - * - * Copyright (c) 2009-2011 Samsung Electronics Co., Ltd. - * http://www.samsung.com - * - * Base Exynos4 FIMD 0 configuration - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#include <linux/fb.h> -#include <linux/gpio.h> - -#include <video/samsung_fimd.h> -#include <plat/gpio-cfg.h> - -#include <mach/map.h> - -void exynos4_fimd0_gpio_setup_24bpp(void) -{ - unsigned int reg; - - s3c_gpio_cfgrange_nopull(EXYNOS4_GPF0(0), 8, S3C_GPIO_SFN(2)); - s3c_gpio_cfgrange_nopull(EXYNOS4_GPF1(0), 8, S3C_GPIO_SFN(2)); - s3c_gpio_cfgrange_nopull(EXYNOS4_GPF2(0), 8, S3C_GPIO_SFN(2)); - s3c_gpio_cfgrange_nopull(EXYNOS4_GPF3(0), 4, S3C_GPIO_SFN(2)); - - /* - * Set DISPLAY_CONTROL register for Display path selection. - * - * DISPLAY_CONTROL[1:0] - * --------------------- - * 00 | MIE - * 01 | MDINE - * 10 | FIMD : selected - * 11 | FIMD - */ - reg = __raw_readl(S3C_VA_SYS + 0x0210); - reg |= (1 << 1); - __raw_writel(reg, S3C_VA_SYS + 0x0210); -} diff --git a/arch/arm/mach-exynos/setup-i2c0.c b/arch/arm/mach-exynos/setup-i2c0.c deleted file mode 100644 index e2d9dfbf102c..000000000000 --- a/arch/arm/mach-exynos/setup-i2c0.c +++ /dev/null @@ -1,29 +0,0 @@ -/* - * Copyright (c) 2009-2012 Samsung Electronics Co., Ltd. - * http://www.samsung.com/ - * - * I2C0 GPIO configuration. - * - * Based on plat-s3c64xx/setup-i2c0.c - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -struct platform_device; /* don't need the contents */ - -#include <linux/gpio.h> -#include <linux/platform_data/i2c-s3c2410.h> -#include <plat/gpio-cfg.h> -#include <plat/cpu.h> - -void s3c_i2c0_cfg_gpio(struct platform_device *dev) -{ - if (soc_is_exynos5250() || soc_is_exynos5440()) - /* will be implemented with gpio function */ - return; - - s3c_gpio_cfgall_range(EXYNOS4_GPD1(0), 2, - S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP); -} diff --git a/arch/arm/mach-exynos/setup-i2c1.c b/arch/arm/mach-exynos/setup-i2c1.c deleted file mode 100644 index 8d2279cc85dc..000000000000 --- a/arch/arm/mach-exynos/setup-i2c1.c +++ /dev/null @@ -1,23 +0,0 @@ -/* - * linux/arch/arm/mach-exynos4/setup-i2c1.c - * - * Copyright (C) 2010 Samsung Electronics Co., Ltd. - * - * I2C1 GPIO configuration. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -struct platform_device; /* don't need the contents */ - -#include <linux/gpio.h> -#include <linux/platform_data/i2c-s3c2410.h> -#include <plat/gpio-cfg.h> - -void s3c_i2c1_cfg_gpio(struct platform_device *dev) -{ - s3c_gpio_cfgall_range(EXYNOS4_GPD1(2), 2, - S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP); -} diff --git a/arch/arm/mach-exynos/setup-i2c2.c b/arch/arm/mach-exynos/setup-i2c2.c deleted file mode 100644 index 0ed62fc42a77..000000000000 --- a/arch/arm/mach-exynos/setup-i2c2.c +++ /dev/null @@ -1,23 +0,0 @@ -/* - * linux/arch/arm/mach-exynos4/setup-i2c2.c - * - * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd. - * - * I2C2 GPIO configuration. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -struct platform_device; /* don't need the contents */ - -#include <linux/gpio.h> -#include <linux/platform_data/i2c-s3c2410.h> -#include <plat/gpio-cfg.h> - -void s3c_i2c2_cfg_gpio(struct platform_device *dev) -{ - s3c_gpio_cfgall_range(EXYNOS4_GPA0(6), 2, - S3C_GPIO_SFN(3), S3C_GPIO_PULL_UP); -} diff --git a/arch/arm/mach-exynos/setup-i2c3.c b/arch/arm/mach-exynos/setup-i2c3.c deleted file mode 100644 index 7787fd26076b..000000000000 --- a/arch/arm/mach-exynos/setup-i2c3.c +++ /dev/null @@ -1,23 +0,0 @@ -/* - * linux/arch/arm/mach-exynos4/setup-i2c3.c - * - * Copyright (c) 2010 Samsung Electronics Co., Ltd. - * - * I2C3 GPIO configuration. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -struct platform_device; /* don't need the contents */ - -#include <linux/gpio.h> -#include <linux/platform_data/i2c-s3c2410.h> -#include <plat/gpio-cfg.h> - -void s3c_i2c3_cfg_gpio(struct platform_device *dev) -{ - s3c_gpio_cfgall_range(EXYNOS4_GPA1(2), 2, - S3C_GPIO_SFN(3), S3C_GPIO_PULL_UP); -} diff --git a/arch/arm/mach-exynos/setup-i2c4.c b/arch/arm/mach-exynos/setup-i2c4.c deleted file mode 100644 index edc847f89826..000000000000 --- a/arch/arm/mach-exynos/setup-i2c4.c +++ /dev/null @@ -1,23 +0,0 @@ -/* - * linux/arch/arm/mach-exynos4/setup-i2c4.c - * - * Copyright (c) 2010 Samsung Electronics Co., Ltd. - * - * I2C4 GPIO configuration. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -struct platform_device; /* don't need the contents */ - -#include <linux/gpio.h> -#include <linux/platform_data/i2c-s3c2410.h> -#include <plat/gpio-cfg.h> - -void s3c_i2c4_cfg_gpio(struct platform_device *dev) -{ - s3c_gpio_cfgall_range(EXYNOS4_GPB(2), 2, - S3C_GPIO_SFN(3), S3C_GPIO_PULL_UP); -} diff --git a/arch/arm/mach-exynos/setup-i2c5.c b/arch/arm/mach-exynos/setup-i2c5.c deleted file mode 100644 index d88af7f75954..000000000000 --- a/arch/arm/mach-exynos/setup-i2c5.c +++ /dev/null @@ -1,23 +0,0 @@ -/* - * linux/arch/arm/mach-exynos4/setup-i2c5.c - * - * Copyright (c) 2010 Samsung Electronics Co., Ltd. - * - * I2C5 GPIO configuration. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -struct platform_device; /* don't need the contents */ - -#include <linux/gpio.h> -#include <linux/platform_data/i2c-s3c2410.h> -#include <plat/gpio-cfg.h> - -void s3c_i2c5_cfg_gpio(struct platform_device *dev) -{ - s3c_gpio_cfgall_range(EXYNOS4_GPB(6), 2, - S3C_GPIO_SFN(3), S3C_GPIO_PULL_UP); -} diff --git a/arch/arm/mach-exynos/setup-i2c6.c b/arch/arm/mach-exynos/setup-i2c6.c deleted file mode 100644 index c590286c9d3a..000000000000 --- a/arch/arm/mach-exynos/setup-i2c6.c +++ /dev/null @@ -1,23 +0,0 @@ -/* - * linux/arch/arm/mach-exynos4/setup-i2c6.c - * - * Copyright (c) 2010 Samsung Electronics Co., Ltd. - * - * I2C6 GPIO configuration. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -struct platform_device; /* don't need the contents */ - -#include <linux/gpio.h> -#include <linux/platform_data/i2c-s3c2410.h> -#include <plat/gpio-cfg.h> - -void s3c_i2c6_cfg_gpio(struct platform_device *dev) -{ - s3c_gpio_cfgall_range(EXYNOS4_GPC1(3), 2, - S3C_GPIO_SFN(4), S3C_GPIO_PULL_UP); -} diff --git a/arch/arm/mach-exynos/setup-i2c7.c b/arch/arm/mach-exynos/setup-i2c7.c deleted file mode 100644 index 1bba75568a5f..000000000000 --- a/arch/arm/mach-exynos/setup-i2c7.c +++ /dev/null @@ -1,23 +0,0 @@ -/* - * linux/arch/arm/mach-exynos4/setup-i2c7.c - * - * Copyright (c) 2010 Samsung Electronics Co., Ltd. - * - * I2C7 GPIO configuration. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -struct platform_device; /* don't need the contents */ - -#include <linux/gpio.h> -#include <linux/platform_data/i2c-s3c2410.h> -#include <plat/gpio-cfg.h> - -void s3c_i2c7_cfg_gpio(struct platform_device *dev) -{ - s3c_gpio_cfgall_range(EXYNOS4_GPD0(2), 2, - S3C_GPIO_SFN(3), S3C_GPIO_PULL_UP); -} diff --git a/arch/arm/mach-exynos/setup-keypad.c b/arch/arm/mach-exynos/setup-keypad.c deleted file mode 100644 index 7862bfb5933d..000000000000 --- a/arch/arm/mach-exynos/setup-keypad.c +++ /dev/null @@ -1,36 +0,0 @@ -/* linux/arch/arm/mach-exynos4/setup-keypad.c - * - * Copyright (c) 2011 Samsung Electronics Co., Ltd. - * http://www.samsung.com - * - * GPIO configuration for Exynos4 KeyPad device - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#include <linux/gpio.h> -#include <plat/gpio-cfg.h> - -void samsung_keypad_cfg_gpio(unsigned int rows, unsigned int cols) -{ - /* Keypads can be of various combinations, Just making sure */ - - if (rows > 8) { - /* Set all the necessary GPX2 pins: KP_ROW[0~7] */ - s3c_gpio_cfgall_range(EXYNOS4_GPX2(0), 8, S3C_GPIO_SFN(3), - S3C_GPIO_PULL_UP); - - /* Set all the necessary GPX3 pins: KP_ROW[8~] */ - s3c_gpio_cfgall_range(EXYNOS4_GPX3(0), (rows - 8), - S3C_GPIO_SFN(3), S3C_GPIO_PULL_UP); - } else { - /* Set all the necessary GPX2 pins: KP_ROW[x] */ - s3c_gpio_cfgall_range(EXYNOS4_GPX2(0), rows, S3C_GPIO_SFN(3), - S3C_GPIO_PULL_UP); - } - - /* Set all the necessary GPX1 pins to special-function 3: KP_COL[x] */ - s3c_gpio_cfgrange_nopull(EXYNOS4_GPX1(0), cols, S3C_GPIO_SFN(3)); -} diff --git a/arch/arm/mach-exynos/setup-sdhci-gpio.c b/arch/arm/mach-exynos/setup-sdhci-gpio.c deleted file mode 100644 index d5b98c866738..000000000000 --- a/arch/arm/mach-exynos/setup-sdhci-gpio.c +++ /dev/null @@ -1,152 +0,0 @@ -/* linux/arch/arm/mach-exynos4/setup-sdhci-gpio.c - * - * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. - * http://www.samsung.com - * - * EXYNOS4 - Helper functions for setting up SDHCI device(s) GPIO (HSMMC) - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#include <linux/kernel.h> -#include <linux/types.h> -#include <linux/interrupt.h> -#include <linux/platform_device.h> -#include <linux/io.h> -#include <linux/gpio.h> -#include <linux/mmc/host.h> -#include <linux/mmc/card.h> - -#include <mach/gpio.h> -#include <plat/gpio-cfg.h> -#include <plat/sdhci.h> - -void exynos4_setup_sdhci0_cfg_gpio(struct platform_device *dev, int width) -{ - struct s3c_sdhci_platdata *pdata = dev->dev.platform_data; - unsigned int gpio; - - /* Set all the necessary GPK0[0:1] pins to special-function 2 */ - for (gpio = EXYNOS4_GPK0(0); gpio < EXYNOS4_GPK0(2); gpio++) { - s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); - s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); - s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4); - } - - switch (width) { - case 8: - for (gpio = EXYNOS4_GPK1(3); gpio <= EXYNOS4_GPK1(6); gpio++) { - /* Data pin GPK1[3:6] to special-function 3 */ - s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(3)); - s3c_gpio_setpull(gpio, S3C_GPIO_PULL_UP); - s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4); - } - case 4: - for (gpio = EXYNOS4_GPK0(3); gpio <= EXYNOS4_GPK0(6); gpio++) { - /* Data pin GPK0[3:6] to special-function 2 */ - s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); - s3c_gpio_setpull(gpio, S3C_GPIO_PULL_UP); - s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4); - } - default: - break; - } - - if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) { - s3c_gpio_cfgpin(EXYNOS4_GPK0(2), S3C_GPIO_SFN(2)); - s3c_gpio_setpull(EXYNOS4_GPK0(2), S3C_GPIO_PULL_UP); - s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4); - } -} - -void exynos4_setup_sdhci1_cfg_gpio(struct platform_device *dev, int width) -{ - struct s3c_sdhci_platdata *pdata = dev->dev.platform_data; - unsigned int gpio; - - /* Set all the necessary GPK1[0:1] pins to special-function 2 */ - for (gpio = EXYNOS4_GPK1(0); gpio < EXYNOS4_GPK1(2); gpio++) { - s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); - s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); - s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4); - } - - for (gpio = EXYNOS4_GPK1(3); gpio <= EXYNOS4_GPK1(6); gpio++) { - /* Data pin GPK1[3:6] to special-function 2 */ - s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); - s3c_gpio_setpull(gpio, S3C_GPIO_PULL_UP); - s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4); - } - - if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) { - s3c_gpio_cfgpin(EXYNOS4_GPK1(2), S3C_GPIO_SFN(2)); - s3c_gpio_setpull(EXYNOS4_GPK1(2), S3C_GPIO_PULL_UP); - s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4); - } -} - -void exynos4_setup_sdhci2_cfg_gpio(struct platform_device *dev, int width) -{ - struct s3c_sdhci_platdata *pdata = dev->dev.platform_data; - unsigned int gpio; - - /* Set all the necessary GPK2[0:1] pins to special-function 2 */ - for (gpio = EXYNOS4_GPK2(0); gpio < EXYNOS4_GPK2(2); gpio++) { - s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); - s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); - s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4); - } - - switch (width) { - case 8: - for (gpio = EXYNOS4_GPK3(3); gpio <= EXYNOS4_GPK3(6); gpio++) { - /* Data pin GPK3[3:6] to special-function 3 */ - s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(3)); - s3c_gpio_setpull(gpio, S3C_GPIO_PULL_UP); - s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4); - } - case 4: - for (gpio = EXYNOS4_GPK2(3); gpio <= EXYNOS4_GPK2(6); gpio++) { - /* Data pin GPK2[3:6] to special-function 2 */ - s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); - s3c_gpio_setpull(gpio, S3C_GPIO_PULL_UP); - s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4); - } - default: - break; - } - - if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) { - s3c_gpio_cfgpin(EXYNOS4_GPK2(2), S3C_GPIO_SFN(2)); - s3c_gpio_setpull(EXYNOS4_GPK2(2), S3C_GPIO_PULL_UP); - s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4); - } -} - -void exynos4_setup_sdhci3_cfg_gpio(struct platform_device *dev, int width) -{ - struct s3c_sdhci_platdata *pdata = dev->dev.platform_data; - unsigned int gpio; - - /* Set all the necessary GPK3[0:1] pins to special-function 2 */ - for (gpio = EXYNOS4_GPK3(0); gpio < EXYNOS4_GPK3(2); gpio++) { - s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); - s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); - s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4); - } - - for (gpio = EXYNOS4_GPK3(3); gpio <= EXYNOS4_GPK3(6); gpio++) { - /* Data pin GPK3[3:6] to special-function 2 */ - s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); - s3c_gpio_setpull(gpio, S3C_GPIO_PULL_UP); - s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4); - } - - if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) { - s3c_gpio_cfgpin(EXYNOS4_GPK3(2), S3C_GPIO_SFN(2)); - s3c_gpio_setpull(EXYNOS4_GPK3(2), S3C_GPIO_PULL_UP); - s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4); - } -} diff --git a/arch/arm/mach-exynos/setup-spi.c b/arch/arm/mach-exynos/setup-spi.c deleted file mode 100644 index 4999829d1c6e..000000000000 --- a/arch/arm/mach-exynos/setup-spi.c +++ /dev/null @@ -1,45 +0,0 @@ -/* linux/arch/arm/mach-exynos4/setup-spi.c - * - * Copyright (C) 2011 Samsung Electronics Ltd. - * http://www.samsung.com/ - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include <linux/gpio.h> -#include <plat/gpio-cfg.h> - -#ifdef CONFIG_S3C64XX_DEV_SPI0 -int s3c64xx_spi0_cfg_gpio(void) -{ - s3c_gpio_cfgpin(EXYNOS4_GPB(0), S3C_GPIO_SFN(2)); - s3c_gpio_setpull(EXYNOS4_GPB(0), S3C_GPIO_PULL_UP); - s3c_gpio_cfgall_range(EXYNOS4_GPB(2), 2, - S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP); - return 0; -} -#endif - -#ifdef CONFIG_S3C64XX_DEV_SPI1 -int s3c64xx_spi1_cfg_gpio(void) -{ - s3c_gpio_cfgpin(EXYNOS4_GPB(4), S3C_GPIO_SFN(2)); - s3c_gpio_setpull(EXYNOS4_GPB(4), S3C_GPIO_PULL_UP); - s3c_gpio_cfgall_range(EXYNOS4_GPB(6), 2, - S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP); - return 0; -} -#endif - -#ifdef CONFIG_S3C64XX_DEV_SPI2 -int s3c64xx_spi2_cfg_gpio(void) -{ - s3c_gpio_cfgpin(EXYNOS4_GPC1(1), S3C_GPIO_SFN(5)); - s3c_gpio_setpull(EXYNOS4_GPC1(1), S3C_GPIO_PULL_UP); - s3c_gpio_cfgall_range(EXYNOS4_GPC1(3), 2, - S3C_GPIO_SFN(5), S3C_GPIO_PULL_UP); - return 0; -} -#endif diff --git a/arch/arm/mach-exynos/setup-usb-phy.c b/arch/arm/mach-exynos/setup-usb-phy.c deleted file mode 100644 index 6af40662a449..000000000000 --- a/arch/arm/mach-exynos/setup-usb-phy.c +++ /dev/null @@ -1,223 +0,0 @@ -/* - * Copyright (C) 2011 Samsung Electronics Co.Ltd - * Author: Joonyoung Shim <jy0922.shim@samsung.com> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - */ - -#include <linux/clk.h> -#include <linux/delay.h> -#include <linux/err.h> -#include <linux/io.h> -#include <linux/platform_device.h> -#include <mach/regs-pmu.h> -#include <mach/regs-usb-phy.h> -#include <plat/cpu.h> -#include <plat/usb-phy.h> - -static atomic_t host_usage; - -static int exynos4_usb_host_phy_is_on(void) -{ - return (readl(EXYNOS4_PHYPWR) & PHY1_STD_ANALOG_POWERDOWN) ? 0 : 1; -} - -static void exynos4210_usb_phy_clkset(struct platform_device *pdev) -{ - struct clk *xusbxti_clk; - u32 phyclk; - - xusbxti_clk = clk_get(&pdev->dev, "xusbxti"); - if (xusbxti_clk && !IS_ERR(xusbxti_clk)) { - if (soc_is_exynos4210()) { - /* set clock frequency for PLL */ - phyclk = readl(EXYNOS4_PHYCLK) & ~EXYNOS4210_CLKSEL_MASK; - - switch (clk_get_rate(xusbxti_clk)) { - case 12 * MHZ: - phyclk |= EXYNOS4210_CLKSEL_12M; - break; - case 48 * MHZ: - phyclk |= EXYNOS4210_CLKSEL_48M; - break; - default: - case 24 * MHZ: - phyclk |= EXYNOS4210_CLKSEL_24M; - break; - } - writel(phyclk, EXYNOS4_PHYCLK); - } else if (soc_is_exynos4212() || soc_is_exynos4412()) { - /* set clock frequency for PLL */ - phyclk = readl(EXYNOS4_PHYCLK) & ~EXYNOS4X12_CLKSEL_MASK; - - switch (clk_get_rate(xusbxti_clk)) { - case 9600 * KHZ: - phyclk |= EXYNOS4X12_CLKSEL_9600K; - break; - case 10 * MHZ: - phyclk |= EXYNOS4X12_CLKSEL_10M; - break; - case 12 * MHZ: - phyclk |= EXYNOS4X12_CLKSEL_12M; - break; - case 19200 * KHZ: - phyclk |= EXYNOS4X12_CLKSEL_19200K; - break; - case 20 * MHZ: - phyclk |= EXYNOS4X12_CLKSEL_20M; - break; - default: - case 24 * MHZ: - /* default reference clock */ - phyclk |= EXYNOS4X12_CLKSEL_24M; - break; - } - writel(phyclk, EXYNOS4_PHYCLK); - } - clk_put(xusbxti_clk); - } -} - -static int exynos4210_usb_phy0_init(struct platform_device *pdev) -{ - u32 rstcon; - - writel(readl(S5P_USBDEVICE_PHY_CONTROL) | S5P_USBDEVICE_PHY_ENABLE, - S5P_USBDEVICE_PHY_CONTROL); - - exynos4210_usb_phy_clkset(pdev); - - /* set to normal PHY0 */ - writel((readl(EXYNOS4_PHYPWR) & ~PHY0_NORMAL_MASK), EXYNOS4_PHYPWR); - - /* reset PHY0 and Link */ - rstcon = readl(EXYNOS4_RSTCON) | PHY0_SWRST_MASK; - writel(rstcon, EXYNOS4_RSTCON); - udelay(10); - - rstcon &= ~PHY0_SWRST_MASK; - writel(rstcon, EXYNOS4_RSTCON); - - return 0; -} - -static int exynos4210_usb_phy0_exit(struct platform_device *pdev) -{ - writel((readl(EXYNOS4_PHYPWR) | PHY0_ANALOG_POWERDOWN | - PHY0_OTG_DISABLE), EXYNOS4_PHYPWR); - - writel(readl(S5P_USBDEVICE_PHY_CONTROL) & ~S5P_USBDEVICE_PHY_ENABLE, - S5P_USBDEVICE_PHY_CONTROL); - - return 0; -} - -static int exynos4210_usb_phy1_init(struct platform_device *pdev) -{ - struct clk *otg_clk; - u32 rstcon; - int err; - - atomic_inc(&host_usage); - - otg_clk = clk_get(&pdev->dev, "otg"); - if (IS_ERR(otg_clk)) { - dev_err(&pdev->dev, "Failed to get otg clock\n"); - return PTR_ERR(otg_clk); - } - - err = clk_enable(otg_clk); - if (err) { - clk_put(otg_clk); - return err; - } - - if (exynos4_usb_host_phy_is_on()) - return 0; - - writel(readl(S5P_USBHOST_PHY_CONTROL) | S5P_USBHOST_PHY_ENABLE, - S5P_USBHOST_PHY_CONTROL); - - exynos4210_usb_phy_clkset(pdev); - - /* floating prevention logic: disable */ - writel((readl(EXYNOS4_PHY1CON) | FPENABLEN), EXYNOS4_PHY1CON); - - /* set to normal HSIC 0 and 1 of PHY1 */ - writel((readl(EXYNOS4_PHYPWR) & ~PHY1_HSIC_NORMAL_MASK), - EXYNOS4_PHYPWR); - - /* set to normal standard USB of PHY1 */ - writel((readl(EXYNOS4_PHYPWR) & ~PHY1_STD_NORMAL_MASK), EXYNOS4_PHYPWR); - - /* reset all ports of both PHY and Link */ - rstcon = readl(EXYNOS4_RSTCON) | HOST_LINK_PORT_SWRST_MASK | - PHY1_SWRST_MASK; - writel(rstcon, EXYNOS4_RSTCON); - udelay(10); - - rstcon &= ~(HOST_LINK_PORT_SWRST_MASK | PHY1_SWRST_MASK); - writel(rstcon, EXYNOS4_RSTCON); - udelay(80); - - clk_disable(otg_clk); - clk_put(otg_clk); - - return 0; -} - -static int exynos4210_usb_phy1_exit(struct platform_device *pdev) -{ - struct clk *otg_clk; - int err; - - if (atomic_dec_return(&host_usage) > 0) - return 0; - - otg_clk = clk_get(&pdev->dev, "otg"); - if (IS_ERR(otg_clk)) { - dev_err(&pdev->dev, "Failed to get otg clock\n"); - return PTR_ERR(otg_clk); - } - - err = clk_enable(otg_clk); - if (err) { - clk_put(otg_clk); - return err; - } - - writel((readl(EXYNOS4_PHYPWR) | PHY1_STD_ANALOG_POWERDOWN), - EXYNOS4_PHYPWR); - - writel(readl(S5P_USBHOST_PHY_CONTROL) & ~S5P_USBHOST_PHY_ENABLE, - S5P_USBHOST_PHY_CONTROL); - - clk_disable(otg_clk); - clk_put(otg_clk); - - return 0; -} - -int s5p_usb_phy_init(struct platform_device *pdev, int type) -{ - if (type == USB_PHY_TYPE_DEVICE) - return exynos4210_usb_phy0_init(pdev); - else if (type == USB_PHY_TYPE_HOST) - return exynos4210_usb_phy1_init(pdev); - - return -EINVAL; -} - -int s5p_usb_phy_exit(struct platform_device *pdev, int type) -{ - if (type == USB_PHY_TYPE_DEVICE) - return exynos4210_usb_phy0_exit(pdev); - else if (type == USB_PHY_TYPE_HOST) - return exynos4210_usb_phy1_exit(pdev); - - return -EINVAL; -} |