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authorThomas Petazzoni <thomas.petazzoni@free-electrons.com>2014-05-19 12:04:39 +0200
committerRussell King <rmk+kernel@arm.linux.org.uk>2014-06-01 02:15:04 +0200
commit1c8c3cf0b5239388e712508a85821f4718f4d889 (patch)
tree8454ad999882d20118d1af924c0cf6d2d42c97bd /arch/arm/mach-footbridge/cats-hw.c
parentARM: 8066/1: correction for ARM patch 8031/2 (diff)
downloadlinux-1c8c3cf0b5239388e712508a85821f4718f4d889.tar.xz
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ARM: 8060/1: mm: allow sub-architectures to override PCI I/O memory type
Due to a design incompatibility between the PCIe Marvell controller and the Cortex-A9, stressing PCIe devices with a lot of traffic quickly causes a deadlock. One part of the workaround for this is to have all PCIe regions mapped as strongly-ordered (MT_UNCACHED) instead of the default MT_DEVICE. While the arch_ioremap_caller() mechanism allows sub-architecture code to override ioremap(), used to map PCIe memory regions, there isn't such a mechanism to override the behavior of pci_ioremap_io(). This commit adds the arch_pci_ioremap_mem_type variable, initialized to MT_DEVICE by default, and that sub-architecture code can override. We have chosen to expose a single variable rather than offering the possibility of overriding the entire pci_ioremap_io(), because implementing pci_ioremap_io() requires calling functions (get_mem_type()) that are private to the arch/arm/mm/ code. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-footbridge/cats-hw.c')
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