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| author | Arnd Bergmann <arnd@arndb.de> | 2012-07-17 22:41:50 +0200 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2012-07-17 22:41:50 +0200 |
| commit | 36c678f3c91ac92e9524abcf9b39f9f539d60279 (patch) | |
| tree | c9c0df006a7e9bcc14492b1d1fa6aa2c5c43d3a3 /arch/arm/mach-imx/clk-imx35.c | |
| parent | Merge tag 'omap-devel-am33xx-data-for-v3.6' of git://git.kernel.org/pub/scm/l... (diff) | |
| parent | ARM: imx: clk-imx31: Fix clock id for rnga driver (diff) | |
| download | linux-36c678f3c91ac92e9524abcf9b39f9f539d60279.tar.xz linux-36c678f3c91ac92e9524abcf9b39f9f539d60279.zip | |
Merge tag 'imx-clk' of git://git.pengutronix.de/git/imx/linux-2.6 into next/clk
From Sascha Hauer <s.hauer@pengutronix.de>:
i.MX clk noncritical fixes and updates
* tag 'imx-clk' of git://git.pengutronix.de/git/imx/linux-2.6:
ARM: imx: clk-imx31: Fix clock id for rnga driver
ARM: imx: add missing item to the list of clock event modes
ARM: i.MX5x CSPI: Fixed clock name for CSPI
ARM: i.MX5x clocks: Fix GPT clocks
ARM: i.MX5x clocks: Fix parent for PWM clocks
ARM: i.MX5x clocks: Add EPIT support
ARM: mx27: Reenable silicon version print
ARM: clk-imx27: Fix rtc clock id
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm/mach-imx/clk-imx35.c')
| -rw-r--r-- | arch/arm/mach-imx/clk-imx35.c | 9 |
1 files changed, 8 insertions, 1 deletions
diff --git a/arch/arm/mach-imx/clk-imx35.c b/arch/arm/mach-imx/clk-imx35.c index 920a8cc42726..c6422fb10bae 100644 --- a/arch/arm/mach-imx/clk-imx35.c +++ b/arch/arm/mach-imx/clk-imx35.c @@ -201,7 +201,6 @@ int __init mx35_clocks_init() pr_err("i.MX35 clk %d: register failed with %ld\n", i, PTR_ERR(clk[i])); - clk_register_clkdev(clk[pata_gate], NULL, "pata_imx"); clk_register_clkdev(clk[can1_gate], NULL, "flexcan.0"); clk_register_clkdev(clk[can2_gate], NULL, "flexcan.1"); @@ -264,6 +263,14 @@ int __init mx35_clocks_init() clk_prepare_enable(clk[iim_gate]); clk_prepare_enable(clk[emi_gate]); + /* + * SCC is needed to boot via mmc after a watchdog reset. The clock code + * before conversion to common clk also enabled UART1 (which isn't + * handled here and not needed for mmc) and IIM (which is enabled + * unconditionally above). + */ + clk_prepare_enable(clk[scc_gate]); + imx_print_silicon_rev("i.MX35", mx35_revision()); #ifdef CONFIG_MXC_USE_EPIT |