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authorShawn Guo <shawn.guo@linaro.org>2012-06-05 09:16:43 +0200
committerOlof Johansson <olof@lixom.net>2012-07-01 00:25:17 +0200
commit5ae95aefb73b32ec4e7c46554304042ba82230ca (patch)
treed4c4f96fac6878da0f7e14f1796abad7db7bbc39 /arch/arm/mach-imx/clk-imx6q.c
parentMerge tag 'omap-fixes-for-v3.5-rc4' of git://git.kernel.org/pub/scm/linux/ker... (diff)
downloadlinux-5ae95aefb73b32ec4e7c46554304042ba82230ca.tar.xz
linux-5ae95aefb73b32ec4e7c46554304042ba82230ca.zip
ARM: imx6q: fix suspend regression caused by common clk migration
When moving to common clk framework, the imx6q clks rom and mmdc_ch1_axi get different on/off states than old clk driver, which breaks suspend function. There might be a better way to manage these clocks, but let's takes the old clk driver approach to fix the regression first. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to '')
-rw-r--r--arch/arm/mach-imx/clk-imx6q.c6
1 files changed, 4 insertions, 2 deletions
diff --git a/arch/arm/mach-imx/clk-imx6q.c b/arch/arm/mach-imx/clk-imx6q.c
index 17dc66a085a5..e1a17ac7b3b4 100644
--- a/arch/arm/mach-imx/clk-imx6q.c
+++ b/arch/arm/mach-imx/clk-imx6q.c
@@ -152,13 +152,14 @@ enum mx6q_clks {
ssi2, ssi3, uart_ipg, uart_serial, usboh3, usdhc1, usdhc2, usdhc3,
usdhc4, vdo_axi, vpu_axi, cko1, pll1_sys, pll2_bus, pll3_usb_otg,
pll4_audio, pll5_video, pll6_mlb, pll7_usb_host, pll8_enet, ssi1_ipg,
- ssi2_ipg, ssi3_ipg, clk_max
+ ssi2_ipg, ssi3_ipg, rom,
+ clk_max
};
static struct clk *clk[clk_max];
static enum mx6q_clks const clks_init_on[] __initconst = {
- mmdc_ch0_axi, mmdc_ch1_axi,
+ mmdc_ch0_axi, rom,
};
int __init mx6q_clocks_init(void)
@@ -364,6 +365,7 @@ int __init mx6q_clocks_init(void)
clk[gpmi_bch] = imx_clk_gate2("gpmi_bch", "usdhc4", base + 0x78, 26);
clk[gpmi_io] = imx_clk_gate2("gpmi_io", "enfc", base + 0x78, 28);
clk[gpmi_apb] = imx_clk_gate2("gpmi_apb", "usdhc3", base + 0x78, 30);
+ clk[rom] = imx_clk_gate2("rom", "ahb", base + 0x7c, 0);
clk[sata] = imx_clk_gate2("sata", "ipg", base + 0x7c, 4);
clk[sdma] = imx_clk_gate2("sdma", "ahb", base + 0x7c, 6);
clk[spba] = imx_clk_gate2("spba", "ipg", base + 0x7c, 12);