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authorAnson Huang <Anson.Huang@nxp.com>2016-08-29 15:49:57 +0200
committerShawn Guo <shawnguo@kernel.org>2016-08-29 16:39:27 +0200
commit6ae44aa651d0d82097cb5379be94e86beade9c7b (patch)
treeff68da5891bbc5779908004ef2a01b4180791adc /arch/arm/mach-imx/cpuidle-imx6sx.c
parentARM: imx: rename imx6q_set_int_mem_clk_lpm() function (diff)
downloadlinux-6ae44aa651d0d82097cb5379be94e86beade9c7b.tar.xz
linux-6ae44aa651d0d82097cb5379be94e86beade9c7b.zip
ARM: imx: enable WAIT mode hardware workaround for imx6sx
Need to enable INT_MEM_CLK_LPM bit in CCM_CGPR for WAIT mode, without this bit set, if there is pending interrupt during ARM platform entering WAIT mode without power gating, cache data will be corrupted, this is a hardware workaround for WAIT mode and must be enabled. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch/arm/mach-imx/cpuidle-imx6sx.c')
-rw-r--r--arch/arm/mach-imx/cpuidle-imx6sx.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/mach-imx/cpuidle-imx6sx.c b/arch/arm/mach-imx/cpuidle-imx6sx.c
index 3c6672b3796b..261aaa45ff33 100644
--- a/arch/arm/mach-imx/cpuidle-imx6sx.c
+++ b/arch/arm/mach-imx/cpuidle-imx6sx.c
@@ -90,6 +90,7 @@ static struct cpuidle_driver imx6sx_cpuidle_driver = {
int __init imx6sx_cpuidle_init(void)
{
+ imx6_set_int_mem_clk_lpm(true);
imx6_enable_rbc(false);
/*
* set ARM power up/down timing to the fastest,