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authorAnson Huang <b20788@freescale.com>2014-06-23 10:42:44 +0200
committerShawn Guo <shawn.guo@freescale.com>2014-07-18 10:11:30 +0200
commit80c0ecdce802bd642dc7127cc77cea04e0a71bf5 (patch)
treed132b17db6e55bbf0539aa78ce137bbc44890273 /arch/arm/mach-imx/gpc.c
parentARM: imx: mem bit must be cleared before entering DSM mode (diff)
downloadlinux-80c0ecdce802bd642dc7127cc77cea04e0a71bf5.tar.xz
linux-80c0ecdce802bd642dc7127cc77cea04e0a71bf5.zip
ARM: imx: add standby mode support for suspend
Add standby mode support for suspend, to enter standby mode: echo standby > /sys/power/state; Use UART or RTC alarm to wake up system, when system enters standby mode, SOC will enter STOP mode with ARM core kept power on and 24M XTAL on. Signed-off-by: Anson Huang <b20788@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Diffstat (limited to 'arch/arm/mach-imx/gpc.c')
-rw-r--r--arch/arm/mach-imx/gpc.c5
1 files changed, 3 insertions, 2 deletions
diff --git a/arch/arm/mach-imx/gpc.c b/arch/arm/mach-imx/gpc.c
index 586e0171a652..82ea74e68482 100644
--- a/arch/arm/mach-imx/gpc.c
+++ b/arch/arm/mach-imx/gpc.c
@@ -27,13 +27,14 @@ static void __iomem *gpc_base;
static u32 gpc_wake_irqs[IMR_NUM];
static u32 gpc_saved_imrs[IMR_NUM];
-void imx_gpc_pre_suspend(void)
+void imx_gpc_pre_suspend(bool arm_power_off)
{
void __iomem *reg_imr1 = gpc_base + GPC_IMR1;
int i;
/* Tell GPC to power off ARM core when suspend */
- writel_relaxed(0x1, gpc_base + GPC_PGC_CPU_PDN);
+ if (arm_power_off)
+ writel_relaxed(0x1, gpc_base + GPC_PGC_CPU_PDN);
for (i = 0; i < IMR_NUM; i++) {
gpc_saved_imrs[i] = readl_relaxed(reg_imr1 + i * 4);