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authorShawn Guo <shawn.guo@freescale.com>2014-05-20 09:34:06 +0200
committerShawn Guo <shawn.guo@freescale.com>2014-07-18 10:10:09 +0200
commitff4ab2311a902e30cd579339a83679bab944e1bc (patch)
tree01a361eac48fd9d63b7591a8dee2fdc22f30925d /arch/arm/mach-imx/mach-imx51.c
parentARM: imx5: use dynamic mapping for Cortex and GPC block (diff)
downloadlinux-ff4ab2311a902e30cd579339a83679bab944e1bc.tar.xz
linux-ff4ab2311a902e30cd579339a83679bab944e1bc.zip
ARM: imx5: move init hooks into mach-imx5x.c
These imx5 init_early[late] hooks are called only from mach-imx5x.c. Let's move them into mach-imx5x.c. While at it, replace the static mapping in imx51_ipu_mipi_setup() with dynamic mapping. Also this function and imx_src_init() do not necessarily to be called at .init_early hook, so move them into .init_machine. The mxc_iomux_v3_init() is dropped from imx51_init_early() in the moving, since it's only needed by non-DT boot. Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Diffstat (limited to 'arch/arm/mach-imx/mach-imx51.c')
-rw-r--r--arch/arm/mach-imx/mach-imx51.c39
1 files changed, 39 insertions, 0 deletions
diff --git a/arch/arm/mach-imx/mach-imx51.c b/arch/arm/mach-imx/mach-imx51.c
index a849d432719a..a2027d298a3f 100644
--- a/arch/arm/mach-imx/mach-imx51.c
+++ b/arch/arm/mach-imx/mach-imx51.c
@@ -10,6 +10,7 @@
* http://www.gnu.org/copyleft/gpl.html
*/
+#include <linux/io.h>
#include <linux/irq.h>
#include <linux/of_irq.h>
#include <linux/of_platform.h>
@@ -17,18 +18,56 @@
#include <asm/mach/time.h>
#include "common.h"
+#include "hardware.h"
#include "mx51.h"
+static void __init imx51_init_early(void)
+{
+ mxc_set_cpu_type(MXC_CPU_MX51);
+}
+
+/*
+ * The MIPI HSC unit has been removed from the i.MX51 Reference Manual by
+ * the Freescale marketing division. However this did not remove the
+ * hardware from the chip which still needs to be configured for proper
+ * IPU support.
+ */
+#define MX51_MIPI_HSC_BASE 0x83fdc000
+static void __init imx51_ipu_mipi_setup(void)
+{
+ void __iomem *hsc_addr;
+
+ hsc_addr = ioremap(MX51_MIPI_HSC_BASE, SZ_16K);
+ WARN_ON(!hsc_addr);
+
+ /* setup MIPI module to legacy mode */
+ __raw_writel(0xf00, hsc_addr);
+
+ /* CSI mode: reserved; DI control mode: legacy (from Freescale BSP) */
+ __raw_writel(__raw_readl(hsc_addr + 0x800) | 0x30ff,
+ hsc_addr + 0x800);
+
+ iounmap(hsc_addr);
+}
+
static void __init imx51_dt_init(void)
{
struct platform_device_info devinfo = { .name = "cpufreq-cpu0", };
mxc_arch_reset_init_dt();
+ imx51_ipu_mipi_setup();
+ imx_src_init();
of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
platform_device_register_full(&devinfo);
}
+static void __init imx51_init_late(void)
+{
+ mx51_neon_fixup();
+ imx51_pm_init();
+}
+
static const char *imx51_dt_board_compat[] __initconst = {
"fsl,imx51",
NULL