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authorStefan Agner <stefan@agner.ch>2014-07-29 16:20:28 +0200
committerShawn Guo <shawn.guo@freescale.com>2014-09-16 04:06:44 +0200
commit3b18dd7a86f925951c8543339f8137a80fa40891 (patch)
tree3d965ec2c8d99298aeca339ec5a12f4376ecc4f9 /arch/arm/mach-imx/mach-imx6sx.c
parentARM: i.MX1: Add devicetree support (diff)
downloadlinux-3b18dd7a86f925951c8543339f8137a80fa40891.tar.xz
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ARM: imx: clk-vf610: introduce clks_init_on
At the end of the boot process, the clock framework might disable required main PLL's. So far, this was no issue since drivers requested clocks, which are descended of the main PLL's (e.g. pll1_pfd1, which provides the system clock). To archive the full 500MHz system clock, DDR clock need to be a descendant of PLL2 rather than PLL1 (DDRC_CLK_SEL set to 0). The bootloader sets up the clocks accordingly before making use of DDR at all. However, in Linux, there is no driver using PLL2, which lead to PLL2 being disabled by the clock framework. With this patch, we make sure that the main system clock and the DDR clock are initially enabled and are kept enabled. Signed-off-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Diffstat (limited to 'arch/arm/mach-imx/mach-imx6sx.c')
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