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| author | Grant Likely <grant.likely@secretlab.ca> | 2011-06-06 18:10:07 +0200 |
|---|---|---|
| committer | Grant Likely <grant.likely@secretlab.ca> | 2011-06-06 18:10:07 +0200 |
| commit | 8c31b1635b91e48f867e010cd7bcd06393e5858a (patch) | |
| tree | 4981add7e38e24724d255dedeb03f93be34d33ec /arch/arm/mach-imx/mm-imx27.c | |
| parent | gpio/pca953x.c: Interrupt pin is active-low (diff) | |
| parent | gpio/mxc: convert gpio-mxc to use basic_mmio_gpio library (diff) | |
| download | linux-8c31b1635b91e48f867e010cd7bcd06393e5858a.tar.xz linux-8c31b1635b91e48f867e010cd7bcd06393e5858a.zip | |
Merge branch 'gpio/next-mx' into gpio/next
Diffstat (limited to 'arch/arm/mach-imx/mm-imx27.c')
| -rw-r--r-- | arch/arm/mach-imx/mm-imx27.c | 21 |
1 files changed, 10 insertions, 11 deletions
diff --git a/arch/arm/mach-imx/mm-imx27.c b/arch/arm/mach-imx/mm-imx27.c index a6761a39f08c..d3700cec8ec5 100644 --- a/arch/arm/mach-imx/mm-imx27.c +++ b/arch/arm/mach-imx/mm-imx27.c @@ -24,7 +24,6 @@ #include <mach/common.h> #include <asm/pgtable.h> #include <asm/mach/map.h> -#include <mach/gpio.h> #include <mach/irqs.h> #include <mach/iomux-v1.h> @@ -70,17 +69,17 @@ void __init imx27_init_early(void) MX27_NUM_GPIO_PORT); } -static struct mxc_gpio_port imx27_gpio_ports[] = { - DEFINE_IMX_GPIO_PORT_IRQ(MX27, 0, 1, MX27_INT_GPIO), - DEFINE_IMX_GPIO_PORT(MX27, 1, 2), - DEFINE_IMX_GPIO_PORT(MX27, 2, 3), - DEFINE_IMX_GPIO_PORT(MX27, 3, 4), - DEFINE_IMX_GPIO_PORT(MX27, 4, 5), - DEFINE_IMX_GPIO_PORT(MX27, 5, 6), -}; - void __init mx27_init_irq(void) { mxc_init_irq(MX27_IO_ADDRESS(MX27_AVIC_BASE_ADDR)); - mxc_gpio_init(imx27_gpio_ports, ARRAY_SIZE(imx27_gpio_ports)); +} + +void __init imx27_soc_init(void) +{ + mxc_register_gpio(0, MX27_GPIO1_BASE_ADDR, SZ_4K, MX27_INT_GPIO, 0); + mxc_register_gpio(1, MX27_GPIO2_BASE_ADDR, SZ_4K, MX27_INT_GPIO, 0); + mxc_register_gpio(2, MX27_GPIO3_BASE_ADDR, SZ_4K, MX27_INT_GPIO, 0); + mxc_register_gpio(3, MX27_GPIO4_BASE_ADDR, SZ_4K, MX27_INT_GPIO, 0); + mxc_register_gpio(4, MX27_GPIO5_BASE_ADDR, SZ_4K, MX27_INT_GPIO, 0); + mxc_register_gpio(5, MX27_GPIO6_BASE_ADDR, SZ_4K, MX27_INT_GPIO, 0); } |