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| author | Anson Huang <b20788@freescale.com> | 2014-12-17 05:23:19 +0100 |
|---|---|---|
| committer | Shawn Guo <shawn.guo@linaro.org> | 2015-01-05 14:33:47 +0100 |
| commit | df096fde0889a7a624fcc9616ff5ebd7446d131e (patch) | |
| tree | a026e1aaead01f724b011f9d0e0702d391aa461a /arch/arm/mach-imx/pm-imx6.c | |
| parent | ARM: imx: correct the hardware clock gate setting for shared nodes (diff) | |
| download | linux-df096fde0889a7a624fcc9616ff5ebd7446d131e.tar.xz linux-df096fde0889a7a624fcc9616ff5ebd7446d131e.zip | |
ARM: imx: remove unnecessary setting for DSM
Now we support DSM in OCRAM for all i.MX6 SoCs,
the resume entry point is set in asm code of
suspend-imx6.S, so no need to set the resume
entry point for SRC in pre-suspend flow.
Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Diffstat (limited to 'arch/arm/mach-imx/pm-imx6.c')
| -rw-r--r-- | arch/arm/mach-imx/pm-imx6.c | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/arch/arm/mach-imx/pm-imx6.c b/arch/arm/mach-imx/pm-imx6.c index 5d2c1bd5f5ef..661ffcf1031e 100644 --- a/arch/arm/mach-imx/pm-imx6.c +++ b/arch/arm/mach-imx/pm-imx6.c @@ -362,7 +362,6 @@ static int imx6q_pm_enter(suspend_state_t state) imx6q_enable_rbc(true); imx_gpc_pre_suspend(true); imx_anatop_pre_suspend(); - imx_set_cpu_jump(0, v7_cpu_resume); /* Zzz ... */ cpu_suspend(0, imx6q_suspend_finish); if (cpu_is_imx6q() || cpu_is_imx6dl()) |