diff options
| author | Anson Huang <b20788@freescale.com> | 2014-06-23 10:42:44 +0200 |
|---|---|---|
| committer | Shawn Guo <shawn.guo@freescale.com> | 2014-07-18 10:11:30 +0200 |
| commit | 80c0ecdce802bd642dc7127cc77cea04e0a71bf5 (patch) | |
| tree | d132b17db6e55bbf0539aa78ce137bbc44890273 /arch/arm/mach-imx/pm-imx6.c | |
| parent | ARM: imx: mem bit must be cleared before entering DSM mode (diff) | |
| download | linux-80c0ecdce802bd642dc7127cc77cea04e0a71bf5.tar.xz linux-80c0ecdce802bd642dc7127cc77cea04e0a71bf5.zip | |
ARM: imx: add standby mode support for suspend
Add standby mode support for suspend, to enter standby mode:
echo standby > /sys/power/state;
Use UART or RTC alarm to wake up system, when system enters
standby mode, SOC will enter STOP mode with ARM core kept
power on and 24M XTAL on.
Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Diffstat (limited to 'arch/arm/mach-imx/pm-imx6.c')
| -rw-r--r-- | arch/arm/mach-imx/pm-imx6.c | 30 |
1 files changed, 28 insertions, 2 deletions
diff --git a/arch/arm/mach-imx/pm-imx6.c b/arch/arm/mach-imx/pm-imx6.c index b3c770d0cc3f..5c3af8f993d0 100644 --- a/arch/arm/mach-imx/pm-imx6.c +++ b/arch/arm/mach-imx/pm-imx6.c @@ -274,6 +274,14 @@ int imx6q_set_lpm(enum mxc_cpu_pwr_mode mode) break; case STOP_POWER_ON: val |= 0x2 << BP_CLPCR_LPM; + val &= ~BM_CLPCR_VSTBY; + val &= ~BM_CLPCR_SBYOS; + if (cpu_is_imx6sl()) + val |= BM_CLPCR_BYPASS_PMIC_READY; + if (cpu_is_imx6sl() || cpu_is_imx6sx()) + val |= BM_CLPCR_BYP_MMDC_CH0_LPM_HS; + else + val |= BM_CLPCR_BYP_MMDC_CH1_LPM_HS; break; case WAIT_UNCLOCKED_POWER_OFF: val |= 0x1 << BP_CLPCR_LPM; @@ -334,6 +342,19 @@ static int imx6q_suspend_finish(unsigned long val) static int imx6q_pm_enter(suspend_state_t state) { switch (state) { + case PM_SUSPEND_STANDBY: + imx6q_set_lpm(STOP_POWER_ON); + imx6q_set_int_mem_clk_lpm(true); + imx_gpc_pre_suspend(false); + if (cpu_is_imx6sl()) + imx6sl_set_wait_clk(true); + /* Zzz ... */ + cpu_do_idle(); + if (cpu_is_imx6sl()) + imx6sl_set_wait_clk(false); + imx_gpc_post_resume(); + imx6q_set_lpm(WAIT_CLOCKED); + break; case PM_SUSPEND_MEM: imx6q_set_lpm(STOP_POWER_OFF); imx6q_set_int_mem_clk_lpm(false); @@ -344,7 +365,7 @@ static int imx6q_pm_enter(suspend_state_t state) */ if (!imx6_suspend_in_ocram_fn) imx6q_enable_rbc(true); - imx_gpc_pre_suspend(); + imx_gpc_pre_suspend(true); imx_anatop_pre_suspend(); imx_set_cpu_jump(0, v7_cpu_resume); /* Zzz ... */ @@ -365,9 +386,14 @@ static int imx6q_pm_enter(suspend_state_t state) return 0; } +static int imx6q_pm_valid(suspend_state_t state) +{ + return (state == PM_SUSPEND_STANDBY || state == PM_SUSPEND_MEM); +} + static const struct platform_suspend_ops imx6q_pm_ops = { .enter = imx6q_pm_enter, - .valid = suspend_valid_only_mem, + .valid = imx6q_pm_valid, }; void __init imx6q_pm_set_ccm_base(void __iomem *base) |