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authorOlof Johansson <olof@lixom.net>2016-08-26 02:21:37 +0200
committerOlof Johansson <olof@lixom.net>2016-08-26 02:21:37 +0200
commit1ce3b12f43558d8f73dab57d58a89fdcdaaff997 (patch)
tree56a5bbc8e2657ad95b687f7b825afdc80d980394 /arch/arm/mach-imx
parentMAINTAINERS: add tree entry for ARM/UniPhier architecture (diff)
parentARM: imx6ul: populates platform device at .init_machine (diff)
downloadlinux-1ce3b12f43558d8f73dab57d58a89fdcdaaff997.tar.xz
linux-1ce3b12f43558d8f73dab57d58a89fdcdaaff997.zip
Merge tag 'imx-fixes-4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into fixes
The i.MX fixes for 4.8: - Fix typo in imx6sx-sabreauto board wakeup property - Fix i.MX6UL suspend-to-standby support by adding the BM_CLPCR_BYP_MMDC_CH0_LPM_HS handling - Fix a i.MX6UL regression on suspend support, which is caused by commit 850bea2335e4 ("arm: Remove unnecessary of_platform_populate with default match table") * tag 'imx-fixes-4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: ARM: imx6ul: populates platform device at .init_machine ARM: imx6: add missing BM_CLPCR_BYP_MMDC_CH0_LPM_HS setting for imx6ul ARM: dts: imx6sx-sabreauto: Fix misspelled property Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch/arm/mach-imx')
-rw-r--r--arch/arm/mach-imx/mach-imx6ul.c1
-rw-r--r--arch/arm/mach-imx/pm-imx6.c2
2 files changed, 2 insertions, 1 deletions
diff --git a/arch/arm/mach-imx/mach-imx6ul.c b/arch/arm/mach-imx/mach-imx6ul.c
index 5d9bfab279dd..6bb7d9cf1e38 100644
--- a/arch/arm/mach-imx/mach-imx6ul.c
+++ b/arch/arm/mach-imx/mach-imx6ul.c
@@ -64,6 +64,7 @@ static void __init imx6ul_init_machine(void)
if (parent == NULL)
pr_warn("failed to initialize soc device\n");
+ of_platform_default_populate(NULL, NULL, parent);
imx6ul_enet_init();
imx_anatop_init();
imx6ul_pm_init();
diff --git a/arch/arm/mach-imx/pm-imx6.c b/arch/arm/mach-imx/pm-imx6.c
index 58924b3844df..67bab74fcbc5 100644
--- a/arch/arm/mach-imx/pm-imx6.c
+++ b/arch/arm/mach-imx/pm-imx6.c
@@ -295,7 +295,7 @@ int imx6_set_lpm(enum mxc_cpu_pwr_mode mode)
val &= ~BM_CLPCR_SBYOS;
if (cpu_is_imx6sl())
val |= BM_CLPCR_BYPASS_PMIC_READY;
- if (cpu_is_imx6sl() || cpu_is_imx6sx())
+ if (cpu_is_imx6sl() || cpu_is_imx6sx() || cpu_is_imx6ul())
val |= BM_CLPCR_BYP_MMDC_CH0_LPM_HS;
else
val |= BM_CLPCR_BYP_MMDC_CH1_LPM_HS;