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authorStefan Agner <stefan@agner.ch>2019-04-11 01:14:12 +0200
committerShawn Guo <shawnguo@kernel.org>2019-11-04 01:25:56 +0100
commitd7eb28d2740f6d4b485a32b0330a8168eaebb636 (patch)
treecae4171f4bab7469470360ff238e574c8c76498c /arch/arm/mach-imx
parentARM: imx: Add serial number support for i.MX6/7 SoCs (diff)
downloadlinux-d7eb28d2740f6d4b485a32b0330a8168eaebb636.tar.xz
linux-d7eb28d2740f6d4b485a32b0330a8168eaebb636.zip
ARM: imx: use generic function to exit coherency
The common ARM architecture code provides a generic function to exit coherency called v7_exit_coherency_flush(). Replace the machine specific implementation using the generic function. Tested on a i.MX 6Dual by hotplugging the secondary CPU under load through sysfs several 1000 times. Tested-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch/arm/mach-imx')
-rw-r--r--arch/arm/mach-imx/hotplug.c24
1 files changed, 2 insertions, 22 deletions
diff --git a/arch/arm/mach-imx/hotplug.c b/arch/arm/mach-imx/hotplug.c
index 089d11ffaa3e..82e22398d43d 100644
--- a/arch/arm/mach-imx/hotplug.c
+++ b/arch/arm/mach-imx/hotplug.c
@@ -6,32 +6,12 @@
#include <linux/errno.h>
#include <linux/jiffies.h>
+#include <asm/cacheflush.h>
#include <asm/cp15.h>
#include <asm/proc-fns.h>
#include "common.h"
-static inline void cpu_enter_lowpower(void)
-{
- unsigned int v;
-
- asm volatile(
- "mcr p15, 0, %1, c7, c5, 0\n"
- " mcr p15, 0, %1, c7, c10, 4\n"
- /*
- * Turn off coherency
- */
- " mrc p15, 0, %0, c1, c0, 1\n"
- " bic %0, %0, %3\n"
- " mcr p15, 0, %0, c1, c0, 1\n"
- " mrc p15, 0, %0, c1, c0, 0\n"
- " bic %0, %0, %2\n"
- " mcr p15, 0, %0, c1, c0, 0\n"
- : "=&r" (v)
- : "r" (0), "Ir" (CR_C), "Ir" (0x40)
- : "cc");
-}
-
/*
* platform-specific code to shutdown a CPU
*
@@ -39,7 +19,7 @@ static inline void cpu_enter_lowpower(void)
*/
void imx_cpu_die(unsigned int cpu)
{
- cpu_enter_lowpower();
+ v7_exit_coherency_flush(louis);
/*
* We use the cpu jumping argument register to sync with
* imx_cpu_kill() which is running on cpu0 and waiting for