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author | Arnd Bergmann <arnd@arndb.de> | 2014-04-15 20:38:32 +0200 |
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committer | Arnd Bergmann <arnd@arndb.de> | 2015-12-01 21:44:30 +0100 |
commit | b501fd7b1c0f10d3967d3abbd6c9d091b3384999 (patch) | |
tree | 105508f3767a356ef517360fd0e58eb9d34a1e6f /arch/arm/mach-mmp/addr-map.h | |
parent | ARM: mmp: make plat-pxa build standalone (diff) | |
download | linux-b501fd7b1c0f10d3967d3abbd6c9d091b3384999.tar.xz linux-b501fd7b1c0f10d3967d3abbd6c9d091b3384999.zip |
ARM: mmp: make all header files local
The mach/*.h headers are now inaccessible to any external code,
so we can move them all into the mach-mmp directory itself
and remove the subdirectories.
A few headers are not used at all, so we remove them here.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm/mach-mmp/addr-map.h')
-rw-r--r-- | arch/arm/mach-mmp/addr-map.h | 44 |
1 files changed, 44 insertions, 0 deletions
diff --git a/arch/arm/mach-mmp/addr-map.h b/arch/arm/mach-mmp/addr-map.h new file mode 100644 index 000000000000..2739d27bc89d --- /dev/null +++ b/arch/arm/mach-mmp/addr-map.h @@ -0,0 +1,44 @@ +/* + * Common address map definitions + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __ASM_MACH_ADDR_MAP_H +#define __ASM_MACH_ADDR_MAP_H + +/* APB - Application Subsystem Peripheral Bus + * + * NOTE: the DMA controller registers are actually on the AXI fabric #1 + * slave port to AHB/APB bridge, due to its close relationship to those + * peripherals on APB, let's count it into the ABP mapping area. + */ +#define APB_PHYS_BASE 0xd4000000 +#define APB_VIRT_BASE IOMEM(0xfe000000) +#define APB_PHYS_SIZE 0x00200000 + +#define AXI_PHYS_BASE 0xd4200000 +#define AXI_VIRT_BASE IOMEM(0xfe200000) +#define AXI_PHYS_SIZE 0x00200000 + +/* Static Memory Controller - Chip Select 0 and 1 */ +#define SMC_CS0_PHYS_BASE 0x80000000 +#define SMC_CS0_PHYS_SIZE 0x10000000 +#define SMC_CS1_PHYS_BASE 0x90000000 +#define SMC_CS1_PHYS_SIZE 0x10000000 + +#define APMU_VIRT_BASE (AXI_VIRT_BASE + 0x82800) +#define APMU_REG(x) (APMU_VIRT_BASE + (x)) + +#define APBC_VIRT_BASE (APB_VIRT_BASE + 0x015000) +#define APBC_REG(x) (APBC_VIRT_BASE + (x)) + +#define MPMU_VIRT_BASE (APB_VIRT_BASE + 0x50000) +#define MPMU_REG(x) (MPMU_VIRT_BASE + (x)) + +#define CIU_VIRT_BASE (AXI_VIRT_BASE + 0x82c00) +#define CIU_REG(x) (CIU_VIRT_BASE + (x)) + +#endif /* __ASM_MACH_ADDR_MAP_H */ |