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authorHaojian Zhuang <haojian.zhuang@marvell.com>2010-04-28 17:43:00 +0200
committerEric Miao <eric.y.miao@gmail.com>2010-05-11 17:25:05 +0200
commit55d3936d30affccb904f9294a3076ccb7bf09688 (patch)
treee3252bb1df538d8bf715ed777971df1ee6ceab60 /arch/arm/mach-mmp/include
parent[ARM] mmp: update mmp2 defconfig (diff)
downloadlinux-55d3936d30affccb904f9294a3076ccb7bf09688.tar.xz
linux-55d3936d30affccb904f9294a3076ccb7bf09688.zip
[ARM] mmp: configure gpio pins from 128 to 192
In mmp2, 6 banks of GPIO registers are supported. So we can support 192 GPIO pins at most. Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
Diffstat (limited to 'arch/arm/mach-mmp/include')
-rw-r--r--arch/arm/mach-mmp/include/mach/gpio.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-mmp/include/mach/gpio.h b/arch/arm/mach-mmp/include/mach/gpio.h
index ab26d13295c4..ee8b02ed8011 100644
--- a/arch/arm/mach-mmp/include/mach/gpio.h
+++ b/arch/arm/mach-mmp/include/mach/gpio.h
@@ -10,7 +10,7 @@
#define BANK_OFF(n) (((n) < 3) ? (n) << 2 : 0x100 + (((n) - 3) << 2))
#define GPIO_REG(x) (*((volatile u32 *)(GPIO_REGS_VIRT + (x))))
-#define NR_BUILTIN_GPIO (128)
+#define NR_BUILTIN_GPIO (192)
#define gpio_to_bank(gpio) ((gpio) >> 5)
#define gpio_to_irq(gpio) (IRQ_GPIO_START + (gpio))