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authorEric Miao <eric.y.miao@gmail.com>2010-01-05 08:06:37 +0100
committerEric Miao <eric.y.miao@gmail.com>2010-03-02 00:40:54 +0100
commit978da5bcdb33f6e030fa3304662e2455a018f1b0 (patch)
treef1c64a707f1d7dc08ca3c416052ffaa4c937a2f2 /arch/arm/mach-mmp/irq-pxa168.c
parent[ARM] mmp: update pxa168_defconfig and include avengers lite support (diff)
downloadlinux-978da5bcdb33f6e030fa3304662e2455a018f1b0.tar.xz
linux-978da5bcdb33f6e030fa3304662e2455a018f1b0.zip
[ARM] mmp: rename irq.c to irq-pxa168.c to allow other SoC IRQ chips
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
Diffstat (limited to 'arch/arm/mach-mmp/irq-pxa168.c')
-rw-r--r--arch/arm/mach-mmp/irq-pxa168.c55
1 files changed, 55 insertions, 0 deletions
diff --git a/arch/arm/mach-mmp/irq-pxa168.c b/arch/arm/mach-mmp/irq-pxa168.c
new file mode 100644
index 000000000000..52ff2f065eba
--- /dev/null
+++ b/arch/arm/mach-mmp/irq-pxa168.c
@@ -0,0 +1,55 @@
+/*
+ * linux/arch/arm/mach-mmp/irq.c
+ *
+ * Generic IRQ handling, GPIO IRQ demultiplexing, etc.
+ *
+ * Author: Bin Yang <bin.yang@marvell.com>
+ * Created: Sep 30, 2008
+ * Copyright: Marvell International Ltd.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/init.h>
+#include <linux/irq.h>
+#include <linux/io.h>
+
+#include <mach/regs-icu.h>
+
+#include "common.h"
+
+#define IRQ_ROUTE_TO_AP (ICU_INT_CONF_AP_INT | ICU_INT_CONF_IRQ)
+
+#define PRIORITY_DEFAULT 0x1
+#define PRIORITY_NONE 0x0 /* means IRQ disabled */
+
+static void icu_mask_irq(unsigned int irq)
+{
+ __raw_writel(PRIORITY_NONE, ICU_INT_CONF(irq));
+}
+
+static void icu_unmask_irq(unsigned int irq)
+{
+ __raw_writel(IRQ_ROUTE_TO_AP | PRIORITY_DEFAULT, ICU_INT_CONF(irq));
+}
+
+static struct irq_chip icu_irq_chip = {
+ .name = "icu_irq",
+ .ack = icu_mask_irq,
+ .mask = icu_mask_irq,
+ .unmask = icu_unmask_irq,
+};
+
+void __init icu_init_irq(void)
+{
+ int irq;
+
+ for (irq = 0; irq < 64; irq++) {
+ icu_mask_irq(irq);
+ set_irq_chip(irq, &icu_irq_chip);
+ set_irq_handler(irq, handle_level_irq);
+ set_irq_flags(irq, IRQF_VALID);
+ }
+}