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authorHaojian Zhuang <haojian.zhuang@marvell.com>2010-04-28 16:59:45 +0200
committerEric Miao <eric.y.miao@gmail.com>2010-05-11 17:25:04 +0200
commit66b196475031c748a5861390a4fadb915e14ccdc (patch)
treeeaad4bcc929f4a744bc41c6fe739ef5278105031 /arch/arm/mach-mmp/mmp2.c
parent[ARM] mmp: update clock register function (diff)
downloadlinux-66b196475031c748a5861390a4fadb915e14ccdc.tar.xz
linux-66b196475031c748a5861390a4fadb915e14ccdc.zip
[ARM] mmp: enable L2 in mmp2
Enable Tauros2 L2 in mmp2. Tauros2 L2 is shared in Marvell ARM cores. Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
Diffstat (limited to 'arch/arm/mach-mmp/mmp2.c')
-rw-r--r--arch/arm/mach-mmp/mmp2.c5
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm/mach-mmp/mmp2.c b/arch/arm/mach-mmp/mmp2.c
index cca39929110f..e236ec0c54f6 100644
--- a/arch/arm/mach-mmp/mmp2.c
+++ b/arch/arm/mach-mmp/mmp2.c
@@ -15,6 +15,8 @@
#include <linux/init.h>
#include <linux/io.h>
+#include <asm/hardware/cache-tauros2.h>
+
#include <mach/addr-map.h>
#include <mach/regs-apbc.h>
#include <mach/regs-apmu.h>
@@ -99,6 +101,9 @@ static struct clk_lookup mmp2_clkregs[] = {
static int __init mmp2_init(void)
{
if (cpu_is_mmp2()) {
+#ifdef CONFIG_CACHE_TAUROS2
+ tauros2_init();
+#endif
mfp_init_base(MFPR_VIRT_BASE);
mfp_init_addr(mmp2_addr_map);
clkdev_add_table(ARRAY_AND_SIZE(mmp2_clkregs));