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| author | Stepan Moskovchenko <stepanm@codeaurora.org> | 2011-03-01 01:04:56 +0100 |
|---|---|---|
| committer | David Brown <davidb@codeaurora.org> | 2011-03-08 23:42:31 +0100 |
| commit | c7831df3937f54bddc20128892a75373549516d0 (patch) | |
| tree | f08ba68191ec24b5d8572bb3cfe1de3ca69ad9a5 /arch/arm/mach-msm/Kconfig | |
| parent | msm: iommu: Don't read from write-only registers (diff) | |
| download | linux-c7831df3937f54bddc20128892a75373549516d0.tar.xz linux-c7831df3937f54bddc20128892a75373549516d0.zip | |
msm: iommu: Enable HTW L2 redirection on MSM8960
Allow the MSM8960 IOMMU to access its page tables directly
through the L2 cache.
Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
Diffstat (limited to 'arch/arm/mach-msm/Kconfig')
| -rw-r--r-- | arch/arm/mach-msm/Kconfig | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-msm/Kconfig b/arch/arm/mach-msm/Kconfig index 997c5bda8c18..1516896e8d17 100644 --- a/arch/arm/mach-msm/Kconfig +++ b/arch/arm/mach-msm/Kconfig @@ -162,7 +162,7 @@ config MSM_IOMMU config IOMMU_PGTABLES_L2 def_bool y - depends on ARCH_MSM8X60 && MMU && SMP && CPU_DCACHE_DISABLE=n + depends on MSM_IOMMU && MMU && SMP && CPU_DCACHE_DISABLE=n config MSM_DEBUG_UART int |