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| author | Gregory CLEMENT <gregory.clement@free-electrons.com> | 2014-07-23 15:00:41 +0200 |
|---|---|---|
| committer | Jason Cooper <jason@lakedaemon.net> | 2014-07-24 13:46:10 +0200 |
| commit | 305969fb629284bcd35065911179a79f41954b9a (patch) | |
| tree | 90ef06b2ed317cd70d16824e8110c59d5845b045 /arch/arm/mach-mvebu/headsmp-a9.S | |
| parent | ARM: mvebu: add a common function for the boot address work around (diff) | |
| download | linux-305969fb629284bcd35065911179a79f41954b9a.tar.xz linux-305969fb629284bcd35065911179a79f41954b9a.zip | |
ARM: mvebu: use the common function for Armada 375 SMP workaround
Use the common function mvebu_setup_boot_addr_wa() introduced in the
commit "ARM: mvebu: Add a common function for the boot address work
around" instead of the dedicated version for Armada 375.
This commit also moves the workaround in the system-controller
module. Indeed the workaround on 375 is really related to setting the
boot address which is done by the system controller.
As a bonus we no longer use an harcoded value to access the register
storing the boot address.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Link: https://lkml.kernel.org/r/1406120453-29291-5-git-send-email-thomas.petazzoni@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Diffstat (limited to 'arch/arm/mach-mvebu/headsmp-a9.S')
| -rw-r--r-- | arch/arm/mach-mvebu/headsmp-a9.S | 15 |
1 files changed, 0 insertions, 15 deletions
diff --git a/arch/arm/mach-mvebu/headsmp-a9.S b/arch/arm/mach-mvebu/headsmp-a9.S index da5bb292b91c..be51c998c0cd 100644 --- a/arch/arm/mach-mvebu/headsmp-a9.S +++ b/arch/arm/mach-mvebu/headsmp-a9.S @@ -18,21 +18,6 @@ #include <asm/assembler.h> __CPUINIT -#define CPU_RESUME_ADDR_REG 0xf10182d4 - -.global armada_375_smp_cpu1_enable_code_start -.global armada_375_smp_cpu1_enable_code_end - -armada_375_smp_cpu1_enable_code_start: -ARM_BE8(setend be) - adr r0, 1f - ldr r0, [r0] - ldr r1, [r0] -ARM_BE8(rev r1, r1) - mov pc, r1 -1: - .word CPU_RESUME_ADDR_REG -armada_375_smp_cpu1_enable_code_end: ENTRY(mvebu_cortex_a9_secondary_startup) ARM_BE8(setend be) |