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author | Thomas Petazzoni <thomas.petazzoni@free-electrons.com> | 2014-04-14 15:53:58 +0200 |
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committer | Jason Cooper <jason@lakedaemon.net> | 2014-05-08 18:07:37 +0200 |
commit | 05ad690608098b469d6052c700d96c35e697a955 (patch) | |
tree | bf9cccb0090608a1f75cff887183983c65cb5735 /arch/arm/mach-mvebu/platsmp.c | |
parent | Merge branch 'mvebu/soc-pmsu' into mvebu/soc (diff) | |
download | linux-05ad690608098b469d6052c700d96c35e697a955.tar.xz linux-05ad690608098b469d6052c700d96c35e697a955.zip |
ARM: mvebu: move Armada XP specific SMP initialization to platsmp.c
The pmsu.c driver contained an armada_xp_boot_cpu() function that sets
the boot address of a secondary CPUs and deasserts the reset. However,
the Armada 375 needs a slightly different logic, so it makes more
sense to move this code into the Armada XP specific platsmp.c.
In order to achieve this, the mvebu_pmsu_set_cpu_boot_addr() function
is exported. It will be needed for both the Armada XP and Armada 38x
SMP implementations.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Link: https://lkml.kernel.org/r/1397483648-26611-2-git-send-email-thomas.petazzoni@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Diffstat (limited to 'arch/arm/mach-mvebu/platsmp.c')
-rw-r--r-- | arch/arm/mach-mvebu/platsmp.c | 10 |
1 files changed, 9 insertions, 1 deletions
diff --git a/arch/arm/mach-mvebu/platsmp.c b/arch/arm/mach-mvebu/platsmp.c index a6da03f5b24e..e98075f7175a 100644 --- a/arch/arm/mach-mvebu/platsmp.c +++ b/arch/arm/mach-mvebu/platsmp.c @@ -77,9 +77,17 @@ static void armada_xp_secondary_init(unsigned int cpu) static int armada_xp_boot_secondary(unsigned int cpu, struct task_struct *idle) { + int ret, hw_cpu; + pr_info("Booting CPU %d\n", cpu); - armada_xp_boot_cpu(cpu, armada_xp_secondary_startup); + hw_cpu = cpu_logical_map(cpu); + mvebu_pmsu_set_cpu_boot_addr(hw_cpu, armada_xp_secondary_startup); + ret = mvebu_cpu_reset_deassert(hw_cpu); + if (ret) { + pr_warn("unable to boot CPU: %d\n", ret); + return ret; + } return 0; } |