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authorThomas Petazzoni <thomas.petazzoni@free-electrons.com>2015-06-16 14:12:57 +0200
committerGregory CLEMENT <gregory.clement@free-electrons.com>2015-06-17 17:23:36 +0200
commit2f5bc307be2480ba89e4c5d118f406f04a4a7299 (patch)
treecb54687d81888c61ef79d83bf4b9f1fb7e19d549 /arch/arm/mach-mvebu/pm-board.c
parentRevert "bus: mvebu-mbus: make sure SDRAM CS for DMA don't overlap the MBus br... (diff)
downloadlinux-2f5bc307be2480ba89e4c5d118f406f04a4a7299.tar.xz
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ARM: mvebu: fix suspend to RAM on big-endian configurations
The current Armada XP suspend to RAM implementation, as added in commit 27432825ae19f ("ARM: mvebu: Armada XP GP specific suspend/resume code") does not handle big-endian configurations properly: the small bit of assembly code putting the DRAM in self-refresh and toggling the GPIOs to turn off power forgets to convert the values to little-endian. This commit fixes that by making sure the two values we will write to the DRAM controller register and GPIO register are already in little-endian before entering the critical assembly code. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Cc: <stable@vger.kernel.org> # v3.19+ Fixes: 27432825ae19f ("ARM: mvebu: Armada XP GP specific suspend/resume code")
Diffstat (limited to 'arch/arm/mach-mvebu/pm-board.c')
-rw-r--r--arch/arm/mach-mvebu/pm-board.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/arm/mach-mvebu/pm-board.c b/arch/arm/mach-mvebu/pm-board.c
index 6dfd4ab97b2a..301ab38d38ba 100644
--- a/arch/arm/mach-mvebu/pm-board.c
+++ b/arch/arm/mach-mvebu/pm-board.c
@@ -43,6 +43,9 @@ static void mvebu_armada_xp_gp_pm_enter(void __iomem *sdram_reg, u32 srcmd)
for (i = 0; i < ARMADA_XP_GP_PIC_NR_GPIOS; i++)
ackcmd |= BIT(pic_raw_gpios[i]);
+ srcmd = cpu_to_le32(srcmd);
+ ackcmd = cpu_to_le32(ackcmd);
+
/*
* Wait a while, the PIC needs quite a bit of time between the
* two GPIO commands.