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authorUwe Kleine-König <u.kleine-koenig@pengutronix.de>2009-12-09 11:32:11 +0100
committerUwe Kleine-König <u.kleine-koenig@pengutronix.de>2010-01-05 10:10:07 +0100
commit3f35d1f5e4507ea4eb7ff5feaf624737c1b47631 (patch)
tree8c444567dc9c3f31fd991bb1eac92031b08c3f8a /arch/arm/mach-mx2/clock_imx21.c
parentimx/clock-imx27: use a macro to define registers (diff)
downloadlinux-3f35d1f5e4507ea4eb7ff5feaf624737c1b47631.tar.xz
linux-3f35d1f5e4507ea4eb7ff5feaf624737c1b47631.zip
imx/mach-mx2: use constants namespaced by the corresponding SOC (easy part)
This just leaves devices.c, generic.c and serial.c to clean up. As these files are used on more than one SOC they need some more work. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Cc: Holger Schurig <hs4233@mail.mn-solutions.de> Cc: Rabin Vincent <rabin@rab.in> Cc: Javier Martin <javier.martin@vista-silicon.com> Cc: Valentin Longchamp <valentin.longchamp@epfl.ch> Cc: Jean Delvare <khali@linux-fr.org> Cc: Eric Benard <eric@eukrea.com> Cc: Ivo Clarysse <ivo.clarysse@gmail.com> Cc: Vladimir Barinov <vbarinov@embeddedalley.com> Cc: Daniel Schaeffer <daniel.schaeffer@timesys.com> Cc: Simon POLETTE <spolette@adnlysd018.(none)> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Alan Carvalho de Assis <acassis@gmail.com> Cc: Luotao Fu <l.fu@pengutronix.de>
Diffstat (limited to 'arch/arm/mach-mx2/clock_imx21.c')
-rw-r--r--arch/arm/mach-mx2/clock_imx21.c5
1 files changed, 3 insertions, 2 deletions
diff --git a/arch/arm/mach-mx2/clock_imx21.c b/arch/arm/mach-mx2/clock_imx21.c
index 1922e531ba46..6ab3c729a456 100644
--- a/arch/arm/mach-mx2/clock_imx21.c
+++ b/arch/arm/mach-mx2/clock_imx21.c
@@ -28,7 +28,7 @@
#include <asm/clkdev.h>
#include <asm/div64.h>
-#define IO_ADDR_CCM(off) (IO_ADDRESS(CCM_BASE_ADDR) + (off))
+#define IO_ADDR_CCM(off) (IO_ADDRESS(MX21_CCM_BASE_ADDR) + (off))
/* Register offsets */
#define CCM_CSCR IO_ADDR_CCM(0x0)
@@ -1235,6 +1235,7 @@ int __init mx21_clocks_init(unsigned long lref, unsigned long href)
clk_enable(&uart_clk[0]);
#endif
- mxc_timer_init(&gpt_clk[0], IO_ADDRESS(GPT1_BASE_ADDR), MXC_INT_GPT1);
+ mxc_timer_init(&gpt_clk[0], IO_ADDRESS(MX21_GPT1_BASE_ADDR),
+ MX21_INT_GPT1);
return 0;
}