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author | Mark Brown <broonie@opensource.wolfsonmicro.com> | 2010-03-22 12:17:26 +0100 |
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committer | Mark Brown <broonie@opensource.wolfsonmicro.com> | 2010-03-22 12:17:26 +0100 |
commit | f9b44121b34174ae4f243a568393fc3225842e75 (patch) | |
tree | 943f68cd7458d08a9e8809ed0a10b71b23911f3e /arch/arm/mach-mx3/mx31moboard-devboard.c | |
parent | ASoC: pxa-pcm-lib: initialize DMA channel to -1 (diff) | |
parent | Linux 2.6.34-rc2 (diff) | |
download | linux-f9b44121b34174ae4f243a568393fc3225842e75.tar.xz linux-f9b44121b34174ae4f243a568393fc3225842e75.zip |
Merge commit 'v2.6.34-rc2' into for-2.6.34
Diffstat (limited to 'arch/arm/mach-mx3/mx31moboard-devboard.c')
-rw-r--r-- | arch/arm/mach-mx3/mx31moboard-devboard.c | 32 |
1 files changed, 32 insertions, 0 deletions
diff --git a/arch/arm/mach-mx3/mx31moboard-devboard.c b/arch/arm/mach-mx3/mx31moboard-devboard.c index 438428eaf769..9fbad2eb3a49 100644 --- a/arch/arm/mach-mx3/mx31moboard-devboard.c +++ b/arch/arm/mach-mx3/mx31moboard-devboard.c @@ -49,6 +49,9 @@ static unsigned int devboard_pins[] = { MX31_PIN_CSPI1_SS2__USBH1_RCV, MX31_PIN_CSPI1_SCLK__USBH1_OEB, MX31_PIN_CSPI1_SPI_RDY__USBH1_FS, MX31_PIN_SFS6__USBH1_SUSPEND, MX31_PIN_NFRE_B__GPIO1_11, MX31_PIN_NFALE__GPIO1_12, + /* SEL */ + MX31_PIN_DTR_DCE1__GPIO2_8, MX31_PIN_DSR_DCE1__GPIO2_9, + MX31_PIN_RI_DCE1__GPIO2_10, MX31_PIN_DCD_DCE1__GPIO2_11, }; static struct imxuart_platform_data uart_pdata = { @@ -108,6 +111,33 @@ static struct imxmmc_platform_data sdhc2_pdata = { .exit = devboard_sdhc2_exit, }; +#define SEL0 IOMUX_TO_GPIO(MX31_PIN_DTR_DCE1) +#define SEL1 IOMUX_TO_GPIO(MX31_PIN_DSR_DCE1) +#define SEL2 IOMUX_TO_GPIO(MX31_PIN_RI_DCE1) +#define SEL3 IOMUX_TO_GPIO(MX31_PIN_DCD_DCE1) + +static void devboard_init_sel_gpios(void) +{ + if (!gpio_request(SEL0, "sel0")) { + gpio_direction_input(SEL0); + gpio_export(SEL0, true); + } + + if (!gpio_request(SEL1, "sel1")) { + gpio_direction_input(SEL1); + gpio_export(SEL1, true); + } + + if (!gpio_request(SEL2, "sel2")) { + gpio_direction_input(SEL2); + gpio_export(SEL2, true); + } + + if (!gpio_request(SEL3, "sel3")) { + gpio_direction_input(SEL3); + gpio_export(SEL3, true); + } +} #define USB_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \ PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU) @@ -196,5 +226,7 @@ void __init mx31moboard_devboard_init(void) mxc_register_device(&mxcsdhc_device1, &sdhc2_pdata); + devboard_init_sel_gpios(); + devboard_usbh1_init(); } |