diff options
author | Shawn Guo <shawn.guo@freescale.com> | 2010-12-18 14:39:28 +0100 |
---|---|---|
committer | Uwe Kleine-König <u.kleine-koenig@pengutronix.de> | 2010-12-20 10:37:56 +0100 |
commit | 289569f902dc70fc42b8c7cab627f9d615a720f1 (patch) | |
tree | 340b6c539191af749885f5339f5db981ccd78cb3 /arch/arm/mach-mxs/include | |
parent | ARM: mxs: Add reset routines (diff) | |
download | linux-289569f902dc70fc42b8c7cab627f9d615a720f1.tar.xz linux-289569f902dc70fc42b8c7cab627f9d615a720f1.zip |
ARM: mxs: Add interrupt support
Add Interrupt Collector (ICOLL) support for MXS-based.
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Diffstat (limited to 'arch/arm/mach-mxs/include')
-rw-r--r-- | arch/arm/mach-mxs/include/mach/entry-macro.S | 41 |
1 files changed, 41 insertions, 0 deletions
diff --git a/arch/arm/mach-mxs/include/mach/entry-macro.S b/arch/arm/mach-mxs/include/mach/entry-macro.S new file mode 100644 index 000000000000..9f0da12e657a --- /dev/null +++ b/arch/arm/mach-mxs/include/mach/entry-macro.S @@ -0,0 +1,41 @@ +/* + * Low-level IRQ helper macros for Freescale MXS-based + * + * Copyright (C) 2009-2010 Freescale Semiconductor, Inc. All Rights Reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + */ + +#include <mach/mxs.h> + +#define MXS_ICOLL_VBASE MXS_IO_ADDRESS(MXS_ICOLL_BASE_ADDR) +#define HW_ICOLL_STAT_OFFSET 0x70 + + .macro disable_fiq + .endm + + .macro get_irqnr_and_base, irqnr, irqstat, base, tmp + ldr \irqnr, [\base, #HW_ICOLL_STAT_OFFSET] + cmp \irqnr, #0x7F + strne \irqnr, [\base] + moveqs \irqnr, #0 + .endm + + .macro get_irqnr_preamble, base, tmp + ldr \base, =MXS_ICOLL_VBASE + .endm + + .macro arch_ret_to_user, tmp1, tmp2 + .endm |