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author | Janusz Krzysztofik <jmkrzyszt@gmail.com> | 2018-06-22 00:41:26 +0200 |
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committer | Tony Lindgren <tony@atomide.com> | 2018-07-03 08:05:14 +0200 |
commit | dc8fbeb0ffde1f2395449006019e2c89c177df50 (patch) | |
tree | 631cfc6b08cc4de9cfeeb86f896ad15fdb827808 /arch/arm/mach-omap1/ams-delta-fiq.h | |
parent | ARM: OMAP1: ams-delta FIQ: Keep serio input GPIOs requested (diff) | |
download | linux-dc8fbeb0ffde1f2395449006019e2c89c177df50.tar.xz linux-dc8fbeb0ffde1f2395449006019e2c89c177df50.zip |
ARM: OMAP1: Get rid of <mach/ams-delta-fiq.h>
Split the header file into two parts and move them to directories where
they belong.
Information on internal structure of FIQ buffer is moved to
<linux/platform_data/ams-delta-fiq.h> for ams-delta-serio driver use.
Other information used by ams-delta board init file and FIQ code is
made local to mach-omap1 root directory.
Signed-off-by: Janusz Krzysztofik <jmkrzyszt@gmail.com>
Acked-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/mach-omap1/ams-delta-fiq.h')
-rw-r--r-- | arch/arm/mach-omap1/ams-delta-fiq.h | 41 |
1 files changed, 41 insertions, 0 deletions
diff --git a/arch/arm/mach-omap1/ams-delta-fiq.h b/arch/arm/mach-omap1/ams-delta-fiq.h new file mode 100644 index 000000000000..3f691d68aa62 --- /dev/null +++ b/arch/arm/mach-omap1/ams-delta-fiq.h @@ -0,0 +1,41 @@ +/* SPDX-License-Identifier: GPL-2.0 */ + +/* + * arch/arm/mach-omap1/ams-delta-fiq.h + * + * Taken from the original Amstrad modifications to fiq.h + * + * Copyright (c) 2004 Amstrad Plc + * Copyright (c) 2006 Matt Callow + * Copyright (c) 2010 Janusz Krzysztofik + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +#ifndef __AMS_DELTA_FIQ_H +#define __AMS_DELTA_FIQ_H + +#include <mach/irqs.h> + +/* + * Interrupt number used for passing control from FIQ to IRQ. + * IRQ12, described as reserved, has been selected. + */ +#define INT_DEFERRED_FIQ INT_1510_RES12 +/* + * Base address of an interrupt handler that the INT_DEFERRED_FIQ belongs to. + */ +#if (INT_DEFERRED_FIQ < IH2_BASE) +#define DEFERRED_FIQ_IH_BASE OMAP_IH1_BASE +#else +#define DEFERRED_FIQ_IH_BASE OMAP_IH2_BASE +#endif + +#ifndef __ASSEMBLER__ +extern unsigned char qwerty_fiqin_start, qwerty_fiqin_end; + +extern void __init ams_delta_init_fiq(struct gpio_chip *chip); +#endif + +#endif |