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authorAvinash H.M <avinashhm@ti.com>2011-05-09 14:29:40 +0200
committerTony Lindgren <tony@atomide.com>2011-05-13 16:08:18 +0200
commit5fd2a84ab3c8b87176e25db1d98c5cc34043a669 (patch)
tree8d876c82afc964481836e4a828b44958856c6252 /arch/arm/mach-omap2/clkt34xx_dpll3m2.c
parentomap: iommu: Return IRQ_HANDLED in fault handler when no fault occured (diff)
downloadlinux-5fd2a84ab3c8b87176e25db1d98c5cc34043a669.tar.xz
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OMAP3: set the core dpll clk rate in its set_rate function
The debug l3_ick/rate is not displaying the actual rate of the clock in hardware. This is because, the core dpll set_rate function doesn't update the clk.rate. After fixing, the l3_ick/rate is displaying proper values. Signed-off-by: Shweta Gulati <shweta.gulati@ti.com> Signed-off-by: Avinash.H.M <avinashhm@ti.com> Cc: Rajendra Nayak <rnayak@ti.com> Cc: Paul Wamsley <paul@pwsan.com> Acked-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/mach-omap2/clkt34xx_dpll3m2.c')
-rw-r--r--arch/arm/mach-omap2/clkt34xx_dpll3m2.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/mach-omap2/clkt34xx_dpll3m2.c b/arch/arm/mach-omap2/clkt34xx_dpll3m2.c
index b2b1e37bb6bb..d6e34dd9e7e7 100644
--- a/arch/arm/mach-omap2/clkt34xx_dpll3m2.c
+++ b/arch/arm/mach-omap2/clkt34xx_dpll3m2.c
@@ -115,6 +115,7 @@ int omap3_core_dpll_m2_set_rate(struct clk *clk, unsigned long rate)
sdrc_cs0->rfr_ctrl, sdrc_cs0->actim_ctrla,
sdrc_cs0->actim_ctrlb, sdrc_cs0->mr,
0, 0, 0, 0);
+ clk->rate = rate;
return 0;
}