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author | Paul Walmsley <paul@pwsan.com> | 2009-06-20 03:08:29 +0200 |
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committer | paul <paul@twilight.(none)> | 2009-06-20 03:09:32 +0200 |
commit | 7b7bcefa35d62fec64c3615a6bef7866f34c7cc9 (patch) | |
tree | 6cc4b64b104f7587af19f801ec4804e90fad12eb /arch/arm/mach-omap2/clock.c | |
parent | OMAP3: Add support for DPLL3 divisor values higher than 2 (diff) | |
download | linux-7b7bcefa35d62fec64c3615a6bef7866f34c7cc9.tar.xz linux-7b7bcefa35d62fec64c3615a6bef7866f34c7cc9.zip |
OMAP3 SDRC: set FIXEDDELAY when disabling SDRC DLL
Correspondence with the TI OMAP hardware team indicates that
SDRC_DLLA_CTRL.FIXEDDELAY should be initialized to 0x0f. This number
was apparently derived from process validation. This is only used
when the SDRC DLL is unlocked (e.g., SDRC clock frequency less than
83MHz).
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Diffstat (limited to 'arch/arm/mach-omap2/clock.c')
0 files changed, 0 insertions, 0 deletions