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authorPaul Walmsley <paul@pwsan.com>2009-06-20 03:08:25 +0200
committerpaul <paul@twilight.(none)>2009-06-20 03:09:30 +0200
commit2f135eaf182761bb9a5cbd5138a447b0ad2a1fef (patch)
treeceac7506d9d004dc0f6b2aaf56fd395fe411c1d7 /arch/arm/mach-omap2/clock34xx.c
parentOMAP3 clock: remove wait for DPLL3 M2 clock to stabilize (diff)
downloadlinux-2f135eaf182761bb9a5cbd5138a447b0ad2a1fef.tar.xz
linux-2f135eaf182761bb9a5cbd5138a447b0ad2a1fef.zip
OMAP3 clock: initialize SDRC timings at kernel start
On the OMAP3, initialize SDRC timings when the kernel boots. This ensures that the kernel is running with known, optimized SDRC timings, rather than whatever was configured by the bootloader. Signed-off-by: Paul Walmsley <paul@pwsan.com>
Diffstat (limited to 'arch/arm/mach-omap2/clock34xx.c')
-rw-r--r--arch/arm/mach-omap2/clock34xx.c3
1 files changed, 0 insertions, 3 deletions
diff --git a/arch/arm/mach-omap2/clock34xx.c b/arch/arm/mach-omap2/clock34xx.c
index 9e43fe5209d3..5458ab3bf65a 100644
--- a/arch/arm/mach-omap2/clock34xx.c
+++ b/arch/arm/mach-omap2/clock34xx.c
@@ -718,9 +718,6 @@ static int omap3_core_dpll_m2_set_rate(struct clk *clk, unsigned long rate)
if (clk != &dpll3_m2_ck)
return -EINVAL;
- if (rate == clk->rate)
- return 0;
-
validrate = omap2_clksel_round_rate_div(clk, rate, &new_div);
if (validrate != rate)
return -EINVAL;