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| author | Tero Kristo <t-kristo@ti.com> | 2014-10-03 15:57:10 +0200 |
|---|---|---|
| committer | Paul Walmsley <paul@pwsan.com> | 2014-11-13 17:25:06 +0100 |
| commit | f0d2f68a6387867c4748bc94c9b0165a49701204 (patch) | |
| tree | cc53c00581f04a84b514ea5ce571b6b1a38c3a1d /arch/arm/mach-omap2/clock3xxx.c | |
| parent | Linux 3.18-rc1 (diff) | |
| download | linux-f0d2f68a6387867c4748bc94c9b0165a49701204.tar.xz linux-f0d2f68a6387867c4748bc94c9b0165a49701204.zip | |
ARM: OMAP3: clock: use clk_features flags for omap3 DPLL4 checks
DPLL4 can't be reprogrammed on OMAP3430 ES1.0 due to hardware limitation.
Currently, the code does runtime omap_rev() check to see the chip it is
being executed on, instead, change this to use clk_features flags.
This avoids need for runtime omap_rev() checks.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Diffstat (limited to 'arch/arm/mach-omap2/clock3xxx.c')
| -rw-r--r-- | arch/arm/mach-omap2/clock3xxx.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-omap2/clock3xxx.c b/arch/arm/mach-omap2/clock3xxx.c index 0b02b4161d71..9a2560181909 100644 --- a/arch/arm/mach-omap2/clock3xxx.c +++ b/arch/arm/mach-omap2/clock3xxx.c @@ -46,7 +46,7 @@ int omap3_dpll4_set_rate(struct clk_hw *hw, unsigned long rate, * on 3430ES1 prevents us from changing DPLL multipliers or dividers * on DPLL4. */ - if (omap_rev() == OMAP3430_REV_ES1_0) { + if (ti_clk_features.flags & TI_CLK_DPLL4_DENY_REPROGRAM) { pr_err("clock: DPLL4 cannot change rate due to silicon 'Limitation 2.5' on 3430ES1.\n"); return -EINVAL; } |