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authorPaul Walmsley <paul@pwsan.com>2011-10-07 08:53:08 +0200
committerPaul Walmsley <paul@pwsan.com>2011-10-07 09:06:48 +0200
commit52a3a4d4610cfad536b8ac94b9a2f5ebfa51c06b (patch)
treed96680dde660e21b842d07244440f379018c3a47 /arch/arm/mach-omap2/clock44xx_data.c
parentARM: OMAP3+: dpll: use DPLLs recalc function instead of omap2_get_dpll_rate (diff)
downloadlinux-52a3a4d4610cfad536b8ac94b9a2f5ebfa51c06b.tar.xz
linux-52a3a4d4610cfad536b8ac94b9a2f5ebfa51c06b.zip
ARM: OMAP4460: Clock: Adding support for 4460 specific clocks
OMAP4460 specific clocks are not getting added as the cpu_is_omap44xx is choosing only OMAP4430 specific clock nodes. Changing it to add to OMAP4460 specific clocks also. This is clocks are required of temperature sensor. Signed-off-by: Vishwanath BS <vishwanath.bs@ti.com> Signed-off-by: Keerthy <j-keerthy@ti.com> Cc: paul@pwsan.com [paul@pwsan.com: updated to apply] Signed-off-by: Paul Walmsley <paul@pwsan.com>
Diffstat (limited to 'arch/arm/mach-omap2/clock44xx_data.c')
-rw-r--r--arch/arm/mach-omap2/clock44xx_data.c12
1 files changed, 6 insertions, 6 deletions
diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c
index c98c0a22c188..7b028ecce37a 100644
--- a/arch/arm/mach-omap2/clock44xx_data.c
+++ b/arch/arm/mach-omap2/clock44xx_data.c
@@ -1398,9 +1398,9 @@ static struct clk dss_dss_clk = {
};
static const struct clksel_rate div3_8to32_rates[] = {
- { .div = 8, .val = 0, .flags = RATE_IN_44XX },
- { .div = 16, .val = 1, .flags = RATE_IN_44XX },
- { .div = 32, .val = 2, .flags = RATE_IN_44XX },
+ { .div = 8, .val = 0, .flags = RATE_IN_4460 },
+ { .div = 16, .val = 1, .flags = RATE_IN_4460 },
+ { .div = 32, .val = 2, .flags = RATE_IN_4460 },
{ .div = 0 },
};
@@ -3370,12 +3370,12 @@ int __init omap4xxx_clk_init(void)
struct omap_clk *c;
u32 cpu_clkflg;
- if (cpu_is_omap44xx()) {
+ if (cpu_is_omap443x()) {
cpu_mask = RATE_IN_4430;
cpu_clkflg = CK_443X;
} else if (cpu_is_omap446x()) {
- cpu_mask = RATE_IN_4460;
- cpu_clkflg = CK_446X;
+ cpu_mask = RATE_IN_4460 | RATE_IN_4430;
+ cpu_clkflg = CK_446X | CK_443X;
} else {
return 0;
}