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author | Ingo Molnar <mingo@elte.hu> | 2008-07-16 00:29:07 +0200 |
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committer | Ingo Molnar <mingo@elte.hu> | 2008-07-16 00:29:07 +0200 |
commit | 82638844d9a8581bbf33201cc209a14876eca167 (patch) | |
tree | 961d7f9360194421a71aa644a9d0c176a960ce49 /arch/arm/mach-omap2/cm-regbits-34xx.h | |
parent | Revert "cpumask: introduce new APIs" (diff) | |
parent | generic ipi function calls: wait on alloc failure fallback (diff) | |
download | linux-82638844d9a8581bbf33201cc209a14876eca167.tar.xz linux-82638844d9a8581bbf33201cc209a14876eca167.zip |
Merge branch 'linus' into cpus4096
Conflicts:
arch/x86/xen/smp.c
kernel/sched_rt.c
net/iucv/iucv.c
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/arm/mach-omap2/cm-regbits-34xx.h')
-rw-r--r-- | arch/arm/mach-omap2/cm-regbits-34xx.h | 18 |
1 files changed, 11 insertions, 7 deletions
diff --git a/arch/arm/mach-omap2/cm-regbits-34xx.h b/arch/arm/mach-omap2/cm-regbits-34xx.h index 3c38395f6442..ee4c0ca1a708 100644 --- a/arch/arm/mach-omap2/cm-regbits-34xx.h +++ b/arch/arm/mach-omap2/cm-regbits-34xx.h @@ -72,7 +72,8 @@ #define OMAP3430_ST_IVA2 (1 << 0) /* CM_IDLEST_PLL_IVA2 */ -#define OMAP3430_ST_IVA2_CLK (1 << 0) +#define OMAP3430_ST_IVA2_CLK_SHIFT 0 +#define OMAP3430_ST_IVA2_CLK_MASK (1 << 0) /* CM_AUTOIDLE_PLL_IVA2 */ #define OMAP3430_AUTO_IVA2_DPLL_SHIFT 0 @@ -115,10 +116,7 @@ #define OMAP3430_ST_MPU (1 << 0) /* CM_IDLEST_PLL_MPU */ -#define OMAP3430_ST_MPU_CLK (1 << 0) -#define OMAP3430_ST_IVA2_CLK_MASK (1 << 0) - -/* CM_IDLEST_PLL_MPU */ +#define OMAP3430_ST_MPU_CLK_SHIFT 0 #define OMAP3430_ST_MPU_CLK_MASK (1 << 0) /* CM_AUTOIDLE_PLL_MPU */ @@ -408,8 +406,10 @@ #define OMAP3430_ST_12M_CLK (1 << 4) #define OMAP3430_ST_48M_CLK (1 << 3) #define OMAP3430_ST_96M_CLK (1 << 2) -#define OMAP3430_ST_PERIPH_CLK (1 << 1) -#define OMAP3430_ST_CORE_CLK (1 << 0) +#define OMAP3430_ST_PERIPH_CLK_SHIFT 1 +#define OMAP3430_ST_PERIPH_CLK_MASK (1 << 1) +#define OMAP3430_ST_CORE_CLK_SHIFT 0 +#define OMAP3430_ST_CORE_CLK_MASK (1 << 0) /* CM_IDLEST2_CKGEN */ #define OMAP3430ES2_ST_120M_CLK_SHIFT 1 @@ -423,6 +423,10 @@ #define OMAP3430_AUTO_CORE_DPLL_SHIFT 0 #define OMAP3430_AUTO_CORE_DPLL_MASK (0x7 << 0) +/* CM_AUTOIDLE2_PLL */ +#define OMAP3430ES2_AUTO_PERIPH2_DPLL_SHIFT 0 +#define OMAP3430ES2_AUTO_PERIPH2_DPLL_MASK (0x7 << 0) + /* CM_CLKSEL1_PLL */ /* Note that OMAP3430_CORE_DPLL_CLKOUT_DIV_MASK was (0x3 << 27) on 3430ES1 */ #define OMAP3430_CORE_DPLL_CLKOUT_DIV_SHIFT 27 |