diff options
| author | Paul Walmsley <paul@pwsan.com> | 2010-12-22 05:05:15 +0100 |
|---|---|---|
| committer | Paul Walmsley <paul@pwsan.com> | 2010-12-22 05:05:15 +0100 |
| commit | 55ae35073b1c76f24c3736cf797c40d9932b19aa (patch) | |
| tree | 0309763ffbd016bb884ca916b35a15d10f1982a5 /arch/arm/mach-omap2/cm2xxx_3xxx.h | |
| parent | OMAP4: clockdomains: add OMAP4 PRCM data and OMAP4 support (diff) | |
| download | linux-55ae35073b1c76f24c3736cf797c40d9932b19aa.tar.xz linux-55ae35073b1c76f24c3736cf797c40d9932b19aa.zip | |
OMAP2/3: clockdomain: remove unneeded .clkstctrl_reg, remove some direct CM register accesses
Reverse some of the effects of commit
84c0c39aec31a09571fc08a752a2f4da0fe9fcf2 ("ARM: OMAP4: PM: Make OMAP3
Clock-domain framework compatible for OMAP4"). On OMAP2/3, the
CM_CLKSTCTRL register is at a constant offset from the powerdomain's
CM instance.
Also, remove some of the direct CM register access from the
clockdomain code, moving it to the OMAP2/3 CM code instead. The
intention here is to simplify the clockdomain code. (The long-term
goal is to move all direct CM register access across the OMAP core
code to the appropriate cm*.c file.)
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Tested-by: Rajendra Nayak <rnayak@ti.com>
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Diffstat (limited to 'arch/arm/mach-omap2/cm2xxx_3xxx.h')
| -rw-r--r-- | arch/arm/mach-omap2/cm2xxx_3xxx.h | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/arch/arm/mach-omap2/cm2xxx_3xxx.h b/arch/arm/mach-omap2/cm2xxx_3xxx.h index ff24edf54d31..5e9ea5bd60b9 100644 --- a/arch/arm/mach-omap2/cm2xxx_3xxx.h +++ b/arch/arm/mach-omap2/cm2xxx_3xxx.h @@ -113,6 +113,15 @@ extern int omap2_cm_wait_module_ready(s16 prcm_mod, u8 idlest_id, extern u32 omap2_cm_set_mod_reg_bits(u32 bits, s16 module, s16 idx); extern u32 omap2_cm_clear_mod_reg_bits(u32 bits, s16 module, s16 idx); +extern bool omap2_cm_is_clkdm_in_hwsup(s16 module, u32 mask); +extern void omap2xxx_cm_clkdm_enable_hwsup(s16 module, u32 mask); +extern void omap2xxx_cm_clkdm_disable_hwsup(s16 module, u32 mask); + +extern void omap3xxx_cm_clkdm_enable_hwsup(s16 module, u32 mask); +extern void omap3xxx_cm_clkdm_disable_hwsup(s16 module, u32 mask); +extern void omap3xxx_cm_clkdm_force_sleep(s16 module, u32 mask); +extern void omap3xxx_cm_clkdm_force_wakeup(s16 module, u32 mask); + #endif /* CM register bits shared between 24XX and 3430 */ |